diff --git a/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp b/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp index 6496d56d74b2c..2c559d4beb5d1 100644 --- a/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp +++ b/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp @@ -482,9 +482,7 @@ void applyExtUaddvToUaddlv(MachineInstr &MI, MachineRegisterInfo &MRI, // the values inside a small vec extractParts(SrcReg, SrcTy, MainTy, LeftoverTy, WorkingRegisters, LeftoverRegs, B, MRI); - for (unsigned I = 0; I < LeftoverRegs.size(); I++) { - WorkingRegisters.push_back(LeftoverRegs[I]); - } + llvm::append_range(WorkingRegisters, LeftoverRegs); } else { WorkingRegisters.push_back(SrcReg); MainTy = SrcTy; diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp b/llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp index f9facfa461748..70274a8101f89 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp @@ -1265,9 +1265,7 @@ bool AMDGPUSwLowerLDS::run() { for (Instruction *Inst : AsanInfo.Instructions) { SmallVector InterestingOperands; getInterestingMemoryOperands(M, Inst, InterestingOperands); - for (auto &Operand : InterestingOperands) { - OperandsToInstrument.push_back(Operand); - } + llvm::append_range(OperandsToInstrument, InterestingOperands); } for (auto &Operand : OperandsToInstrument) { Value *Addr = Operand.getPtr(); diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp index 71fe990e5ab7c..6843ec895e69c 100644 --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -6907,8 +6907,7 @@ bool ARMPipelinerLoopInfo::tooMuchRegisterPressure(SwingSchedulerDAG &SSD, SMS.getInstructions(Cycle + Stage * SMS.getInitiationInterval()); std::sort(Instrs.begin(), Instrs.end(), [](SUnit *A, SUnit *B) { return A->NodeNum > B->NodeNum; }); - for (SUnit *SU : Instrs) - ProposedSchedule.push_back(SU); + llvm::append_range(ProposedSchedule, Instrs); } // Learn whether the last use/def of each cross-iteration register is a use or diff --git a/llvm/lib/Target/ARM/MVETPAndVPTOptimisationsPass.cpp b/llvm/lib/Target/ARM/MVETPAndVPTOptimisationsPass.cpp index 12fd8c7924565..18d5c232378a7 100644 --- a/llvm/lib/Target/ARM/MVETPAndVPTOptimisationsPass.cpp +++ b/llvm/lib/Target/ARM/MVETPAndVPTOptimisationsPass.cpp @@ -303,8 +303,7 @@ MachineInstr *MVETPAndVPTOptimisations::CheckForLRUseInPredecessors( } Visited.insert(MBB); - for (auto *Pred : MBB->predecessors()) - Worklist.push_back(Pred); + llvm::append_range(Worklist, MBB->predecessors()); } return LoopStart; } diff --git a/llvm/lib/Target/DirectX/DXILDataScalarization.cpp b/llvm/lib/Target/DirectX/DXILDataScalarization.cpp index a0dd17904f6fa..1f2700ac55647 100644 --- a/llvm/lib/Target/DirectX/DXILDataScalarization.cpp +++ b/llvm/lib/Target/DirectX/DXILDataScalarization.cpp @@ -144,9 +144,7 @@ bool DataScalarizerVisitor::visitGetElementPtrInst(GetElementPtrInst &GEPI) { return false; IRBuilder<> Builder(&GEPI); - SmallVector Indices; - for (auto &Index : GEPI.indices()) - Indices.push_back(Index); + SmallVector Indices(GEPI.indices()); Value *NewGEP = Builder.CreateGEP(NewGlobal->getValueType(), NewGlobal, Indices, diff --git a/llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp b/llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp index dd054846f03c8..02b0282bbddad 100644 --- a/llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp +++ b/llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp @@ -1062,8 +1062,7 @@ static SmallVector getInputSegmentList(ShuffleMask SM, Segs.set(M >> Shift); } - for (unsigned B : Segs.set_bits()) - SegList.push_back(B); + llvm::append_range(SegList, Segs.set_bits()); return SegList; } diff --git a/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp b/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp index 939d9e920d05b..900bb1a8a46d2 100644 --- a/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp @@ -1241,8 +1241,7 @@ void SPIRVEmitIntrinsics::preprocessCompositeConstants(IRBuilder<> &B) { for (unsigned i = 0; i < COp->getNumElements(); ++i) Args.push_back(COp->getElementAsConstant(i)); else - for (auto &COp : AggrConst->operands()) - Args.push_back(COp); + llvm::append_range(Args, AggrConst->operands()); if (!BPrepared) { IsPhi ? B.SetInsertPointPastAllocas(I->getParent()->getParent()) : B.SetInsertPoint(I); @@ -1387,8 +1386,7 @@ Instruction *SPIRVEmitIntrinsics::visitGetElementPtrInst(GetElementPtrInst &I) { SmallVector Types = {I.getType(), I.getOperand(0)->getType()}; SmallVector Args; Args.push_back(B.getInt1(I.isInBounds())); - for (auto &Op : I.operands()) - Args.push_back(Op); + llvm::append_range(Args, I.operands()); auto *NewI = B.CreateIntrinsic(Intrinsic::spv_gep, {Types}, {Args}); replaceAllUsesWithAndErase(B, &I, NewI); return NewI; @@ -1716,9 +1714,7 @@ Instruction *SPIRVEmitIntrinsics::visitExtractValueInst(ExtractValueInst &I) { return &I; IRBuilder<> B(I.getParent()); B.SetInsertPoint(&I); - SmallVector Args; - for (auto &Op : I.operands()) - Args.push_back(Op); + SmallVector Args(I.operands()); for (auto &Op : I.indices()) Args.push_back(B.getInt32(Op)); auto *NewI = @@ -1794,9 +1790,7 @@ Instruction *SPIRVEmitIntrinsics::visitAtomicCmpXchgInst(AtomicCmpXchgInst &I) { assert(I.getType()->isAggregateType() && "Aggregate result is expected"); IRBuilder<> B(I.getParent()); B.SetInsertPoint(&I); - SmallVector Args; - for (auto &Op : I.operands()) - Args.push_back(Op); + SmallVector Args(I.operands()); Args.push_back(B.getInt32( static_cast(getMemScope(I.getContext(), I.getSyncScopeID())))); Args.push_back(B.getInt32( diff --git a/llvm/lib/Target/SPIRV/SPIRVUtils.cpp b/llvm/lib/Target/SPIRV/SPIRVUtils.cpp index 6bef6b7e9b16e..60b67a4f5ec5e 100644 --- a/llvm/lib/Target/SPIRV/SPIRVUtils.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVUtils.cpp @@ -689,8 +689,7 @@ bool sortBlocks(Function &F) { Order.reserve(F.size()); ReversePostOrderTraversal RPOT(&F); - for (BasicBlock *BB : RPOT) - Order.push_back(BB); + llvm::append_range(Order, RPOT); assert(&*F.begin() == Order[0]); BasicBlock *LastBlock = &*F.begin(); @@ -785,8 +784,7 @@ CallInst *buildIntrWithMD(Intrinsic::ID IntrID, ArrayRef Types, SmallVector Args; Args.push_back(Arg2); Args.push_back(buildMD(Arg)); - for (auto *Imm : Imms) - Args.push_back(Imm); + llvm::append_range(Args, Imms); return B.CreateIntrinsic(IntrID, {Types}, Args); } diff --git a/llvm/lib/Target/X86/X86CmovConversion.cpp b/llvm/lib/Target/X86/X86CmovConversion.cpp index d639ca56b77d6..488b3126b8609 100644 --- a/llvm/lib/Target/X86/X86CmovConversion.cpp +++ b/llvm/lib/Target/X86/X86CmovConversion.cpp @@ -240,8 +240,7 @@ bool X86CmovConverterPass::runOnMachineFunction(MachineFunction &MF) { // Note that we need to check size on each iteration as we accumulate child // loops. for (int i = 0; i < (int)Loops.size(); ++i) - for (MachineLoop *Child : Loops[i]->getSubLoops()) - Loops.push_back(Child); + llvm::append_range(Loops, Loops[i]->getSubLoops()); for (MachineLoop *CurrLoop : Loops) { // Optimize only innermost loops. diff --git a/llvm/lib/Target/X86/X86InterleavedAccess.cpp b/llvm/lib/Target/X86/X86InterleavedAccess.cpp index efab93d61c7c5..1eb47e3b2cd18 100644 --- a/llvm/lib/Target/X86/X86InterleavedAccess.cpp +++ b/llvm/lib/Target/X86/X86InterleavedAccess.cpp @@ -829,10 +829,8 @@ bool X86TargetLowering::lowerInterleavedStore(StoreInst *SI, // Holds the indices of SVI that correspond to the starting index of each // interleaved shuffle. - SmallVector Indices; auto Mask = SVI->getShuffleMask(); - for (unsigned i = 0; i < Factor; i++) - Indices.push_back(Mask[i]); + SmallVector Indices(Mask.take_front(Factor)); ArrayRef Shuffles = ArrayRef(SVI); diff --git a/llvm/lib/Target/X86/X86WinEHState.cpp b/llvm/lib/Target/X86/X86WinEHState.cpp index 7d6d3f8d21f25..1bcbc7d6e6703 100644 --- a/llvm/lib/Target/X86/X86WinEHState.cpp +++ b/llvm/lib/Target/X86/X86WinEHState.cpp @@ -721,8 +721,7 @@ void WinEHStatePass::addStateStores(Function &F, WinEHFuncInfo &FuncInfo) { // enqueue it's successors to see if we can infer their states. InitialStates.insert({BB, PredState}); FinalStates.insert({BB, PredState}); - for (BasicBlock *SuccBB : successors(BB)) - Worklist.push_back(SuccBB); + llvm::append_range(Worklist, successors(BB)); } // Try to hoist stores from successors.