From 425782eb76c1cf10eade50b975a773d8f5ee2669 Mon Sep 17 00:00:00 2001
From: Peter Collingbourne <pcc@google.com>
Date: Mon, 7 Apr 2025 18:26:49 -0700
Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?=
 =?UTF-8?q?l=20version?=
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Created using spr 1.3.6-beta.1
---
 llvm/lib/Target/AArch64/AArch64InstrInfo.td   |  5 +--
 .../lib/Target/AArch64/AArch64PointerAuth.cpp | 33 -------------------
 .../AArch64/ptrauth-pseudo-instructions.mir   | 27 ---------------
 3 files changed, 1 insertion(+), 64 deletions(-)
 delete mode 100644 llvm/test/CodeGen/AArch64/ptrauth-pseudo-instructions.mir

diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
index a2d98a0862988..7307d412694a1 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
@@ -1798,9 +1798,6 @@ def PAUTH_PROLOGUE : Pseudo<(outs), (ins), []>, Sched<[]> {
 def PAUTH_EPILOGUE : Pseudo<(outs), (ins), []>, Sched<[]>;
 }
 
-def PAUTH_BLEND : Pseudo<(outs GPR64:$disc),
-                         (ins GPR64:$addr_disc, i32imm:$int_disc), []>, Sched<[]>;
-
 // These pointer authentication instructions require armv8.3a
 let Predicates = [HasPAuth] in {
 
@@ -10136,7 +10133,7 @@ let Predicates = [HasMOPS, HasMTE], Defs = [NZCV], Size = 12, mayLoad = 0, maySt
 // v8.3 Pointer Authentication late patterns
 
 def : Pat<(int_ptrauth_blend GPR64:$Rd, imm64_0_65535:$imm),
-          (PAUTH_BLEND GPR64:$Rd, (trunc_imm imm64_0_65535:$imm))>;
+          (MOVKXi GPR64:$Rd, (trunc_imm imm64_0_65535:$imm), 48)>;
 def : Pat<(int_ptrauth_blend GPR64:$Rd, GPR64:$Rn),
           (BFMXri GPR64:$Rd, GPR64:$Rn, 16, 15)>;
 
diff --git a/llvm/lib/Target/AArch64/AArch64PointerAuth.cpp b/llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
index c3bc70ad6f427..13a36551c207c 100644
--- a/llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
+++ b/llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
@@ -46,9 +46,6 @@ class AArch64PointerAuth : public MachineFunctionPass {
   void emitBlend(MachineBasicBlock::iterator MBBI, Register Result,
                  Register AddrDisc, unsigned IntDisc) const;
 
-  /// Expands PAUTH_BLEND pseudo instruction.
-  void expandPAuthBlend(MachineBasicBlock::iterator MBBI) const;
-
   bool checkAuthenticatedLR(MachineBasicBlock::iterator TI) const;
 };
 
@@ -249,32 +246,6 @@ unsigned llvm::AArch64PAuth::getCheckerSizeInBytes(AuthCheckMethod Method) {
   llvm_unreachable("Unknown AuthCheckMethod enum");
 }
 
-void AArch64PointerAuth::emitBlend(MachineBasicBlock::iterator MBBI,
-                                   Register Result, Register AddrDisc,
-                                   unsigned IntDisc) const {
-  MachineBasicBlock &MBB = *MBBI->getParent();
-  DebugLoc DL = MBBI->getDebugLoc();
-
-  if (Result != AddrDisc)
-    BuildMI(MBB, MBBI, DL, TII->get(AArch64::ORRXrs), Result)
-        .addReg(AArch64::XZR)
-        .addReg(AddrDisc)
-        .addImm(0);
-
-  BuildMI(MBB, MBBI, DL, TII->get(AArch64::MOVKXi), Result)
-      .addReg(Result)
-      .addImm(IntDisc)
-      .addImm(48);
-}
-
-void AArch64PointerAuth::expandPAuthBlend(
-    MachineBasicBlock::iterator MBBI) const {
-  Register ResultReg = MBBI->getOperand(0).getReg();
-  Register AddrDisc = MBBI->getOperand(1).getReg();
-  unsigned IntDisc = MBBI->getOperand(2).getImm();
-  emitBlend(MBBI, ResultReg, AddrDisc, IntDisc);
-}
-
 bool AArch64PointerAuth::runOnMachineFunction(MachineFunction &MF) {
   Subtarget = &MF.getSubtarget<AArch64Subtarget>();
   TII = Subtarget->getInstrInfo();
@@ -290,7 +261,6 @@ bool AArch64PointerAuth::runOnMachineFunction(MachineFunction &MF) {
         break;
       case AArch64::PAUTH_PROLOGUE:
       case AArch64::PAUTH_EPILOGUE:
-      case AArch64::PAUTH_BLEND:
         PAuthPseudoInstrs.push_back(MI.getIterator());
         break;
       }
@@ -305,9 +275,6 @@ bool AArch64PointerAuth::runOnMachineFunction(MachineFunction &MF) {
     case AArch64::PAUTH_EPILOGUE:
       authenticateLR(MF, It);
       break;
-    case AArch64::PAUTH_BLEND:
-      expandPAuthBlend(It);
-      break;
     default:
       llvm_unreachable("Unhandled opcode");
     }
diff --git a/llvm/test/CodeGen/AArch64/ptrauth-pseudo-instructions.mir b/llvm/test/CodeGen/AArch64/ptrauth-pseudo-instructions.mir
deleted file mode 100644
index d7fe1953deb47..0000000000000
--- a/llvm/test/CodeGen/AArch64/ptrauth-pseudo-instructions.mir
+++ /dev/null
@@ -1,27 +0,0 @@
-# RUN: llc -mtriple=aarch64--- -run-pass=aarch64-ptrauth -verify-machineinstrs %s -o - | FileCheck %s
-
-# Test the corner cases that cannot be reliably tested using LLVM IR as input.
-
---- |
-  define i64 @blend_untied(i64 %unused, i64 %ptr_arg) {
-    ret i64 0
-  }
-...
----
-# Check that the input register is copied to the output one, if not tied.
-
-name:            blend_untied
-tracksRegLiveness: true
-body:             |
-  bb.0:
-  liveins: $lr, $x0, $x1
-    $x0 = PAUTH_BLEND $x1, 42
-    RET undef $lr
-
-# CHECK:       liveins: $lr, $x0, $x1
-# CHECK-NEXT:    {{^ +$}}
-# CHECK-NEXT:    $x0 = ORRXrs $xzr, $x1, 0
-# CHECK-NEXT:    $x0 = MOVKXi $x0, 42, 48
-# CHECK-NEXT:    RET undef $lr
-
-...