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75 changes: 75 additions & 0 deletions llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -14295,6 +14295,78 @@ static SDValue widenAbs(SDNode *Extend, SelectionDAG &DAG) {
return DAG.getZExtOrTrunc(NewAbs, SDLoc(Extend), VT);
}

// Try to widen the build vector and bitcast it to the type of zext.
// This is a special case for the 128-bit vector types. Intention is to remove
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This looks like specific to X86, better to move to X86ISelLowering.

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Done

// the zext and replace it with a bitcast the wider type. While lowering
// the bitcast is removed and extra commutation due to zext is avoided.
// For example:
// zext v4i16 ( v4i8 build_vector (x, y, z, w)) -> bitcast v4i16 ( v8i8
// build_vector (x, 0, y, 0, z, w, 0)
static SDValue widenBuildVec(SDNode *Extend, SelectionDAG &DAG) {

assert(Extend->getOpcode() == ISD::ZERO_EXTEND && "Expected zero extend.");

EVT ExtendVT = Extend->getValueType(0);

SDValue BV = Extend->getOperand(0);
if (BV.getOpcode() != ISD::BUILD_VECTOR || !BV.hasOneUse())
return SDValue();

if (any_of(BV->op_values(), [](SDValue Op) { return Op.isUndef(); })) {
// If the build vector has undef elements, we cannot widen it.
// The widening would create a vector with more undef elements, which
// is not valid.
return SDValue();
}

if (!all_of(BV->op_values(),
[](SDValue Op) { return Op.getOpcode() == ISD::LOAD; })) {
// If the build vector any element other than \ISD::LOAD, we cannot widen
// it.
return SDValue();
}

SDLoc dl(BV);
EVT VT = BV.getValueType();
EVT EltVT = BV.getOperand(0).getValueType();
unsigned NumElts = VT.getVectorNumElements();

const TargetLowering &TLI = DAG.getTargetLoweringInfo();

if (TLI.getTypeAction(*DAG.getContext(), VT) !=
TargetLowering::TypeWidenVector)
return SDValue();

EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
unsigned WidenNumElts = WidenVT.getVectorNumElements();

SmallVector<SDValue, 16> NewOps(BV->op_begin(), BV->op_end());
assert(WidenNumElts >= NumElts && "Shrinking vector instead of widening!");
// Fill the new elements with Zero.
NewOps.append(WidenNumElts - NumElts, DAG.getConstant(0, dl, EltVT));
// Compute the step to place the elements in the right place and control the
// iteration.
unsigned step = WidenNumElts / NumElts;
if (WidenVT.is128BitVector()) {
if (step > 1 && Extend->getValueSizeInBits(0) == WidenVT.getSizeInBits()) {
for (int i = NumElts - 1, j = WidenNumElts - step; i > 0;
i--, j -= step) {
SDValue temp = NewOps[i];
NewOps[i] = NewOps[j];
NewOps[j] = temp;
}
// Create new build vector with WidenVT and NewOps
SDValue NewBV = DAG.getBuildVector(WidenVT, dl, NewOps);
// Replace the old build vector with the new one. Bitcast the
// new build vector to the type of the zext.
SDValue NewBVBitcast = DAG.getBitcast(ExtendVT, NewBV);
DAG.ReplaceAllUsesOfValueWith(SDValue(Extend, 0), NewBVBitcast);
return NewBV;
}
}
return SDValue();
}

SDValue DAGCombiner::visitZERO_EXTEND(SDNode *N) {
SDValue N0 = N->getOperand(0);
EVT VT = N->getValueType(0);
Expand Down Expand Up @@ -14621,6 +14693,9 @@ SDValue DAGCombiner::visitZERO_EXTEND(SDNode *N) {
return SDValue(CSENode, 0);
}

if (SDValue V = widenBuildVec(N, DAG))
return V;

return SDValue();
}

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14 changes: 7 additions & 7 deletions llvm/test/CodeGen/X86/avx512-i1test.ll
Original file line number Diff line number Diff line change
Expand Up @@ -14,13 +14,13 @@ define void @func() {
; CHECK-NEXT: retq
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_1: # %bb33
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: jne .LBB0_1
; CHECK-NEXT: # %bb.2: # %bb35
; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: jmp .LBB0_1
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: jne .LBB0_1
; CHECK-NEXT: # %bb.2: # %bb35
; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: jmp .LBB0_1
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No real change in the file. Should be reverted.

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Done

bb1:
br i1 poison, label %L_10, label %L_10

Expand Down
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