From 82ff6762ff177e66c67c843539deb5482674f2e9 Mon Sep 17 00:00:00 2001 From: "Sarnie, Nick" Date: Tue, 26 Aug 2025 10:08:16 -0700 Subject: [PATCH 1/2] [clang][SPIRV] Set program address space for Intel-flavored SPIR-V Signed-off-by: Sarnie, Nick --- clang/lib/Basic/Targets.cpp | 2 ++ clang/lib/Basic/Targets/SPIR.h | 11 +++++++++++ clang/test/CodeGenSPIRV/spirv-intel.c | 8 +++++--- clang/test/OpenMP/spirv_variant_match.cpp | 2 +- llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp | 3 +++ 5 files changed, 22 insertions(+), 4 deletions(-) diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp index e3f9760ac7ce3..1ae244edad878 100644 --- a/clang/lib/Basic/Targets.cpp +++ b/clang/lib/Basic/Targets.cpp @@ -683,6 +683,8 @@ std::unique_ptr AllocateTarget(const llvm::Triple &Triple, return std::make_unique(Triple, Opts); return nullptr; } + if (Triple.getVendor() == llvm::Triple::Intel) + return std::make_unique(Triple, Opts); return std::make_unique(Triple, Opts); } case llvm::Triple::wasm32: diff --git a/clang/lib/Basic/Targets/SPIR.h b/clang/lib/Basic/Targets/SPIR.h index 8bb0428a736ff..d6d489600db67 100644 --- a/clang/lib/Basic/Targets/SPIR.h +++ b/clang/lib/Basic/Targets/SPIR.h @@ -469,6 +469,17 @@ class LLVM_LIBRARY_VISIBILITY SPIRV64AMDGCNTargetInfo final bool hasInt128Type() const override { return TargetInfo::hasInt128Type(); } }; +class LLVM_LIBRARY_VISIBILITY SPIRV64IntelTargetInfo final + : public SPIRV64TargetInfo { +public: + SPIRV64IntelTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts) + : SPIRV64TargetInfo(Triple, Opts) { + assert(Triple.getVendor() == llvm::Triple::VendorType::Intel && + "64-bit Intel SPIR-V target must use Intel vendor"); + resetDataLayout("e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-" + "v256:256-v512:512-v1024:1024-n8:16:32:64-G1-P4-A0"); + } +}; } // namespace targets } // namespace clang #endif // LLVM_CLANG_LIB_BASIC_TARGETS_SPIR_H diff --git a/clang/test/CodeGenSPIRV/spirv-intel.c b/clang/test/CodeGenSPIRV/spirv-intel.c index 3cfe09f0c542b..84d828a86aedb 100644 --- a/clang/test/CodeGenSPIRV/spirv-intel.c +++ b/clang/test/CodeGenSPIRV/spirv-intel.c @@ -1,9 +1,11 @@ -// RUN: %clang_cc1 -triple spirv64-intel %s -emit-llvm -o - | FileCheck -check-prefix=CHECK-WITH %s -// RUN: %clang_cc1 -triple spirv32-intel %s -emit-llvm -o - | FileCheck -check-prefix=CHECK-WITH %s +// RUN: %clang_cc1 -triple spirv64-intel %s -emit-llvm -o - | FileCheck -check-prefix=CHECK-WITH-64 %s +// RUN: %clang_cc1 -triple spirv32-intel %s -emit-llvm -o - | FileCheck -check-prefix=CHECK-WITH-32 %s // RUN: %clang_cc1 -triple spir-intel %s -emit-llvm -o - | FileCheck -check-prefix=CHECK-WITHOUT %s // RUN: %clang_cc1 -triple spir64-intel %s -emit-llvm -o - | FileCheck -check-prefix=CHECK-WITHOUT %s -// CHECK-WITH: spir_func void @foo(ptr addrspace(4) noundef %param) #0 { +// CHECK-WITH-64: spir_func void @foo(ptr addrspace(4) noundef %param) addrspace(4) #0 { +// CHECK-WITH-32: spir_func void @foo(ptr addrspace(4) noundef %param) #0 { + // CHECK-WITHOUT: spir_func void @foo(ptr noundef %param) #0 { void foo(int *param) { } diff --git a/clang/test/OpenMP/spirv_variant_match.cpp b/clang/test/OpenMP/spirv_variant_match.cpp index b37858bc3008b..4cef789ff79dd 100644 --- a/clang/test/OpenMP/spirv_variant_match.cpp +++ b/clang/test/OpenMP/spirv_variant_match.cpp @@ -35,7 +35,7 @@ int foo() { return 1; } // CHECK-DAG: define{{.*}} @{{"_Z[0-9]+foo\$ompvariant\$.*"}}() -// CHECK-DAG: call spir_func noundef i32 @{{"_Z[0-9]+foo\$ompvariant\$.*"}}() +// CHECK-DAG: call spir_func noundef addrspace(4) i32 @{{"_Z[0-9]+foo\$ompvariant\$.*"}}() int main() { int res; diff --git a/llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp b/llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp index e0bfb77f4b530..2d79cec68a6b2 100644 --- a/llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp @@ -77,6 +77,9 @@ static std::string computeDataLayout(const Triple &TT) { TT.getOS() == Triple::OSType::AMDHSA) return "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-" "v512:512-v1024:1024-n32:64-S32-G1-P4-A0"; + if (TT.getVendor() == Triple::VendorType::Intel) + return "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-" + "v512:512-v1024:1024-n8:16:32:64-G1-P4-A0"; return "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-" "v512:512-v1024:1024-n8:16:32:64-G1"; } From 51d554ec341511e58cebf37dff23fe76a1e38fb0 Mon Sep 17 00:00:00 2001 From: "Sarnie, Nick" Date: Wed, 3 Sep 2025 07:33:33 -0700 Subject: [PATCH 2/2] use 9 for program AS, enable function ptr ext by default Signed-off-by: Sarnie, Nick --- clang/lib/Basic/Targets/SPIR.h | 2 +- clang/test/CodeGenSPIRV/spirv-intel.c | 2 +- clang/test/OpenMP/spirv_variant_match.cpp | 2 +- llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp | 4 ++++ llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp | 2 +- 5 files changed, 8 insertions(+), 4 deletions(-) diff --git a/clang/lib/Basic/Targets/SPIR.h b/clang/lib/Basic/Targets/SPIR.h index d6d489600db67..22b2799518dd0 100644 --- a/clang/lib/Basic/Targets/SPIR.h +++ b/clang/lib/Basic/Targets/SPIR.h @@ -477,7 +477,7 @@ class LLVM_LIBRARY_VISIBILITY SPIRV64IntelTargetInfo final assert(Triple.getVendor() == llvm::Triple::VendorType::Intel && "64-bit Intel SPIR-V target must use Intel vendor"); resetDataLayout("e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-" - "v256:256-v512:512-v1024:1024-n8:16:32:64-G1-P4-A0"); + "v256:256-v512:512-v1024:1024-n8:16:32:64-G1-P9-A0"); } }; } // namespace targets diff --git a/clang/test/CodeGenSPIRV/spirv-intel.c b/clang/test/CodeGenSPIRV/spirv-intel.c index 84d828a86aedb..997cd6f10b90c 100644 --- a/clang/test/CodeGenSPIRV/spirv-intel.c +++ b/clang/test/CodeGenSPIRV/spirv-intel.c @@ -3,7 +3,7 @@ // RUN: %clang_cc1 -triple spir-intel %s -emit-llvm -o - | FileCheck -check-prefix=CHECK-WITHOUT %s // RUN: %clang_cc1 -triple spir64-intel %s -emit-llvm -o - | FileCheck -check-prefix=CHECK-WITHOUT %s -// CHECK-WITH-64: spir_func void @foo(ptr addrspace(4) noundef %param) addrspace(4) #0 { +// CHECK-WITH-64: spir_func void @foo(ptr addrspace(4) noundef %param) addrspace(9) #0 { // CHECK-WITH-32: spir_func void @foo(ptr addrspace(4) noundef %param) #0 { // CHECK-WITHOUT: spir_func void @foo(ptr noundef %param) #0 { diff --git a/clang/test/OpenMP/spirv_variant_match.cpp b/clang/test/OpenMP/spirv_variant_match.cpp index 4cef789ff79dd..7dcee7e06ef1a 100644 --- a/clang/test/OpenMP/spirv_variant_match.cpp +++ b/clang/test/OpenMP/spirv_variant_match.cpp @@ -35,7 +35,7 @@ int foo() { return 1; } // CHECK-DAG: define{{.*}} @{{"_Z[0-9]+foo\$ompvariant\$.*"}}() -// CHECK-DAG: call spir_func noundef addrspace(4) i32 @{{"_Z[0-9]+foo\$ompvariant\$.*"}}() +// CHECK-DAG: call spir_func noundef addrspace(9) i32 @{{"_Z[0-9]+foo\$ompvariant\$.*"}}() int main() { int res; diff --git a/llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp b/llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp index 690493fb426bc..c6683849b8b65 100644 --- a/llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp @@ -90,6 +90,10 @@ SPIRVSubtarget::SPIRVSubtarget(const Triple &TT, const std::string &CPU, else Env = Unknown; + // Set the default extensions based on the target triple. + if (TargetTriple.getVendor() == Triple::Intel) + Extensions.insert(SPIRV::Extension::SPV_INTEL_function_pointers); + // The order of initialization is important. initAvailableExtensions(Extensions); initAvailableExtInstSets(); diff --git a/llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp b/llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp index 2d79cec68a6b2..6aaa82b071d28 100644 --- a/llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp @@ -79,7 +79,7 @@ static std::string computeDataLayout(const Triple &TT) { "v512:512-v1024:1024-n32:64-S32-G1-P4-A0"; if (TT.getVendor() == Triple::VendorType::Intel) return "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-" - "v512:512-v1024:1024-n8:16:32:64-G1-P4-A0"; + "v512:512-v1024:1024-n8:16:32:64-G1-P9-A0"; return "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-" "v512:512-v1024:1024-n8:16:32:64-G1"; }