diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index d6dcb3f15ae7c..46fc8856640de 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -3002,9 +3002,12 @@ bool SelectionDAG::isSplatValue(SDValue V, const APInt &DemandedElts, APInt UndefLHS, UndefRHS; SDValue LHS = V.getOperand(0); SDValue RHS = V.getOperand(1); + // Only propagate common undef elts for both operands, otherwise we might + // fail to handle binop-specific undef handling. + // e.g. (and undef, 0) -> 0 etc. if (isSplatValue(LHS, DemandedElts, UndefLHS, Depth + 1) && isSplatValue(RHS, DemandedElts, UndefRHS, Depth + 1)) { - UndefElts = UndefLHS | UndefRHS; + UndefElts = UndefLHS & UndefRHS; return true; } return false; diff --git a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-buildvec-of-binop.ll b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-buildvec-of-binop.ll index dbbb8362144ca..3df63b4de82e3 100644 --- a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-buildvec-of-binop.ll +++ b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-buildvec-of-binop.ll @@ -452,8 +452,7 @@ define void @buggy(i32 %0) #0 { ; RV64-NEXT: vsetivli zero, 4, e32, m1, ta, ma ; RV64-NEXT: vmv.v.x v8, a0 ; RV64-NEXT: vor.vi v8, v8, 1 -; RV64-NEXT: vrgather.vi v9, v8, 0 -; RV64-NEXT: vse32.v v9, (zero) +; RV64-NEXT: vse32.v v8, (zero) ; RV64-NEXT: ret entry: %mul.us.us.i.3 = shl i32 %0, 1 diff --git a/llvm/test/CodeGen/X86/pr134602.ll b/llvm/test/CodeGen/X86/pr134602.ll index e4376cbeab10f..50efcde462532 100644 --- a/llvm/test/CodeGen/X86/pr134602.ll +++ b/llvm/test/CodeGen/X86/pr134602.ll @@ -2,7 +2,7 @@ ; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefix=X86 ; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=X64 -; FIXME: incorrect vector codegen due to bad handling of splats of binops containing undefs +; Test for incorrect vector codegen due to bad handling of splats of binops containing undefs define i32 @PR134602(i16 %a0) { ; X86-LABEL: PR134602: ; X86: # %bb.0: @@ -14,7 +14,16 @@ define i32 @PR134602(i16 %a0) { ; ; X64-LABEL: PR134602: ; X64: # %bb.0: -; X64-NEXT: xorl %eax, %eax +; X64-NEXT: movzwl %di, %eax +; X64-NEXT: movd %eax, %xmm0 +; X64-NEXT: por {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 +; X64-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[2,2,2,2,4,5,6,7] +; X64-NEXT: paddw %xmm0, %xmm1 +; X64-NEXT: movdqa %xmm1, %xmm0 +; X64-NEXT: psrld $16, %xmm0 +; X64-NEXT: paddw %xmm1, %xmm0 +; X64-NEXT: movd %xmm0, %eax +; X64-NEXT: cwtl ; X64-NEXT: retq %splat= insertelement <4 x i16> zeroinitializer, i16 %a0, i64 0 %mul = mul <4 x i16> %splat,