From 747dee93f23e64561639dc256b6bf9ce7e31ea10 Mon Sep 17 00:00:00 2001 From: Virginia Cangelosi Date: Mon, 14 Apr 2025 16:11:08 +0000 Subject: [PATCH] [AArch64] Add FPCR register usages to mop4 instructions Ensure all floating mop4 instructions implicitly use FPCR --- llvm/lib/Target/AArch64/SMEInstrFormats.td | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/llvm/lib/Target/AArch64/SMEInstrFormats.td b/llvm/lib/Target/AArch64/SMEInstrFormats.td index b611dddb0b045..d770aff22e9f1 100644 --- a/llvm/lib/Target/AArch64/SMEInstrFormats.td +++ b/llvm/lib/Target/AArch64/SMEInstrFormats.td @@ -5595,6 +5595,7 @@ class sme2_bf16_fp32_quarter_tile_outer_product { @@ -5758,6 +5759,7 @@ class sme2_fp16_quarter_tile_outer_product { @@ -5846,6 +5848,7 @@ class sme2_bf16_fp16_quarter_tile_outer_product { @@ -5899,6 +5902,7 @@ class sme2_fp32_quarter_tile_outer_product { @@ -5952,6 +5956,7 @@ class sme2_fp64_quarter_tile_outer_product { @@ -6005,6 +6010,7 @@ class sme2_fp16_fp32_quarter_tile_outer_product {