diff --git a/llvm/include/llvm/CodeGen/MachineUniformityAnalysis.h b/llvm/include/llvm/CodeGen/MachineUniformityAnalysis.h
index a9b5eaf41c3f8..e8c0dc9b43823 100644
--- a/llvm/include/llvm/CodeGen/MachineUniformityAnalysis.h
+++ b/llvm/include/llvm/CodeGen/MachineUniformityAnalysis.h
@@ -17,6 +17,7 @@
 #include "llvm/ADT/GenericUniformityInfo.h"
 #include "llvm/CodeGen/MachineCycleAnalysis.h"
 #include "llvm/CodeGen/MachineDominators.h"
+#include "llvm/CodeGen/MachinePassManager.h"
 #include "llvm/CodeGen/MachineSSAContext.h"
 
 namespace llvm {
@@ -51,6 +52,27 @@ class MachineUniformityAnalysisPass : public MachineFunctionPass {
   // TODO: verify analysis
 };
 
+class MachineUniformityAnalysis
+    : public AnalysisInfoMixin<MachineUniformityAnalysis> {
+  friend AnalysisInfoMixin<MachineUniformityAnalysis>;
+  static AnalysisKey Key;
+
+public:
+  using Result = MachineUniformityInfo;
+  Result run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM);
+};
+
+class MachineUniformityPrinterPass
+    : public PassInfoMixin<MachineUniformityAnalysis> {
+  raw_ostream &OS;
+
+public:
+  explicit MachineUniformityPrinterPass(raw_ostream &OS) : OS(OS) {}
+  PreservedAnalyses run(MachineFunction &MF,
+                        MachineFunctionAnalysisManager &MFAM);
+  static bool isRequired() { return true; }
+};
+
 } // namespace llvm
 
 #endif // LLVM_CODEGEN_MACHINEUNIFORMITYANALYSIS_H
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def b/llvm/include/llvm/Passes/MachinePassRegistry.def
index 8c22a28eba277..7861024356ee5 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -114,6 +114,7 @@ MACHINE_FUNCTION_ANALYSIS("machine-opt-remark-emitter",
 MACHINE_FUNCTION_ANALYSIS("machine-post-dom-tree",
                           MachinePostDominatorTreeAnalysis())
 MACHINE_FUNCTION_ANALYSIS("machine-trace-metrics", MachineTraceMetricsAnalysis())
+MACHINE_FUNCTION_ANALYSIS("machine-uniformity", MachineUniformityAnalysis())
 MACHINE_FUNCTION_ANALYSIS("pass-instrumentation", PassInstrumentationAnalysis(PIC))
 MACHINE_FUNCTION_ANALYSIS("regalloc-evict", RegAllocEvictionAdvisorAnalysis())
 MACHINE_FUNCTION_ANALYSIS("regalloc-priority", RegAllocPriorityAdvisorAnalysis())
@@ -178,6 +179,8 @@ MACHINE_FUNCTION_PASS("print<machine-dom-tree>",
 MACHINE_FUNCTION_PASS("print<machine-loops>", MachineLoopPrinterPass(errs()))
 MACHINE_FUNCTION_PASS("print<machine-post-dom-tree>",
                       MachinePostDominatorTreePrinterPass(errs()))
+MACHINE_FUNCTION_PASS("print<machine-uniformity>",
+                      MachineUniformityPrinterPass(errs()))
 MACHINE_FUNCTION_PASS("print<slot-indexes>", SlotIndexesPrinterPass(errs()))
 MACHINE_FUNCTION_PASS("print<virtregmap>", VirtRegMapPrinterPass(errs()))
 MACHINE_FUNCTION_PASS("reg-usage-collector", RegUsageInfoCollectorPass())
@@ -302,11 +305,9 @@ DUMMY_MACHINE_FUNCTION_PASS("lrshrink", LiveRangeShrinkPass)
 DUMMY_MACHINE_FUNCTION_PASS("machine-combiner", MachineCombinerPass)
 DUMMY_MACHINE_FUNCTION_PASS("static-data-splitter", StaticDataSplitter)
 DUMMY_MACHINE_FUNCTION_PASS("machine-function-splitter", MachineFunctionSplitterPass)
-DUMMY_MACHINE_FUNCTION_PASS("machine-uniformity", MachineUniformityInfoWrapperPass)
 DUMMY_MACHINE_FUNCTION_PASS("machineinstr-printer", MachineFunctionPrinterPass)
 DUMMY_MACHINE_FUNCTION_PASS("mirfs-discriminators", MIRAddFSDiscriminatorsPass)
 DUMMY_MACHINE_FUNCTION_PASS("postra-machine-sink", PostRAMachineSinkingPass)
-DUMMY_MACHINE_FUNCTION_PASS("print-machine-uniformity", MachineUniformityInfoPrinterPass)
 DUMMY_MACHINE_FUNCTION_PASS("processimpdefs", ProcessImplicitDefsPass)
 DUMMY_MACHINE_FUNCTION_PASS("prologepilog", PrologEpilogInserterPass)
 DUMMY_MACHINE_FUNCTION_PASS("prologepilog-code", PrologEpilogCodeInserterPass)
diff --git a/llvm/lib/CodeGen/MachineUniformityAnalysis.cpp b/llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
index 8c95dc71d4e21..e4b82ce83fda6 100644
--- a/llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
+++ b/llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
@@ -8,6 +8,7 @@
 
 #include "llvm/CodeGen/MachineUniformityAnalysis.h"
 #include "llvm/ADT/GenericUniformityImpl.h"
+#include "llvm/Analysis/TargetTransformInfo.h"
 #include "llvm/CodeGen/MachineCycleAnalysis.h"
 #include "llvm/CodeGen/MachineDominators.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
@@ -177,6 +178,32 @@ class MachineUniformityInfoPrinterPass : public MachineFunctionPass {
 
 } // namespace
 
+AnalysisKey MachineUniformityAnalysis::Key;
+
+MachineUniformityAnalysis::Result
+MachineUniformityAnalysis::run(MachineFunction &MF,
+                               MachineFunctionAnalysisManager &MFAM) {
+  auto &DomTree = MFAM.getResult<MachineDominatorTreeAnalysis>(MF);
+  auto &CI = MFAM.getResult<MachineCycleAnalysis>(MF);
+  auto &FAM = MFAM.getResult<FunctionAnalysisManagerMachineFunctionProxy>(MF)
+                  .getManager();
+  auto &F = MF.getFunction();
+  auto &TTI = FAM.getResult<TargetIRAnalysis>(F);
+  return computeMachineUniformityInfo(MF, CI, DomTree,
+                                      TTI.hasBranchDivergence(&F));
+}
+
+PreservedAnalyses
+MachineUniformityPrinterPass::run(MachineFunction &MF,
+                                  MachineFunctionAnalysisManager &MFAM) {
+  auto &MUI = MFAM.getResult<MachineUniformityAnalysis>(MF);
+  OS << "MachineUniformityInfo for function: ";
+  MF.getFunction().printAsOperand(OS, /*PrintType=*/false);
+  OS << '\n';
+  MUI.print(OS);
+  return PreservedAnalyses::all();
+}
+
 char MachineUniformityAnalysisPass::ID = 0;
 
 MachineUniformityAnalysisPass::MachineUniformityAnalysisPass()
@@ -209,8 +236,9 @@ bool MachineUniformityAnalysisPass::runOnMachineFunction(MachineFunction &MF) {
 
 void MachineUniformityAnalysisPass::print(raw_ostream &OS,
                                           const Module *) const {
-  OS << "MachineUniformityInfo for function: " << UI.getFunction().getName()
-     << "\n";
+  OS << "MachineUniformityInfo for function: ";
+  UI.getFunction().getFunction().printAsOperand(OS, /*PrintType=*/false);
+  OS << '\n';
   UI.print(OS);
 }
 
diff --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp
index e7057d9a6b625..4edd352489d16 100644
--- a/llvm/lib/Passes/PassBuilder.cpp
+++ b/llvm/lib/Passes/PassBuilder.cpp
@@ -133,6 +133,7 @@
 #include "llvm/CodeGen/MachineScheduler.h"
 #include "llvm/CodeGen/MachineSink.h"
 #include "llvm/CodeGen/MachineTraceMetrics.h"
+#include "llvm/CodeGen/MachineUniformityAnalysis.h"
 #include "llvm/CodeGen/MachineVerifier.h"
 #include "llvm/CodeGen/OptimizePHIs.h"
 #include "llvm/CodeGen/PHIElimination.h"
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir
index c4dd7adcf95af..1073ff6bf1d61 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir
@@ -1,10 +1,11 @@
 # NOTE: This file is Generic MIR translation of test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll test file
 # RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
 ---
 name:            readfirstlane
 body:             |
   bb.1:
-    ; CHECK-LABEL: MachineUniformityInfo for function: readfirstlane
+    ; CHECK-LABEL: MachineUniformityInfo for function:  @readfirstlane
     ; CHECK: DIVERGENT: %{{[0-9]+}}
     ; CHECK-SAME:llvm.amdgcn.workitem.id.x
     ; CHECK-NOT: DIVERGENT: {{.*}}llvm.amdgcn.readfirstlane
@@ -19,7 +20,7 @@ name:            icmp
 body:             |
   bb.1:
     liveins: $sgpr4_sgpr5
-    ; CHECK-LABEL: MachineUniformityInfo for function: icmp
+    ; CHECK-LABEL: MachineUniformityInfo for function:  @icmp
     ; CHECK-NEXT: ALL VALUES UNIFORM
 
     %3:_(p4) = COPY $sgpr4_sgpr5
@@ -39,7 +40,7 @@ name:            fcmp
 body:             |
   bb.1:
     liveins: $sgpr4_sgpr5
-    ; CHECK-LABEL: MachineUniformityInfo for function: fcmp
+    ; CHECK-LABEL: MachineUniformityInfo for function:  @fcmp
     ; CHECK-NEXT: ALL VALUES UNIFORM
 
     %3:_(p4) = COPY $sgpr4_sgpr5
@@ -62,7 +63,7 @@ name:            ballot
 body:             |
   bb.1:
     liveins: $sgpr4_sgpr5
-    ; CHECK-LABEL: MachineUniformityInfo for function: ballot
+    ; CHECK-LABEL: MachineUniformityInfo for function:  @ballot
     ; CHECK-NEXT: ALL VALUES UNIFORM
 
     %2:_(p4) = COPY $sgpr4_sgpr5
@@ -85,7 +86,7 @@ registers:
 body:             |
   bb.0:
     liveins: $vgpr0
-    ; CHECK-LABEL: MachineUniformityInfo for function: asm_sgpr
+    ; CHECK-LABEL: MachineUniformityInfo for function:  @asm_sgpr
     ; CHECK-NOT: DIVERGENT: %1
 
     %0:_(s32) = COPY $vgpr0
@@ -112,7 +113,7 @@ frameInfo:
 body:             |
   bb.0:
     liveins: $vgpr0
-    ; CHECK-LABEL: MachineUniformityInfo for function: asm_mixed_sgpr_vgpr
+    ; CHECK-LABEL: MachineUniformityInfo for function:  @asm_mixed_sgpr_vgpr
     ; CHECK: DIVERGENT: %0:
     ; CHECK: DIVERGENT: %3:
     ; CHECK-NOT: DIVERGENT: %1:
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform.mir
index 6e1b5d641a8b7..f5161bbddc795 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform.mir
@@ -1,4 +1,5 @@
 # RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
 
 # readlane, readfirstlane is always uniform
 
@@ -8,7 +9,7 @@ machineFunctionInfo:
   isEntryFunction: true
 body:             |
   bb.0:
-    ; CHECK-LABEL: MachineUniformityInfo for function: readlane
+    ; CHECK-LABEL: MachineUniformityInfo for function:  @readlane
     ; CHECK-NEXT: ALL VALUES UNIFORM
     %0:vgpr_32 = IMPLICIT_DEF
     %1:vgpr_32 = IMPLICIT_DEF
@@ -26,7 +27,7 @@ machineFunctionInfo:
   isEntryFunction: true
 body:             |
   bb.0:
-    ; CHECK-LABEL: MachineUniformityInfo for function: readlane2
+    ; CHECK-LABEL: MachineUniformityInfo for function:  @readlane2
     ; CHECK-NEXT: ALL VALUES UNIFORM
     %0:vgpr_32 = IMPLICIT_DEF
     %1:vgpr_32 = IMPLICIT_DEF
@@ -47,7 +48,7 @@ machineFunctionInfo:
   isEntryFunction: true
 body:             |
   bb.0:
-    ; CHECK-LABEL: MachineUniformityInfo for function: sgprcopy
+    ; CHECK-LABEL: MachineUniformityInfo for function:  @sgprcopy
     ; CHECK-NEXT: ALL VALUES UNIFORM
     liveins: $sgpr0,$sgpr1,$vgpr0
     %0:sgpr_32 = COPY $sgpr0
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics-gmir.mir
index f2ba7f8b21932..6729faf233c35 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics-gmir.mir
@@ -1,4 +1,5 @@
 # RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
 
 ---
 name:            test1
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics.mir
index 1bcdf20ae64ce..432582197f652 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics.mir
@@ -1,11 +1,12 @@
 # RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
 
 ---
 name:            test1
 tracksRegLiveness: true
 body:             |
   bb.0:
-    ; CHECK-LABEL: MachineUniformityInfo for function: test1
+    ; CHECK-LABEL: MachineUniformityInfo for function:  @test1
     %2:vgpr_32 = IMPLICIT_DEF
     %1:vgpr_32 = IMPLICIT_DEF
     %0:vgpr_32 = IMPLICIT_DEF
@@ -25,7 +26,7 @@ name:            test2
 tracksRegLiveness: true
 body:             |
   bb.0:
-    ; CHECK-LABEL: MachineUniformityInfo for function: test2
+    ; CHECK-LABEL: MachineUniformityInfo for function:  @test2
     %3:vgpr_32 = IMPLICIT_DEF
     %2:vgpr_32 = IMPLICIT_DEF
     %1:vgpr_32 = IMPLICIT_DEF
@@ -48,7 +49,7 @@ name:            atomic_inc
 tracksRegLiveness: true
 body:             |
   bb.0:
-  ; CHECK-LABEL: MachineUniformityInfo for function: atomic_inc
+  ; CHECK-LABEL: MachineUniformityInfo for function:  @atomic_inc
     %2:vgpr_32 = IMPLICIT_DEF
     %1:vgpr_32 = IMPLICIT_DEF
     %0:vgpr_32 = IMPLICIT_DEF
@@ -65,7 +66,7 @@ name:            atomic_inc_64
 tracksRegLiveness: true
 body:             |
   bb.0:
-  ; CHECK-LABEL: MachineUniformityInfo for function: atomic_inc_64
+  ; CHECK-LABEL: MachineUniformityInfo for function:  @atomic_inc_64
     %3:vgpr_32 = IMPLICIT_DEF
     %2:vgpr_32 = IMPLICIT_DEF
     %1:vgpr_32 = IMPLICIT_DEF
@@ -88,7 +89,7 @@ name:            atomic_dec
 tracksRegLiveness: true
 body:             |
   bb.0:
-  ; CHECK-LABEL: MachineUniformityInfo for function: atomic_dec
+  ; CHECK-LABEL: MachineUniformityInfo for function:  @atomic_dec
     %2:vgpr_32 = IMPLICIT_DEF
     %1:vgpr_32 = IMPLICIT_DEF
     %0:vgpr_32 = IMPLICIT_DEF
@@ -106,7 +107,7 @@ name:            atomic_dec_64
 tracksRegLiveness: true
 body:             |
   bb.0:
-  ; CHECK-LABEL: MachineUniformityInfo for function: atomic_dec_64
+  ; CHECK-LABEL: MachineUniformityInfo for function:  @atomic_dec_64
     %3:vgpr_32 = IMPLICIT_DEF
     %2:vgpr_32 = IMPLICIT_DEF
     %1:vgpr_32 = IMPLICIT_DEF
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/control-flow-intrinsics.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/control-flow-intrinsics.mir
index dec55e5662c8c..4da7c4381c7e6 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/control-flow-intrinsics.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/control-flow-intrinsics.mir
@@ -1,9 +1,10 @@
 # RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
 
 ---
 name:            f1
 body:             |
-  ; CHECK-LABEL: MachineUniformityInfo for function: f1
+  ; CHECK-LABEL: MachineUniformityInfo for function:  @f1
   bb.0:
     successors: %bb.1, %bb.2
 
@@ -23,7 +24,7 @@ body:             |
 ---
 name:            f2
 body:             |
-  ; CHECK-LABEL: MachineUniformityInfo for function: f2
+  ; CHECK-LABEL: MachineUniformityInfo for function:  @f2
   bb.0:
     successors: %bb.1, %bb.2
 
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
index 9694a340b5e90..27c53815feb06 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
@@ -1,5 +1,6 @@
 # RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# CHECK-LABEL: MachineUniformityInfo for function: hidden_diverge
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
+# CHECK-LABEL: MachineUniformityInfo for function:  @hidden_diverge
 # CHECK-LABEL: BLOCK bb.0
 # CHECK:     DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.workitem.id.x)
 # CHECK:     DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s1) = G_ICMP intpred(slt)
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir
index 2d01ab1269d61..fd811e276c593 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir
@@ -1,5 +1,6 @@
 # RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# CHECK-LABEL: MachineUniformityInfo for function: hidden_loop_diverge
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
+# CHECK-LABEL: MachineUniformityInfo for function:  @hidden_loop_diverge
 
 # CHECK-LABEL: BLOCK bb.0
 # CHECK-NOT: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s1) = G_ICMP intpred(slt), %{{[0-9]*}}:_(s32), %{{[0-9]*}}:_
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/branch-outside-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/branch-outside-gmir.mir
index 1011f9b411f82..029d87b7ede6a 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/branch-outside-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/branch-outside-gmir.mir
@@ -1,6 +1,7 @@
 # RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
 
-# CHECK-LABEL: MachineUniformityInfo for function: basic
+# CHECK-LABEL: MachineUniformityInfo for function:  @basic
 # CHECK-NEXT: CYCLES ASSSUMED DIVERGENT:
 # CHECK-NEXT: depth=1: entries(bb.1 bb.3) bb.2
 # CHECK-LABEL: BLOCK bb.1
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir
index cb1fbbc28d5e1..524ea4e920cd8 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir
@@ -1,5 +1,6 @@
 # RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# CHECK-LABEL: MachineUniformityInfo for function: divergent_cycle_1
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
+# CHECK-LABEL: MachineUniformityInfo for function:  @divergent_cycle_1
 # CHECK-NEXT: CYCLES ASSSUMED DIVERGENT:
 # CHECK-NEXT: depth=1: entries(bb.3 bb.1) bb.4 bb.2
 # CHECK-NEXT: CYCLES WITH DIVERGENT EXIT:
@@ -60,7 +61,7 @@ body:             |
     S_ENDPGM 0
 ...
 
-# CHECK-LABEL: MachineUniformityInfo for function: uniform_cycle_1
+# CHECK-LABEL: MachineUniformityInfo for function:  @uniform_cycle_1
 ---
 name:            uniform_cycle_1
 tracksRegLiveness: true
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/exit-divergence-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/exit-divergence-gmir.mir
index b637a9d9350b9..63e0e785ba47a 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/exit-divergence-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/exit-divergence-gmir.mir
@@ -1,5 +1,6 @@
 # RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# CHECK-LABEL: MachineUniformityInfo for function: basic
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
+# CHECK-LABEL: MachineUniformityInfo for function:  @basic
 # CHECK-NOT: CYCLES ASSSUMED DIVERGENT:
 # CHECK: CYCLES WITH DIVERGENT EXIT:
 # CHECK: depth=1: entries(bb.1 bb.3) bb.2
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/irreducible-2-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/irreducible-2-gmir.mir
index dcaaf6e1aa59b..7050f6dd22105 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/irreducible-2-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/irreducible-2-gmir.mir
@@ -1,11 +1,12 @@
 # RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
 
 #        bb0(div)
 #       /    \
 #     bb1 <-> bb2
 #              |
 #             bb3
-# CHECK-LABEL: MachineUniformityInfo for function: cycle_diverge_enter
+# CHECK-LABEL: MachineUniformityInfo for function:  @cycle_diverge_enter
 # CHECK-NEXT: CYCLES ASSSUMED DIVERGENT:
 # CHECK-NEXT: depth=1: entries(bb.2 bb.1)
 # CHECK-NEXT: CYCLES WITH DIVERGENT EXIT:
@@ -46,7 +47,7 @@ body:             |
 ...
 
 
-# CHECK-LABEL: MachineUniformityInfo for function: cycle_diverge_exit
+# CHECK-LABEL: MachineUniformityInfo for function:  @cycle_diverge_exit
 # CHECK: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s32), %{{[0-9]*}}:_(s1) = G_UADDO %8:_, %{{[0-9]*}}:_
 #        bb0
 #       /    \
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/join-loopexit-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/join-loopexit-gmir.mir
index 4a1511b0baec2..ffafb9b3ba633 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/join-loopexit-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/join-loopexit-gmir.mir
@@ -1,5 +1,6 @@
 # RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
-# CHECK-LABEL: MachineUniformityInfo for function: test
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
+# CHECK-LABEL: MachineUniformityInfo for function:  @test
 
 # CHECK-LABEL: BLOCK bb.0
 # CHECK: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s1) = G_ICMP intpred(eq), %{{[0-9]*}}:_(s32), %{{[0-9]*}}:_
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/loads-gmir.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/loads-gmir.mir
index 4f20f4b433e1b..a8f853ade9968 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/loads-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/loads-gmir.mir
@@ -1,4 +1,5 @@
 # RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
 
 ---
 name:            loads
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform.mir
index f7c874be87d36..3ef1c46dd1b2d 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform.mir
@@ -1,4 +1,5 @@
 # RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
 # loads from flat non uniform
 ---
 name:            flatloads
@@ -8,7 +9,7 @@ machineFunctionInfo:
 
 body:             |
   bb.0:
-    ; CHECK-LABEL: MachineUniformityInfo for function: flatloads
+    ; CHECK-LABEL: MachineUniformityInfo for function:  @flatloads
     ; CHECK: DIVERGENT: %1
     ; CHECK-NOT: DIVERGENT: %2
     %0:vreg_64 = IMPLICIT_DEF
@@ -27,7 +28,7 @@ machineFunctionInfo:
 
 body:             |
   bb.0:
-    ; CHECK-LABEL: MachineUniformityInfo for function: scratchloads
+    ; CHECK-LABEL: MachineUniformityInfo for function:  @scratchloads
     ; CHECK: DIVERGENT: %1
     %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
     %1:vgpr_32 = SCRATCH_LOAD_DWORD %0, 0, 0, implicit $exec, implicit $flat_scr :: (load (s32), addrspace 5)
@@ -43,7 +44,7 @@ machineFunctionInfo:
 
 body:             |
   bb.0:
-    ; CHECK-LABEL: MachineUniformityInfo for function: globalloads
+    ; CHECK-LABEL: MachineUniformityInfo for function:  @globalloads
     ; CHECK: DIVERGENT: %2
     ; CHECK-NOT: DIVERGENT: %3
     %0:vreg_64 = IMPLICIT_DEF
@@ -63,7 +64,7 @@ machineFunctionInfo:
 
 body:             |
   bb.0:
-    ; CHECK-LABEL: MachineUniformityInfo for function: dsreads
+    ; CHECK-LABEL: MachineUniformityInfo for function:  @dsreads
     ; CHECK-NEXT: ALL VALUES UNIFORM
     %0:vreg_64 = IMPLICIT_DEF
     $m0 = S_MOV_B32 0
@@ -79,7 +80,7 @@ machineFunctionInfo:
   isEntryFunction: true
 body:             |
   bb.0:
-    ; CHECK-LABEL: MachineUniformityInfo for function: sgprcopy
+    ; CHECK-LABEL: MachineUniformityInfo for function:  @sgprcopy
     ; CHECK: DIVERGENT: %2
     liveins: $sgpr0,$sgpr1,$vgpr0
     %0:sgpr_32 = COPY $sgpr0
@@ -95,7 +96,7 @@ machineFunctionInfo:
   isEntryFunction: true
 body:             |
   bb.0:
-    ; CHECK-LABEL: MachineUniformityInfo for function: writelane
+    ; CHECK-LABEL: MachineUniformityInfo for function:  @writelane
     ; CHECK: DIVERGENT: %4
 
     ; Note how %5 is the result of a vector compare, but it is reported as
@@ -123,7 +124,7 @@ name:            physicalreg
 tracksRegLiveness: true
 body:             |
   bb.0:
-    ; CHECK-LABEL: MachineUniformityInfo for function: physicalreg
+    ; CHECK-LABEL: MachineUniformityInfo for function:  @physicalreg
     ; CHECK: DIVERGENT: %0
     ; CHECK: DIVERGENT: %1
     ; CHECK: DIVERGENT: %2
@@ -147,7 +148,7 @@ machineFunctionInfo:
   isEntryFunction: true
 body:             |
   bb.0:
-    ; CHECK-LABEL: MachineUniformityInfo for function: mbcnt_lo
+    ; CHECK-LABEL: MachineUniformityInfo for function:  @mbcnt_lo
     ; CHECK: DIVERGENT: %0
     %0:vgpr_32 = V_MBCNT_LO_U32_B32_e64 -1, 0, implicit $exec
     S_ENDPGM 0
@@ -158,7 +159,7 @@ machineFunctionInfo:
   isEntryFunction: true
 body:             |
   bb.0:
-    ; CHECK-LABEL: MachineUniformityInfo for function: mbcnt_hi
+    ; CHECK-LABEL: MachineUniformityInfo for function:  @mbcnt_hi
     ; CHECK: DIVERGENT: %0
     %0:vgpr_32 = V_MBCNT_HI_U32_B32_e64 -1, 0, implicit $exec
     S_ENDPGM 0
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/temporal-divergence.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/temporal-divergence.mir
index 7bff87c09b3c9..a0f637b24e5ab 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/temporal-divergence.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/temporal-divergence.mir
@@ -1,7 +1,8 @@
 # RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
 
 ---
-# CHECK-LABEL: MachineUniformityInfo for function: temporal_diverge
+# CHECK-LABEL: MachineUniformityInfo for function:  @temporal_diverge
 name:            temporal_diverge
 alignment:       1
 legalized:       true
@@ -40,7 +41,7 @@ body:             |
 
 ...
 ---
-# CHECK-LABEL: MachineUniformityInfo for function: phi_at_exit
+# CHECK-LABEL: MachineUniformityInfo for function:  @phi_at_exit
 name:            phi_at_exit
 alignment:       1
 legalized:       true
@@ -98,7 +99,7 @@ body:             |
 
 ...
 ---
-# CHECK-LABEL: MachineUniformityInfo for function: phi_after_exit
+# CHECK-LABEL: MachineUniformityInfo for function:  @phi_after_exit
 name:            phi_after_exit
 alignment:       1
 legalized:       true
@@ -156,7 +157,7 @@ body:             |
 
 ...
 ---
-# CHECK-LABEL: MachineUniformityInfo for function: temporal_diverge_inloop
+# CHECK-LABEL: MachineUniformityInfo for function:  @temporal_diverge_inloop
 name:            temporal_diverge_inloop
 alignment:       1
 legalized:       true
@@ -210,7 +211,7 @@ body:             |
 
 ...
 ---
-# CHECK-LABEL: MachineUniformityInfo for function: temporal_uniform_indivloop
+# CHECK-LABEL: MachineUniformityInfo for function:  @temporal_uniform_indivloop
 name:            temporal_uniform_indivloop
 alignment:       1
 legalized:       true
@@ -264,7 +265,7 @@ body:             |
 
 ...
 ---
-# CHECK-LABEL: MachineUniformityInfo for function: temporal_diverge_loopuser
+# CHECK-LABEL: MachineUniformityInfo for function:  @temporal_diverge_loopuser
 name:            temporal_diverge_loopuser
 alignment:       1
 legalized:       true
@@ -319,7 +320,7 @@ body:             |
 
 ...
 ---
-# CHECK-LABEL: MachineUniformityInfo for function: temporal_diverge_loopuser_nested
+# CHECK-LABEL: MachineUniformityInfo for function:  @temporal_diverge_loopuser_nested
 name:            temporal_diverge_loopuser_nested
 alignment:       1
 legalized:       true
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/uses-value-from-cycle.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/uses-value-from-cycle.mir
index c1acbb3a1575d..c4e801af326b1 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/uses-value-from-cycle.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/uses-value-from-cycle.mir
@@ -1,9 +1,10 @@
 # RUN: llc -mtriple=amdgcn-- -mcpu=gfx1030 -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -mcpu=gfx1030 -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
 ---
 name:            f1
 tracksRegLiveness: true
 body:             |
-  ; CHECK-LABEL: MachineUniformityInfo for function: f1
+  ; CHECK-LABEL: MachineUniformityInfo for function:  @f1
   bb.1:
     %3:_(s32) = G_CONSTANT i32 0
     %25:_(s32) = G_IMPLICIT_DEF
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/hidden-diverge.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/hidden-diverge.mir
index d1a61100a14cb..7d3eaee02c387 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/hidden-diverge.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/hidden-diverge.mir
@@ -1,4 +1,5 @@
 # RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
 
 # This test was generated using SelectionDAG, where the compilation flow does
 # not match the assumptions made in MachineUA. For now, this test mostly serves
@@ -6,7 +7,7 @@
 # be deleted when it is clear that it is not actually testing anything useful.
 
 ---
-# CHECK-LABEL: MachineUniformityInfo for function: hidden_diverge
+# CHECK-LABEL: MachineUniformityInfo for function:  @hidden_diverge
 # CHECK-LABEL: BLOCK bb.0
 # CHECK: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:vgpr_32(s32) = COPY $vgpr0
 # CHECK-LABEL: BLOCK bb.2
diff --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/irreducible-1.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/irreducible-1.mir
index f784f05e12832..97dfbd05cf242 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/irreducible-1.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/irreducible-1.mir
@@ -1,11 +1,12 @@
 # RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-- -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
 
 # This test was generated using SelectionDAG, where the compilation flow does
 # not match the assumptions made in MachineUA. For now, this test mostly serves
 # the purpose of catching in any crash when invoking MachineUA. The test should
 # be deleted when it is clear that it is not actually testing anything useful.
 
-# CHECK-LABEL: MachineUniformityInfo for function: irreducible
+# CHECK-LABEL: MachineUniformityInfo for function:  @irreducible
 
 ---
 name:            irreducible