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[RISCV] Rename XCValu intrinsic name *_slet(u) to *_sle(u)) #138498

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Merged
merged 1 commit into from
May 6, 2025
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[RISCV] Rename XCValu intrinsic name *_slet(u) to *_sle(u)) #138498

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4 changes: 2 additions & 2 deletions clang/include/clang/Basic/BuiltinsRISCVXCV.td
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Original file line number Diff line number Diff line change
Expand Up @@ -21,8 +21,8 @@ let Attributes = [NoThrow, Const] in {
//===----------------------------------------------------------------------===//
// XCValu extension.
//===----------------------------------------------------------------------===//
def alu_slet : RISCVXCVBuiltin<"int(int, int)", "xcvalu">;
def alu_sletu : RISCVXCVBuiltin<"int(unsigned int, unsigned int)", "xcvalu">;
def alu_sle : RISCVXCVBuiltin<"int(int, int)", "xcvalu">;
def alu_sleu : RISCVXCVBuiltin<"int(unsigned int, unsigned int)", "xcvalu">;
def alu_exths : RISCVXCVBuiltin<"int(int)", "xcvalu">;
def alu_exthz : RISCVXCVBuiltin<"unsigned int(unsigned int)", "xcvalu">;
def alu_extbs : RISCVXCVBuiltin<"int(int)", "xcvalu">;
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4 changes: 2 additions & 2 deletions clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
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Expand Up @@ -388,10 +388,10 @@ Value *CodeGenFunction::EmitRISCVBuiltinExpr(unsigned BuiltinID,
case RISCV::BI__builtin_riscv_cv_alu_exthz:
return Builder.CreateZExt(Builder.CreateTrunc(Ops[0], Int16Ty), Int32Ty,
"exthz");
case RISCV::BI__builtin_riscv_cv_alu_slet:
case RISCV::BI__builtin_riscv_cv_alu_sle:
return Builder.CreateZExt(Builder.CreateICmpSLE(Ops[0], Ops[1]), Int32Ty,
"sle");
case RISCV::BI__builtin_riscv_cv_alu_sletu:
case RISCV::BI__builtin_riscv_cv_alu_sleu:
return Builder.CreateZExt(Builder.CreateICmpULE(Ops[0], Ops[1]), Int32Ty,
"sleu");
case RISCV::BI__builtin_riscv_cv_alu_subN:
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8 changes: 4 additions & 4 deletions clang/lib/Headers/riscv_corev_alu.h
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Expand Up @@ -24,13 +24,13 @@ static __inline__ long __DEFAULT_FN_ATTRS __riscv_cv_abs(long a) {
return __builtin_abs(a);
}

static __inline__ long __DEFAULT_FN_ATTRS __riscv_cv_alu_slet(long a, long b) {
return __builtin_riscv_cv_alu_slet(a, b);
static __inline__ long __DEFAULT_FN_ATTRS __riscv_cv_alu_sle(long a, long b) {
return __builtin_riscv_cv_alu_sle(a, b);
}

static __inline__ long __DEFAULT_FN_ATTRS
__riscv_cv_alu_sletu(unsigned long a, unsigned long b) {
return __builtin_riscv_cv_alu_sletu(a, b);
__riscv_cv_alu_sleu(unsigned long a, unsigned long b) {
return __builtin_riscv_cv_alu_sleu(a, b);
}

static __inline__ long __DEFAULT_FN_ATTRS __riscv_cv_alu_min(long a, long b) {
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12 changes: 6 additions & 6 deletions clang/test/CodeGen/RISCV/riscv-xcvalu-c-api.c
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Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@
#include <stdint.h>
#include <riscv_corev_alu.h>

// CHECK-LABEL: @test_alu_slet(
// CHECK-LABEL: @test_alu_sle(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[A_ADDR_I:%.*]] = alloca i32, align 4
// CHECK-NEXT: [[B_ADDR_I:%.*]] = alloca i32, align 4
Expand All @@ -23,11 +23,11 @@
// CHECK-NEXT: [[SLE_I:%.*]] = zext i1 [[TMP4]] to i32
// CHECK-NEXT: ret i32 [[SLE_I]]
//
int test_alu_slet(int32_t a, int32_t b) {
return __riscv_cv_alu_slet(a, b);
int test_alu_sle(int32_t a, int32_t b) {
return __riscv_cv_alu_sle(a, b);
}

// CHECK-LABEL: @test_alu_sletu(
// CHECK-LABEL: @test_alu_sleu(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[A_ADDR_I:%.*]] = alloca i32, align 4
// CHECK-NEXT: [[B_ADDR_I:%.*]] = alloca i32, align 4
Expand All @@ -45,8 +45,8 @@ int test_alu_slet(int32_t a, int32_t b) {
// CHECK-NEXT: [[SLEU_I:%.*]] = zext i1 [[TMP4]] to i32
// CHECK-NEXT: ret i32 [[SLEU_I]]
//
int test_alu_sletu(uint32_t a, uint32_t b) {
return __riscv_cv_alu_sletu(a, b);
int test_alu_sleu(uint32_t a, uint32_t b) {
return __riscv_cv_alu_sleu(a, b);
}

// CHECK-LABEL: @test_alu_min(
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12 changes: 6 additions & 6 deletions clang/test/CodeGen/RISCV/riscv-xcvalu.c
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Expand Up @@ -16,7 +16,7 @@ int test_abs(int a) {
return __builtin_abs(a);
}

// CHECK-LABEL: @test_alu_slet(
// CHECK-LABEL: @test_alu_sle(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
// CHECK-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
Expand All @@ -28,11 +28,11 @@ int test_abs(int a) {
// CHECK-NEXT: [[SLE:%.*]] = zext i1 [[TMP2]] to i32
// CHECK-NEXT: ret i32 [[SLE]]
//
int test_alu_slet(int32_t a, int32_t b) {
return __builtin_riscv_cv_alu_slet(a, b);
int test_alu_sle(int32_t a, int32_t b) {
return __builtin_riscv_cv_alu_sle(a, b);
}

// CHECK-LABEL: @test_alu_sletu(
// CHECK-LABEL: @test_alu_sleu(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
// CHECK-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
Expand All @@ -44,8 +44,8 @@ int test_alu_slet(int32_t a, int32_t b) {
// CHECK-NEXT: [[SLEU:%.*]] = zext i1 [[TMP2]] to i32
// CHECK-NEXT: ret i32 [[SLEU]]
//
int test_alu_sletu(uint32_t a, uint32_t b) {
return __builtin_riscv_cv_alu_sletu(a, b);
int test_alu_sleu(uint32_t a, uint32_t b) {
return __builtin_riscv_cv_alu_sleu(a, b);
}

// CHECK-LABEL: @test_alu_exths(
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8 changes: 4 additions & 4 deletions llvm/test/CodeGen/RISCV/xcvalu.ll
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Expand Up @@ -17,17 +17,17 @@ define i32 @abs(i32 %a) {
ret i32 %1
}

define i1 @slet(i32 %a, i32 %b) {
; CHECK-LABEL: slet:
define i1 @sle(i32 %a, i32 %b) {
; CHECK-LABEL: sle:
; CHECK: # %bb.0:
; CHECK-NEXT: cv.sle a0, a0, a1
; CHECK-NEXT: ret
%1 = icmp sle i32 %a, %b
ret i1 %1
}

define i1 @sletu(i32 %a, i32 %b) {
; CHECK-LABEL: sletu:
define i1 @sleu(i32 %a, i32 %b) {
; CHECK-LABEL: sleu:
; CHECK: # %bb.0:
; CHECK-NEXT: cv.sleu a0, a0, a1
; CHECK-NEXT: ret
Expand Down
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