diff --git a/llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll b/llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll
index 9d679779fed0e..1d20218440f6a 100644
--- a/llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll
+++ b/llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll
@@ -1,8 +1,8 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -verify-machineinstrs -amdgpu-enable-delay-alu=0 < %s | FileCheck %s -check-prefixes=GCN,GFX11,GFX11-TRUE16
 ; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -verify-machineinstrs -amdgpu-enable-delay-alu=0 < %s | FileCheck %s -check-prefixes=GCN,GFX11,GFX11-FAKE16
-; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -verify-machineinstrs -amdgpu-enable-delay-alu=0 -enable-no-nans-fp-math < %s | FileCheck %s -check-prefixes=GCN,GCN-TRUE16,GFX11NONANS,GFX11NONANS-TRUE16
-; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -verify-machineinstrs -amdgpu-enable-delay-alu=0 -enable-no-nans-fp-math < %s | FileCheck %s -check-prefixes=GCN,GCN-FAKE16,GFX11NONANS,GFX11NONANS-FAKE16
+; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -verify-machineinstrs -amdgpu-enable-delay-alu=0 -enable-no-nans-fp-math < %s | FileCheck %s -check-prefixes=GCN,GFX11NONANS,GCN-TRUE16,GFX11NONANS-TRUE16
+; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -verify-machineinstrs -amdgpu-enable-delay-alu=0 -enable-no-nans-fp-math < %s | FileCheck %s -check-prefixes=GCN,GFX11NONANS,GCN-FAKE16,GFX11NONANS-FAKE16
 
 ; The tests check the following optimization of DAGCombiner:
 ; CMP(A,C)||CMP(B,C) => CMP(MIN/MAX(A,B), C)
@@ -863,21 +863,13 @@ define i1 @test58(double %arg1, double %arg2, double %arg3) #0 {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test58:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
-; GCN-TRUE16-NEXT:    v_cmp_gt_f64_e32 vcc_lo, v[0:1], v[4:5]
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test58:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
-; GCN-FAKE16-NEXT:    v_cmp_gt_f64_e32 vcc_lo, v[0:1], v[4:5]
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test58:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX11NONANS-NEXT:    v_cmp_gt_f64_e32 vcc_lo, v[0:1], v[4:5]
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %cmp1 = fcmp ugt double %arg1, %arg3
   %cmp2 = fcmp ugt double %arg2, %arg3
   %and1  = and i1 %cmp1, %cmp2
@@ -893,21 +885,13 @@ define i1 @test59(float %arg1, float %arg2, float %arg3) #0 {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test59:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_min_f32_e32 v0, v0, v1
-; GCN-TRUE16-NEXT:    v_cmp_ge_f32_e32 vcc_lo, v0, v2
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test59:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_min_f32_e32 v0, v0, v1
-; GCN-FAKE16-NEXT:    v_cmp_ge_f32_e32 vcc_lo, v0, v2
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test59:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_min_f32_e32 v0, v0, v1
+; GFX11NONANS-NEXT:    v_cmp_ge_f32_e32 vcc_lo, v0, v2
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %cmp1 = fcmp uge float %arg1, %arg3
   %cmp2 = fcmp uge float %arg2, %arg3
   %and1  = and i1 %cmp1, %cmp2
@@ -923,21 +907,13 @@ define i1 @test60(float %arg1, float %arg2, float %arg3) #0 {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test60:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_max_f32_e32 v0, v0, v1
-; GCN-TRUE16-NEXT:    v_cmp_le_f32_e32 vcc_lo, v0, v2
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test60:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_max_f32_e32 v0, v0, v1
-; GCN-FAKE16-NEXT:    v_cmp_le_f32_e32 vcc_lo, v0, v2
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test60:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_max_f32_e32 v0, v0, v1
+; GFX11NONANS-NEXT:    v_cmp_le_f32_e32 vcc_lo, v0, v2
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %cmp1 = fcmp ule float %arg1, %arg3
   %cmp2 = fcmp ule float %arg2, %arg3
   %and1  = and i1 %cmp1, %cmp2
@@ -953,21 +929,13 @@ define i1 @test61(double %arg1, double %arg2, double %arg3) #0 {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test61:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_max_f64 v[0:1], v[0:1], v[2:3]
-; GCN-TRUE16-NEXT:    v_cmp_lt_f64_e32 vcc_lo, v[0:1], v[4:5]
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test61:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_max_f64 v[0:1], v[0:1], v[2:3]
-; GCN-FAKE16-NEXT:    v_cmp_lt_f64_e32 vcc_lo, v[0:1], v[4:5]
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test61:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX11NONANS-NEXT:    v_cmp_lt_f64_e32 vcc_lo, v[0:1], v[4:5]
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %cmp1 = fcmp ult double %arg1, %arg3
   %cmp2 = fcmp ult double %arg2, %arg3
   %and1 = and i1 %cmp1, %cmp2
@@ -1124,21 +1092,13 @@ define i1 @test70(float %arg1, float %arg2, float %arg3) {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test70:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_min_f32_e32 v0, v0, v1
-; GCN-TRUE16-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v2
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test70:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_min_f32_e32 v0, v0, v1
-; GCN-FAKE16-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v2
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test70:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_min_f32_e32 v0, v0, v1
+; GFX11NONANS-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v2
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %var1 = call float @llvm.canonicalize.f32(float %arg1)
   %var2 = call float @llvm.canonicalize.f32(float %arg2)
   %cmp1 = fcmp olt float %var1, %arg3
@@ -1193,21 +1153,13 @@ define i1 @test73(float %arg1, float %arg2, float %arg3) {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test73:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_max_f32_e32 v0, v0, v1
-; GCN-TRUE16-NEXT:    v_cmp_ge_f32_e32 vcc_lo, v0, v2
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test73:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_max_f32_e32 v0, v0, v1
-; GCN-FAKE16-NEXT:    v_cmp_ge_f32_e32 vcc_lo, v0, v2
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test73:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_max_f32_e32 v0, v0, v1
+; GFX11NONANS-NEXT:    v_cmp_ge_f32_e32 vcc_lo, v0, v2
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %var1 = call float @llvm.canonicalize.f32(float %arg1)
   %var2 = call float @llvm.canonicalize.f32(float %arg2)
   %cmp1 = fcmp oge float %var1, %arg3
@@ -1227,25 +1179,15 @@ define i1 @test74(double %arg1, double %arg2, double %arg3) {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test74:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
-; GCN-TRUE16-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
-; GCN-TRUE16-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
-; GCN-TRUE16-NEXT:    v_cmp_gt_f64_e32 vcc_lo, v[0:1], v[4:5]
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test74:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
-; GCN-FAKE16-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
-; GCN-FAKE16-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
-; GCN-FAKE16-NEXT:    v_cmp_gt_f64_e32 vcc_lo, v[0:1], v[4:5]
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test74:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11NONANS-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11NONANS-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX11NONANS-NEXT:    v_cmp_gt_f64_e32 vcc_lo, v[0:1], v[4:5]
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %var1 = call double @llvm.canonicalize.f64(double %arg1)
   %var2 = call double @llvm.canonicalize.f64(double %arg2)
   %cmp1 = fcmp ugt double %var1, %arg3
@@ -1264,21 +1206,13 @@ define i1 @test75(float %arg1, float %arg2, float %arg3) {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test75:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_min_f32_e32 v0, v0, v1
-; GCN-TRUE16-NEXT:    v_cmp_ge_f32_e32 vcc_lo, v0, v2
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test75:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_min_f32_e32 v0, v0, v1
-; GCN-FAKE16-NEXT:    v_cmp_ge_f32_e32 vcc_lo, v0, v2
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test75:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_min_f32_e32 v0, v0, v1
+; GFX11NONANS-NEXT:    v_cmp_ge_f32_e32 vcc_lo, v0, v2
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %var1 = call float @llvm.canonicalize.f32(float %arg1)
   %var2 = call float @llvm.canonicalize.f32(float %arg2)
   %cmp1 = fcmp uge float %var1, %arg3
@@ -1297,21 +1231,13 @@ define i1 @test76(float %arg1, float %arg2, float %arg3) {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test76:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_max_f32_e32 v0, v0, v1
-; GCN-TRUE16-NEXT:    v_cmp_le_f32_e32 vcc_lo, v0, v2
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test76:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_max_f32_e32 v0, v0, v1
-; GCN-FAKE16-NEXT:    v_cmp_le_f32_e32 vcc_lo, v0, v2
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test76:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_max_f32_e32 v0, v0, v1
+; GFX11NONANS-NEXT:    v_cmp_le_f32_e32 vcc_lo, v0, v2
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %var1 = call float @llvm.canonicalize.f32(float %arg1)
   %var2 = call float @llvm.canonicalize.f32(float %arg2)
   %cmp1 = fcmp ule float %var1, %arg3
@@ -1331,25 +1257,15 @@ define i1 @test77(double %arg1, double %arg2, double %arg3) {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test77:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
-; GCN-TRUE16-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
-; GCN-TRUE16-NEXT:    v_max_f64 v[0:1], v[0:1], v[2:3]
-; GCN-TRUE16-NEXT:    v_cmp_lt_f64_e32 vcc_lo, v[0:1], v[4:5]
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test77:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
-; GCN-FAKE16-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
-; GCN-FAKE16-NEXT:    v_max_f64 v[0:1], v[0:1], v[2:3]
-; GCN-FAKE16-NEXT:    v_cmp_lt_f64_e32 vcc_lo, v[0:1], v[4:5]
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test77:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11NONANS-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11NONANS-NEXT:    v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX11NONANS-NEXT:    v_cmp_lt_f64_e32 vcc_lo, v[0:1], v[4:5]
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %var1 = call double @llvm.canonicalize.f64(double %arg1)
   %var2 = call double @llvm.canonicalize.f64(double %arg2)
   %cmp1 = fcmp ult double %var1, %arg3
@@ -1381,21 +1297,13 @@ define i1 @test79(float %arg1, float %arg2, float %arg3) #0 {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test79:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_max_f32_e32 v0, v0, v1
-; GCN-TRUE16-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v2
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test79:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_max_f32_e32 v0, v0, v1
-; GCN-FAKE16-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v2
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test79:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_max_f32_e32 v0, v0, v1
+; GFX11NONANS-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v2
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %cmp1 = fcmp ult float %arg1, %arg3
   %cmp2 = fcmp ugt float %arg3, %arg2
   %and1  = and i1 %cmp1, %cmp2
@@ -1465,21 +1373,13 @@ define i1 @test83(float %arg1, float %arg2, float %arg3) {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test83:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_max_f32_e32 v0, v0, v1
-; GCN-TRUE16-NEXT:    v_cmp_le_f32_e32 vcc_lo, v0, v2
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test83:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_max_f32_e32 v0, v0, v1
-; GCN-FAKE16-NEXT:    v_cmp_le_f32_e32 vcc_lo, v0, v2
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test83:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_max_f32_e32 v0, v0, v1
+; GFX11NONANS-NEXT:    v_cmp_le_f32_e32 vcc_lo, v0, v2
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %var1 = call float @llvm.canonicalize.f32(float %arg1)
   %var2 = call float @llvm.canonicalize.f32(float %arg2)
   %cmp1 = fcmp ule float %var1, %arg3
@@ -2283,21 +2183,13 @@ define i1 @test108(float %arg1, float %arg2, float %arg3, float %C) {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test108:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_max3_f32 v0, v0, v1, v2
-; GCN-TRUE16-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v3
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test108:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_max3_f32 v0, v0, v1, v2
-; GCN-FAKE16-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v3
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test108:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_max3_f32 v0, v0, v1, v2
+; GFX11NONANS-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v3
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %cmp1 = fcmp ult float %arg1, %C
   %cmp2 = fcmp ult float %arg2, %C
   %cmp3 = fcmp ult float %arg3, %C
@@ -2319,25 +2211,15 @@ define i1 @test109(float %arg1, float %arg2, float %arg3, float %arg4, float %C)
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test109:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_dual_min_f32 v0, v0, v1 :: v_dual_max_f32 v1, v2, v3
-; GCN-TRUE16-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v4
-; GCN-TRUE16-NEXT:    v_cmp_gt_f32_e64 s0, v1, v4
-; GCN-TRUE16-NEXT:    s_or_b32 s0, vcc_lo, s0
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test109:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_dual_min_f32 v0, v0, v1 :: v_dual_max_f32 v1, v2, v3
-; GCN-FAKE16-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v4
-; GCN-FAKE16-NEXT:    v_cmp_gt_f32_e64 s0, v1, v4
-; GCN-FAKE16-NEXT:    s_or_b32 s0, vcc_lo, s0
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test109:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_dual_min_f32 v0, v0, v1 :: v_dual_max_f32 v1, v2, v3
+; GFX11NONANS-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v4
+; GFX11NONANS-NEXT:    v_cmp_gt_f32_e64 s0, v1, v4
+; GFX11NONANS-NEXT:    s_or_b32 s0, vcc_lo, s0
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %cmp1 = fcmp olt float %arg1, %C
   %cmp2 = fcmp olt float %arg2, %C
   %cmp3 = fcmp ogt float %arg3, %C
@@ -2387,27 +2269,16 @@ define i1 @test111(float %arg1, float %arg2, float %arg3, float %arg4, float %ar
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test111:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_min_f32_e32 v2, v2, v3
-; GCN-TRUE16-NEXT:    v_min3_f32 v0, v0, v1, v2
-; GCN-TRUE16-NEXT:    v_min_f32_e32 v0, v0, v4
-; GCN-TRUE16-NEXT:    v_min3_f32 v0, v5, v6, v0
-; GCN-TRUE16-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v8
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test111:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_min_f32_e32 v2, v2, v3
-; GCN-FAKE16-NEXT:    v_min3_f32 v0, v0, v1, v2
-; GCN-FAKE16-NEXT:    v_min_f32_e32 v0, v0, v4
-; GCN-FAKE16-NEXT:    v_min3_f32 v0, v5, v6, v0
-; GCN-FAKE16-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v8
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test111:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_min_f32_e32 v2, v2, v3
+; GFX11NONANS-NEXT:    v_min3_f32 v0, v0, v1, v2
+; GFX11NONANS-NEXT:    v_min_f32_e32 v0, v0, v4
+; GFX11NONANS-NEXT:    v_min3_f32 v0, v5, v6, v0
+; GFX11NONANS-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v8
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %cmp1 = fcmp olt float %arg1, %C
   %cmp2 = fcmp olt float %arg2, %C
   %or1  = or i1 %cmp1, %cmp2
@@ -2441,27 +2312,16 @@ define i1 @test112(float %arg1, float %arg2, float %arg3, float %arg4, float %ar
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test112:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_min_f32_e32 v2, v2, v3
-; GCN-TRUE16-NEXT:    v_min3_f32 v0, v0, v1, v2
-; GCN-TRUE16-NEXT:    v_min_f32_e32 v0, v0, v4
-; GCN-TRUE16-NEXT:    v_min3_f32 v0, v5, v6, v0
-; GCN-TRUE16-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v8
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test112:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_min_f32_e32 v2, v2, v3
-; GCN-FAKE16-NEXT:    v_min3_f32 v0, v0, v1, v2
-; GCN-FAKE16-NEXT:    v_min_f32_e32 v0, v0, v4
-; GCN-FAKE16-NEXT:    v_min3_f32 v0, v5, v6, v0
-; GCN-FAKE16-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v8
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test112:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_min_f32_e32 v2, v2, v3
+; GFX11NONANS-NEXT:    v_min3_f32 v0, v0, v1, v2
+; GFX11NONANS-NEXT:    v_min_f32_e32 v0, v0, v4
+; GFX11NONANS-NEXT:    v_min3_f32 v0, v5, v6, v0
+; GFX11NONANS-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v8
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %cmp1 = fcmp olt float %arg1, %C
   %cmp2 = fcmp olt float %arg2, %C
   %or1  = or i1 %cmp1, %cmp2
@@ -2492,21 +2352,13 @@ define i1 @test113(float %arg1, float %arg2, float %arg3, float %C) {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test113:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_maxmin_f32 v0, v0, v1, v2
-; GCN-TRUE16-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v3
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test113:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_maxmin_f32 v0, v0, v1, v2
-; GCN-FAKE16-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v3
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test113:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_maxmin_f32 v0, v0, v1, v2
+; GFX11NONANS-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v3
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %cmp1 = fcmp ult float %arg1, %C
   %cmp2 = fcmp ult float %arg2, %C
   %cmp3 = fcmp olt float %arg3, %C
@@ -2527,25 +2379,15 @@ define i1 @test114(float %arg1, float %arg2, float %arg3, float %C) {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test114:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_max_f32_e32 v0, v0, v1
-; GCN-TRUE16-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v2, v3
-; GCN-TRUE16-NEXT:    v_cmp_gt_f32_e64 s0, v0, v3
-; GCN-TRUE16-NEXT:    s_and_b32 s0, s0, vcc_lo
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test114:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_max_f32_e32 v0, v0, v1
-; GCN-FAKE16-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v2, v3
-; GCN-FAKE16-NEXT:    v_cmp_gt_f32_e64 s0, v0, v3
-; GCN-FAKE16-NEXT:    s_and_b32 s0, s0, vcc_lo
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test114:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_max_f32_e32 v0, v0, v1
+; GFX11NONANS-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v2, v3
+; GFX11NONANS-NEXT:    v_cmp_gt_f32_e64 s0, v0, v3
+; GFX11NONANS-NEXT:    s_and_b32 s0, s0, vcc_lo
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %cmp1 = fcmp ogt float %arg1, %C
   %cmp2 = fcmp ogt float %arg2, %C
   %cmp3 = fcmp ult float %arg3, %C
@@ -2567,23 +2409,14 @@ define i1 @test115(float %arg1, float %arg2, float %arg3, float %arg4, float %C)
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test115:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_max_f32_e32 v2, v2, v3
-; GCN-TRUE16-NEXT:    v_min3_f32 v0, v0, v1, v2
-; GCN-TRUE16-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v4
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test115:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_max_f32_e32 v2, v2, v3
-; GCN-FAKE16-NEXT:    v_min3_f32 v0, v0, v1, v2
-; GCN-FAKE16-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v4
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test115:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_max_f32_e32 v2, v2, v3
+; GFX11NONANS-NEXT:    v_min3_f32 v0, v0, v1, v2
+; GFX11NONANS-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v4
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %cmp1 = fcmp olt float %arg1, %C
   %cmp2 = fcmp olt float %arg2, %C
   %var3 = call float @llvm.canonicalize.f32(float %arg3)
@@ -2619,39 +2452,22 @@ define i1 @test116(float %arg1, float %arg2, float %arg3, float %arg4, float %ar
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test116:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_min_f32_e32 v8, v8, v9
-; GCN-TRUE16-NEXT:    v_dual_max_f32 v2, v2, v3 :: v_dual_min_f32 v3, v4, v5
-; GCN-TRUE16-NEXT:    v_max_f32_e32 v4, v6, v7
-; GCN-TRUE16-NEXT:    v_min3_f32 v0, v0, v1, v8
-; GCN-TRUE16-NEXT:    v_cmp_gt_f32_e32 vcc_lo, v2, v10
-; GCN-TRUE16-NEXT:    v_cmp_lt_f32_e64 s0, v3, v10
-; GCN-TRUE16-NEXT:    v_cmp_gt_f32_e64 s1, v4, v10
-; GCN-TRUE16-NEXT:    v_cmp_lt_f32_e64 s2, v0, v10
-; GCN-TRUE16-NEXT:    s_or_b32 s0, s0, s1
-; GCN-TRUE16-NEXT:    s_or_b32 s1, s2, vcc_lo
-; GCN-TRUE16-NEXT:    s_or_b32 s0, s0, s1
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test116:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_min_f32_e32 v8, v8, v9
-; GCN-FAKE16-NEXT:    v_dual_max_f32 v2, v2, v3 :: v_dual_min_f32 v3, v4, v5
-; GCN-FAKE16-NEXT:    v_max_f32_e32 v4, v6, v7
-; GCN-FAKE16-NEXT:    v_min3_f32 v0, v0, v1, v8
-; GCN-FAKE16-NEXT:    v_cmp_gt_f32_e32 vcc_lo, v2, v10
-; GCN-FAKE16-NEXT:    v_cmp_lt_f32_e64 s0, v3, v10
-; GCN-FAKE16-NEXT:    v_cmp_gt_f32_e64 s1, v4, v10
-; GCN-FAKE16-NEXT:    v_cmp_lt_f32_e64 s2, v0, v10
-; GCN-FAKE16-NEXT:    s_or_b32 s0, s0, s1
-; GCN-FAKE16-NEXT:    s_or_b32 s1, s2, vcc_lo
-; GCN-FAKE16-NEXT:    s_or_b32 s0, s0, s1
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test116:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_min_f32_e32 v8, v8, v9
+; GFX11NONANS-NEXT:    v_dual_max_f32 v2, v2, v3 :: v_dual_min_f32 v3, v4, v5
+; GFX11NONANS-NEXT:    v_max_f32_e32 v4, v6, v7
+; GFX11NONANS-NEXT:    v_min3_f32 v0, v0, v1, v8
+; GFX11NONANS-NEXT:    v_cmp_gt_f32_e32 vcc_lo, v2, v10
+; GFX11NONANS-NEXT:    v_cmp_lt_f32_e64 s0, v3, v10
+; GFX11NONANS-NEXT:    v_cmp_gt_f32_e64 s1, v4, v10
+; GFX11NONANS-NEXT:    v_cmp_lt_f32_e64 s2, v0, v10
+; GFX11NONANS-NEXT:    s_or_b32 s0, s0, s1
+; GFX11NONANS-NEXT:    s_or_b32 s1, s2, vcc_lo
+; GFX11NONANS-NEXT:    s_or_b32 s0, s0, s1
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %cmp1 = fcmp olt float %arg1, %C
   %cmp2 = fcmp olt float %arg2, %C
   %cmp3 = fcmp ogt float %arg3, %C
@@ -2697,41 +2513,23 @@ define i1 @test117(float %arg1, float %arg2, float %arg3, float %arg4, float %ar
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test117:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_min_f32_e32 v6, v6, v7
-; GCN-TRUE16-NEXT:    v_dual_min_f32 v0, v0, v1 :: v_dual_min_f32 v1, v10, v11
-; GCN-TRUE16-NEXT:    v_min_f32_e32 v2, v2, v3
-; GCN-TRUE16-NEXT:    v_min3_f32 v3, v4, v5, v6
-; GCN-TRUE16-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v12
-; GCN-TRUE16-NEXT:    v_min3_f32 v0, v8, v9, v1
-; GCN-TRUE16-NEXT:    v_cmp_lt_f32_e64 s0, v2, v13
-; GCN-TRUE16-NEXT:    v_cmp_lt_f32_e64 s1, v3, v13
-; GCN-TRUE16-NEXT:    v_cmp_lt_f32_e64 s2, v0, v12
-; GCN-TRUE16-NEXT:    s_or_b32 s0, vcc_lo, s0
-; GCN-TRUE16-NEXT:    s_or_b32 s0, s0, s1
-; GCN-TRUE16-NEXT:    s_or_b32 s0, s2, s0
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test117:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_min_f32_e32 v6, v6, v7
-; GCN-FAKE16-NEXT:    v_dual_min_f32 v0, v0, v1 :: v_dual_min_f32 v1, v10, v11
-; GCN-FAKE16-NEXT:    v_min_f32_e32 v2, v2, v3
-; GCN-FAKE16-NEXT:    v_min3_f32 v3, v4, v5, v6
-; GCN-FAKE16-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v12
-; GCN-FAKE16-NEXT:    v_min3_f32 v0, v8, v9, v1
-; GCN-FAKE16-NEXT:    v_cmp_lt_f32_e64 s0, v2, v13
-; GCN-FAKE16-NEXT:    v_cmp_lt_f32_e64 s1, v3, v13
-; GCN-FAKE16-NEXT:    v_cmp_lt_f32_e64 s2, v0, v12
-; GCN-FAKE16-NEXT:    s_or_b32 s0, vcc_lo, s0
-; GCN-FAKE16-NEXT:    s_or_b32 s0, s0, s1
-; GCN-FAKE16-NEXT:    s_or_b32 s0, s2, s0
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test117:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_min_f32_e32 v6, v6, v7
+; GFX11NONANS-NEXT:    v_dual_min_f32 v0, v0, v1 :: v_dual_min_f32 v1, v10, v11
+; GFX11NONANS-NEXT:    v_min_f32_e32 v2, v2, v3
+; GFX11NONANS-NEXT:    v_min3_f32 v3, v4, v5, v6
+; GFX11NONANS-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v12
+; GFX11NONANS-NEXT:    v_min3_f32 v0, v8, v9, v1
+; GFX11NONANS-NEXT:    v_cmp_lt_f32_e64 s0, v2, v13
+; GFX11NONANS-NEXT:    v_cmp_lt_f32_e64 s1, v3, v13
+; GFX11NONANS-NEXT:    v_cmp_lt_f32_e64 s2, v0, v12
+; GFX11NONANS-NEXT:    s_or_b32 s0, vcc_lo, s0
+; GFX11NONANS-NEXT:    s_or_b32 s0, s0, s1
+; GFX11NONANS-NEXT:    s_or_b32 s0, s2, s0
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %cmp1 = fcmp olt float %arg1, %C1
   %cmp2 = fcmp olt float %arg2, %C1
   %cmp3 = fcmp olt float %arg3, %C2
@@ -3086,21 +2884,13 @@ define i1 @test134(float %arg1, float %arg2, float %arg3) #0 {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test134:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_max_f32_e32 v0, v0, v1
-; GCN-TRUE16-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v2
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test134:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_max_f32_e32 v0, v0, v1
-; GCN-FAKE16-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v2
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test134:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_max_f32_e32 v0, v0, v1
+; GFX11NONANS-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v2
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %cmp1 = fcmp olt float %arg1, %arg3
   %cmp2 = fcmp ogt float %arg3, %arg2
   %and1  = and i1 %cmp1, %cmp2
@@ -3117,21 +2907,13 @@ define i1 @test135(float %arg1, float %arg2, float %arg3) #0 {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test135:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_min_f32_e32 v0, v0, v1
-; GCN-TRUE16-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v2
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test135:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_min_f32_e32 v0, v0, v1
-; GCN-FAKE16-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v2
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test135:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_min_f32_e32 v0, v0, v1
+; GFX11NONANS-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v2
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %cmp1 = fcmp ult float %arg1, %arg3
   %cmp2 = fcmp ugt float %arg3, %arg2
   %or1  = or i1 %cmp1, %cmp2
@@ -3150,25 +2932,15 @@ define i1 @test136(double %arg1, double %arg2, double %arg3) {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test136:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
-; GCN-TRUE16-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
-; GCN-TRUE16-NEXT:    v_max_f64 v[0:1], v[0:1], v[2:3]
-; GCN-TRUE16-NEXT:    v_cmp_le_f64_e32 vcc_lo, v[0:1], v[4:5]
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test136:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
-; GCN-FAKE16-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
-; GCN-FAKE16-NEXT:    v_max_f64 v[0:1], v[0:1], v[2:3]
-; GCN-FAKE16-NEXT:    v_cmp_le_f64_e32 vcc_lo, v[0:1], v[4:5]
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test136:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11NONANS-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11NONANS-NEXT:    v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX11NONANS-NEXT:    v_cmp_le_f64_e32 vcc_lo, v[0:1], v[4:5]
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %var1 = call double @llvm.canonicalize.f64(double %arg1)
   %var2 = call double @llvm.canonicalize.f64(double %arg2)
   %cmp1 = fcmp ole double %var1, %arg3
@@ -3188,21 +2960,13 @@ define i1 @test137(float %arg1, float %arg2, float %arg3) {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test137:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_min_f32_e32 v0, v0, v1
-; GCN-TRUE16-NEXT:    v_cmp_le_f32_e32 vcc_lo, v0, v2
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test137:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_min_f32_e32 v0, v0, v1
-; GCN-FAKE16-NEXT:    v_cmp_le_f32_e32 vcc_lo, v0, v2
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test137:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_min_f32_e32 v0, v0, v1
+; GFX11NONANS-NEXT:    v_cmp_le_f32_e32 vcc_lo, v0, v2
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %var1 = call float @llvm.canonicalize.f32(float %arg1)
   %var2 = call float @llvm.canonicalize.f32(float %arg2)
   %cmp1 = fcmp ule float %var1, %arg3
@@ -3221,21 +2985,13 @@ define i1 @test138(float %arg1, float %arg2, float %arg3) #0 {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test138:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_max_f32_e32 v0, v0, v1
-; GCN-TRUE16-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v2
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test138:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_max_f32_e32 v0, v0, v1
-; GCN-FAKE16-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v2
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test138:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_max_f32_e32 v0, v0, v1
+; GFX11NONANS-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v2
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %cmp1 = fcmp olt float %arg1, %arg3
   %cmp2 = fcmp olt float %arg2, %arg3
   %and1  = and i1 %cmp1, %cmp2
@@ -3252,21 +3008,13 @@ define i1 @test139(double %arg1, double %arg2, double %arg3) #0 {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test139:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_max_f64 v[0:1], v[0:1], v[2:3]
-; GCN-TRUE16-NEXT:    v_cmp_le_f64_e32 vcc_lo, v[0:1], v[4:5]
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test139:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_max_f64 v[0:1], v[0:1], v[2:3]
-; GCN-FAKE16-NEXT:    v_cmp_le_f64_e32 vcc_lo, v[0:1], v[4:5]
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test139:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX11NONANS-NEXT:    v_cmp_le_f64_e32 vcc_lo, v[0:1], v[4:5]
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %cmp1 = fcmp ole double %arg1, %arg3
   %cmp2 = fcmp ole double %arg2, %arg3
   %and1  = and i1 %cmp1, %cmp2
@@ -3283,21 +3031,13 @@ define i1 @test140(double %arg1, double %arg2, double %arg3) #0 {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test140:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
-; GCN-TRUE16-NEXT:    v_cmp_gt_f64_e32 vcc_lo, v[0:1], v[4:5]
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test140:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
-; GCN-FAKE16-NEXT:    v_cmp_gt_f64_e32 vcc_lo, v[0:1], v[4:5]
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test140:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX11NONANS-NEXT:    v_cmp_gt_f64_e32 vcc_lo, v[0:1], v[4:5]
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %cmp1 = fcmp ogt double %arg1, %arg3
   %cmp2 = fcmp ogt double %arg2, %arg3
   %and1  = and i1 %cmp1, %cmp2
@@ -3314,21 +3054,13 @@ define i1 @test141(float %arg1, float %arg2, float %arg3) #0 {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test141:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_min_f32_e32 v0, v0, v1
-; GCN-TRUE16-NEXT:    v_cmp_ge_f32_e32 vcc_lo, v0, v2
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test141:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_min_f32_e32 v0, v0, v1
-; GCN-FAKE16-NEXT:    v_cmp_ge_f32_e32 vcc_lo, v0, v2
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test141:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_min_f32_e32 v0, v0, v1
+; GFX11NONANS-NEXT:    v_cmp_ge_f32_e32 vcc_lo, v0, v2
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %cmp1 = fcmp oge float %arg1, %arg3
   %cmp2 = fcmp oge float %arg2, %arg3
   %and1  = and i1 %cmp1, %cmp2
@@ -3345,21 +3077,13 @@ define i1 @test142(double %arg1, double %arg2, double %arg3) #0 {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test142:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_max_f64 v[0:1], v[0:1], v[2:3]
-; GCN-TRUE16-NEXT:    v_cmp_gt_f64_e32 vcc_lo, v[0:1], v[4:5]
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test142:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_max_f64 v[0:1], v[0:1], v[2:3]
-; GCN-FAKE16-NEXT:    v_cmp_gt_f64_e32 vcc_lo, v[0:1], v[4:5]
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test142:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX11NONANS-NEXT:    v_cmp_gt_f64_e32 vcc_lo, v[0:1], v[4:5]
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %cmp1 = fcmp ugt double %arg1, %arg3
   %cmp2 = fcmp ugt double %arg2, %arg3
   %or1  = or i1 %cmp1, %cmp2
@@ -3376,21 +3100,13 @@ define i1 @test143(float %arg1, float %arg2, float %arg3) #0 {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test143:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_max_f32_e32 v0, v0, v1
-; GCN-TRUE16-NEXT:    v_cmp_ge_f32_e32 vcc_lo, v0, v2
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test143:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_max_f32_e32 v0, v0, v1
-; GCN-FAKE16-NEXT:    v_cmp_ge_f32_e32 vcc_lo, v0, v2
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test143:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_max_f32_e32 v0, v0, v1
+; GFX11NONANS-NEXT:    v_cmp_ge_f32_e32 vcc_lo, v0, v2
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %cmp1 = fcmp uge float %arg1, %arg3
   %cmp2 = fcmp uge float %arg2, %arg3
   %or1  = or i1 %cmp1, %cmp2
@@ -3407,21 +3123,13 @@ define i1 @test144(float %arg1, float %arg2, float %arg3) #0 {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test144:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_min_f32_e32 v0, v0, v1
-; GCN-TRUE16-NEXT:    v_cmp_le_f32_e32 vcc_lo, v0, v2
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test144:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_min_f32_e32 v0, v0, v1
-; GCN-FAKE16-NEXT:    v_cmp_le_f32_e32 vcc_lo, v0, v2
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test144:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_min_f32_e32 v0, v0, v1
+; GFX11NONANS-NEXT:    v_cmp_le_f32_e32 vcc_lo, v0, v2
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %cmp1 = fcmp ule float %arg1, %arg3
   %cmp2 = fcmp ule float %arg2, %arg3
   %or1  = or i1 %cmp1, %cmp2
@@ -3438,21 +3146,13 @@ define i1 @test145(double %arg1, double %arg2, double %arg3) #0 {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test145:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
-; GCN-TRUE16-NEXT:    v_cmp_lt_f64_e32 vcc_lo, v[0:1], v[4:5]
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test145:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
-; GCN-FAKE16-NEXT:    v_cmp_lt_f64_e32 vcc_lo, v[0:1], v[4:5]
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test145:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX11NONANS-NEXT:    v_cmp_lt_f64_e32 vcc_lo, v[0:1], v[4:5]
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %cmp1 = fcmp ult double %arg1, %arg3
   %cmp2 = fcmp ult double %arg2, %arg3
   %or1 = or i1 %cmp1, %cmp2
@@ -3470,21 +3170,13 @@ define i1 @test146(float %arg1, float %arg2, float %arg3) {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test146:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_max_f32_e32 v0, v0, v1
-; GCN-TRUE16-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v2
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test146:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_max_f32_e32 v0, v0, v1
-; GCN-FAKE16-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v2
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test146:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_max_f32_e32 v0, v0, v1
+; GFX11NONANS-NEXT:    v_cmp_lt_f32_e32 vcc_lo, v0, v2
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %var1 = call float @llvm.canonicalize.f32(float %arg1)
   %var2 = call float @llvm.canonicalize.f32(float %arg2)
   %cmp1 = fcmp olt float %var1, %arg3
@@ -3505,25 +3197,15 @@ define i1 @test147(double %arg1, double %arg2, double %arg3) {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test147:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
-; GCN-TRUE16-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
-; GCN-TRUE16-NEXT:    v_max_f64 v[0:1], v[0:1], v[2:3]
-; GCN-TRUE16-NEXT:    v_cmp_le_f64_e32 vcc_lo, v[0:1], v[4:5]
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test147:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
-; GCN-FAKE16-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
-; GCN-FAKE16-NEXT:    v_max_f64 v[0:1], v[0:1], v[2:3]
-; GCN-FAKE16-NEXT:    v_cmp_le_f64_e32 vcc_lo, v[0:1], v[4:5]
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test147:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11NONANS-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11NONANS-NEXT:    v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX11NONANS-NEXT:    v_cmp_le_f64_e32 vcc_lo, v[0:1], v[4:5]
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %var1 = call double @llvm.canonicalize.f64(double %arg1)
   %var2 = call double @llvm.canonicalize.f64(double %arg2)
   %cmp1 = fcmp ole double %var1, %arg3
@@ -3544,25 +3226,15 @@ define i1 @test148(double %arg1, double %arg2, double %arg3) {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test148:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
-; GCN-TRUE16-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
-; GCN-TRUE16-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
-; GCN-TRUE16-NEXT:    v_cmp_gt_f64_e32 vcc_lo, v[0:1], v[4:5]
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test148:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
-; GCN-FAKE16-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
-; GCN-FAKE16-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
-; GCN-FAKE16-NEXT:    v_cmp_gt_f64_e32 vcc_lo, v[0:1], v[4:5]
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test148:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11NONANS-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11NONANS-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX11NONANS-NEXT:    v_cmp_gt_f64_e32 vcc_lo, v[0:1], v[4:5]
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %var1 = call double @llvm.canonicalize.f64(double %arg1)
   %var2 = call double @llvm.canonicalize.f64(double %arg2)
   %cmp1 = fcmp ogt double %var1, %arg3
@@ -3582,21 +3254,13 @@ define i1 @test149(float %arg1, float %arg2, float %arg3) {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test149:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_min_f32_e32 v0, v0, v1
-; GCN-TRUE16-NEXT:    v_cmp_ge_f32_e32 vcc_lo, v0, v2
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test149:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_min_f32_e32 v0, v0, v1
-; GCN-FAKE16-NEXT:    v_cmp_ge_f32_e32 vcc_lo, v0, v2
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test149:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_min_f32_e32 v0, v0, v1
+; GFX11NONANS-NEXT:    v_cmp_ge_f32_e32 vcc_lo, v0, v2
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %var1 = call float @llvm.canonicalize.f32(float %arg1)
   %var2 = call float @llvm.canonicalize.f32(float %arg2)
   %cmp1 = fcmp oge float %var1, %arg3
@@ -3617,25 +3281,15 @@ define i1 @test150(double %arg1, double %arg2, double %arg3) {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test150:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
-; GCN-TRUE16-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
-; GCN-TRUE16-NEXT:    v_max_f64 v[0:1], v[0:1], v[2:3]
-; GCN-TRUE16-NEXT:    v_cmp_gt_f64_e32 vcc_lo, v[0:1], v[4:5]
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test150:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
-; GCN-FAKE16-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
-; GCN-FAKE16-NEXT:    v_max_f64 v[0:1], v[0:1], v[2:3]
-; GCN-FAKE16-NEXT:    v_cmp_gt_f64_e32 vcc_lo, v[0:1], v[4:5]
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test150:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11NONANS-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11NONANS-NEXT:    v_max_f64 v[0:1], v[0:1], v[2:3]
+; GFX11NONANS-NEXT:    v_cmp_gt_f64_e32 vcc_lo, v[0:1], v[4:5]
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %var1 = call double @llvm.canonicalize.f64(double %arg1)
   %var2 = call double @llvm.canonicalize.f64(double %arg2)
   %cmp1 = fcmp ugt double %var1, %arg3
@@ -3655,21 +3309,13 @@ define i1 @test151(float %arg1, float %arg2, float %arg3) {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test151:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_max_f32_e32 v0, v0, v1
-; GCN-TRUE16-NEXT:    v_cmp_ge_f32_e32 vcc_lo, v0, v2
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test151:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_max_f32_e32 v0, v0, v1
-; GCN-FAKE16-NEXT:    v_cmp_ge_f32_e32 vcc_lo, v0, v2
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test151:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_max_f32_e32 v0, v0, v1
+; GFX11NONANS-NEXT:    v_cmp_ge_f32_e32 vcc_lo, v0, v2
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %var1 = call float @llvm.canonicalize.f32(float %arg1)
   %var2 = call float @llvm.canonicalize.f32(float %arg2)
   %cmp1 = fcmp uge float %var1, %arg3
@@ -3689,21 +3335,13 @@ define i1 @test152(float %arg1, float %arg2, float %arg3) {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test152:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_min_f32_e32 v0, v0, v1
-; GCN-TRUE16-NEXT:    v_cmp_le_f32_e32 vcc_lo, v0, v2
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test152:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_min_f32_e32 v0, v0, v1
-; GCN-FAKE16-NEXT:    v_cmp_le_f32_e32 vcc_lo, v0, v2
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test152:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_min_f32_e32 v0, v0, v1
+; GFX11NONANS-NEXT:    v_cmp_le_f32_e32 vcc_lo, v0, v2
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %var1 = call float @llvm.canonicalize.f32(float %arg1)
   %var2 = call float @llvm.canonicalize.f32(float %arg2)
   %cmp1 = fcmp ule float %var1, %arg3
@@ -3724,25 +3362,15 @@ define i1 @test153(double %arg1, double %arg2, double %arg3) {
 ; GFX11-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s0
 ; GFX11-NEXT:    s_setpc_b64 s[30:31]
 ;
-; GCN-TRUE16-LABEL: test153:
-; GCN-TRUE16:       ; %bb.0:
-; GCN-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-TRUE16-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
-; GCN-TRUE16-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
-; GCN-TRUE16-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
-; GCN-TRUE16-NEXT:    v_cmp_lt_f64_e32 vcc_lo, v[0:1], v[4:5]
-; GCN-TRUE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-TRUE16-NEXT:    s_setpc_b64 s[30:31]
-;
-; GCN-FAKE16-LABEL: test153:
-; GCN-FAKE16:       ; %bb.0:
-; GCN-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-FAKE16-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
-; GCN-FAKE16-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
-; GCN-FAKE16-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
-; GCN-FAKE16-NEXT:    v_cmp_lt_f64_e32 vcc_lo, v[0:1], v[4:5]
-; GCN-FAKE16-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
-; GCN-FAKE16-NEXT:    s_setpc_b64 s[30:31]
+; GFX11NONANS-LABEL: test153:
+; GFX11NONANS:       ; %bb.0:
+; GFX11NONANS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11NONANS-NEXT:    v_max_f64 v[0:1], v[0:1], v[0:1]
+; GFX11NONANS-NEXT:    v_max_f64 v[2:3], v[2:3], v[2:3]
+; GFX11NONANS-NEXT:    v_min_f64 v[0:1], v[0:1], v[2:3]
+; GFX11NONANS-NEXT:    v_cmp_lt_f64_e32 vcc_lo, v[0:1], v[4:5]
+; GFX11NONANS-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc_lo
+; GFX11NONANS-NEXT:    s_setpc_b64 s[30:31]
   %var1 = call double @llvm.canonicalize.f64(double %arg1)
   %var2 = call double @llvm.canonicalize.f64(double %arg2)
   %cmp1 = fcmp ult double %var1, %arg3
@@ -3759,6 +3387,5 @@ declare <2 x half> @llvm.canonicalize.v2f16(<2 x half>)
 attributes #0 = { nounwind "amdgpu-ieee"="false" }
 attributes #1 = { nounwind "unsafe-fp-math"="true" "no-nans-fp-math"="true" }
 ;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; GFX11NONANS: {{.*}}
 ; GFX11NONANS-FAKE16: {{.*}}
 ; GFX11NONANS-TRUE16: {{.*}}
diff --git a/llvm/test/CodeGen/AMDGPU/omod.ll b/llvm/test/CodeGen/AMDGPU/omod.ll
index dc2a2810c6274..e34f51e6daf8c 100644
--- a/llvm/test/CodeGen/AMDGPU/omod.ll
+++ b/llvm/test/CodeGen/AMDGPU/omod.ll
@@ -1130,20 +1130,6 @@ define amdgpu_ps void @v_omod_div2_f16_denormals(half %a) #0 {
 ; GFX12-FAKE16-NEXT:    v_mul_f16_e32 v0, 0.5, v0
 ; GFX12-FAKE16-NEXT:    global_store_b16 v[0:1], v0, off
 ; GFX12-FAKE16-NEXT:    s_endpgm
-; GFX11-TRUE16PLUS-LABEL: v_omod_div2_f16_denormals:
-; GFX11-TRUE16PLUS:       ; %bb.0:
-; GFX11-TRUE16PLUS-NEXT:    v_add_f16_e32 v0.l, 1.0, v0.l
-; GFX11-TRUE16PLUS-NEXT:    s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16PLUS-NEXT:    v_mul_f16_e32 v0.l, 0.5, v0.l
-; GFX11-TRUE16PLUS-NEXT:    global_store_b16 v[0:1], v0, off
-; GFX11-TRUE16PLUS-NEXT:    s_endpgm
-; GFX11-FAKE16PLUS-LABEL: v_omod_div2_f16_denormals:
-; GFX11-FAKE16PLUS:       ; %bb.0:
-; GFX11-FAKE16PLUS-NEXT:    v_add_f16_e32 v0, 1.0, v0
-; GFX11-FAKE16PLUS-NEXT:    s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16PLUS-NEXT:    v_mul_f16_e32 v0, 0.5, v0
-; GFX11-FAKE16PLUS-NEXT:    global_store_b16 v[0:1], v0, off
-; GFX11-FAKE16PLUS-NEXT:    s_endpgm
   %add = fadd half %a, 1.0
   %div2 = fmul half %add, 0.5
   store half %div2, ptr addrspace(1) poison
@@ -1201,20 +1187,6 @@ define amdgpu_ps void @v_omod_mul2_f16_denormals(half %a) #0 {
 ; GFX12-FAKE16-NEXT:    v_add_f16_e32 v0, v0, v0
 ; GFX12-FAKE16-NEXT:    global_store_b16 v[0:1], v0, off
 ; GFX12-FAKE16-NEXT:    s_endpgm
-; GFX11-TRUE16PLUS-LABEL: v_omod_mul2_f16_denormals:
-; GFX11-TRUE16PLUS:       ; %bb.0:
-; GFX11-TRUE16PLUS-NEXT:    v_add_f16_e32 v0.l, 1.0, v0.l
-; GFX11-TRUE16PLUS-NEXT:    s_delay_alu instid0(VALU_DEP_1)
-; GFX11-TRUE16PLUS-NEXT:    v_add_f16_e32 v0.l, v0.l, v0.l
-; GFX11-TRUE16PLUS-NEXT:    global_store_b16 v[0:1], v0, off
-; GFX11-TRUE16PLUS-NEXT:    s_endpgm
-; GFX11-FAKE16PLUS-LABEL: v_omod_mul2_f16_denormals:
-; GFX11-FAKE16PLUS:       ; %bb.0:
-; GFX11-FAKE16PLUS-NEXT:    v_add_f16_e32 v0, 1.0, v0
-; GFX11-FAKE16PLUS-NEXT:    s_delay_alu instid0(VALU_DEP_1)
-; GFX11-FAKE16PLUS-NEXT:    v_add_f16_e32 v0, v0, v0
-; GFX11-FAKE16PLUS-NEXT:    global_store_b16 v[0:1], v0, off
-; GFX11-FAKE16PLUS-NEXT:    s_endpgm
   %add = fadd half %a, 1.0
   %mul2 = fadd half %add, %add
   store half %mul2, ptr addrspace(1) poison
@@ -1262,16 +1234,6 @@ define amdgpu_ps void @v_omod_div2_f16_no_denormals(half %a) #3 {
 ; GFX12-FAKE16-NEXT:    v_add_f16_e64 v0, v0, 1.0 div:2
 ; GFX12-FAKE16-NEXT:    global_store_b16 v[0:1], v0, off
 ; GFX12-FAKE16-NEXT:    s_endpgm
-; GFX11-TRUE16PLUS-LABEL: v_omod_div2_f16_no_denormals:
-; GFX11-TRUE16PLUS:       ; %bb.0:
-; GFX11-TRUE16PLUS-NEXT:    v_add_f16_e64 v0.l, v0.l, 1.0 div:2
-; GFX11-TRUE16PLUS-NEXT:    global_store_b16 v[0:1], v0, off
-; GFX11-TRUE16PLUS-NEXT:    s_endpgm
-; GFX11-FAKE16PLUS-LABEL: v_omod_div2_f16_no_denormals:
-; GFX11-FAKE16PLUS:       ; %bb.0:
-; GFX11-FAKE16PLUS-NEXT:    v_add_f16_e64 v0, v0, 1.0 div:2
-; GFX11-FAKE16PLUS-NEXT:    global_store_b16 v[0:1], v0, off
-; GFX11-FAKE16PLUS-NEXT:    s_endpgm
   %add = fadd half %a, 1.0
   %div2 = fmul half %add, 0.5
   store half %div2, ptr addrspace(1) poison
diff --git a/llvm/test/CodeGen/AMDGPU/vopc_dpp.mir b/llvm/test/CodeGen/AMDGPU/vopc_dpp.mir
index d07691997d6c1..8c7e3834fcc5c 100644
--- a/llvm/test/CodeGen/AMDGPU/vopc_dpp.mir
+++ b/llvm/test/CodeGen/AMDGPU/vopc_dpp.mir
@@ -1,6 +1,5 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -run-pass=gcn-dpp-combine -verify-machineinstrs -o - %s | FileCheck %s -check-prefixes=GCN,GCN-TRUE16
-# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -run-pass=gcn-dpp-combine -verify-machineinstrs -o - %s | FileCheck %s -check-prefixes=GCN,GCN-FAKE16
+# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -run-pass=gcn-dpp-combine -verify-machineinstrs -o - %s | FileCheck %s -check-prefix=GCN
 
 ---
 
@@ -10,51 +9,27 @@ body:             |
   bb.0:
     liveins: $vgpr0, $vgpr1, $vgpr2
 
-    ; GCN-TRUE16-LABEL: name: vopc
-    ; GCN-TRUE16: liveins: $vgpr0, $vgpr1, $vgpr2
-    ; GCN-TRUE16-NEXT: {{  $}}
-    ; GCN-TRUE16-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
-    ; GCN-TRUE16-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
-    ; GCN-TRUE16-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
-    ; GCN-TRUE16-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
-    ; GCN-TRUE16-NEXT: V_CMP_LT_F32_e32_dpp 0, [[COPY1]], 0, [[COPY]], 1, 15, 15, 1, implicit-def $vcc, implicit $mode, implicit $exec
-    ; GCN-TRUE16-NEXT: [[V_MOV_B32_dpp:%[0-9]+]]:vgpr_32 = V_MOV_B32_dpp [[DEF]], [[COPY1]], 1, 15, 15, 1, implicit $exec
-    ; GCN-TRUE16-NEXT: V_CMPX_EQ_I16_fake16_nosdst_e64 [[V_MOV_B32_dpp]], [[COPY]], implicit-def $exec, implicit-def $vcc_lo, implicit $mode, implicit $exec
-    ; GCN-TRUE16-NEXT: [[V_MOV_B32_dpp1:%[0-9]+]]:vgpr_32 = V_MOV_B32_dpp [[DEF]], [[COPY1]], 1, 15, 15, 1, implicit $exec
-    ; GCN-TRUE16-NEXT: [[V_CMP_CLASS_F16_fake16_e64_:%[0-9]+]]:sgpr_32 = V_CMP_CLASS_F16_fake16_e64 0, [[V_MOV_B32_dpp1]], 0, [[COPY]], implicit-def $vcc_lo, implicit $mode, implicit $exec
-    ; GCN-TRUE16-NEXT: [[V_MOV_B32_dpp2:%[0-9]+]]:vgpr_32 = V_MOV_B32_dpp [[DEF]], [[COPY1]], 1, 15, 15, 1, implicit $exec
-    ; GCN-TRUE16-NEXT: [[V_CMP_GE_F16_fake16_e64_:%[0-9]+]]:sgpr_32 = V_CMP_GE_F16_fake16_e64 1, [[V_MOV_B32_dpp2]], 0, [[COPY]], 1, implicit $mode, implicit $exec
-    ; GCN-TRUE16-NEXT: [[V_MOV_B32_dpp3:%[0-9]+]]:vgpr_32 = V_MOV_B32_dpp [[DEF]], [[COPY1]], 1, 15, 15, 1, implicit $exec
-    ; GCN-TRUE16-NEXT: V_CMPX_GT_U32_nosdst_e64 [[V_MOV_B32_dpp3]], [[COPY]], implicit-def $exec, implicit $mode, implicit $exec
-    ; GCN-TRUE16-NEXT: V_CMP_CLASS_F32_e32_dpp 2, [[COPY1]], [[COPY]], 1, 15, 15, 1, implicit-def $vcc, implicit $exec
-    ; GCN-TRUE16-NEXT: V_CMP_NGE_F32_e32_dpp 0, [[COPY1]], 0, [[COPY]], 1, 15, 15, 1, implicit-def $vcc, implicit $mode, implicit $exec
-    ; GCN-TRUE16-NEXT: [[V_MOV_B32_dpp4:%[0-9]+]]:vgpr_32 = V_MOV_B32_dpp [[DEF]], [[COPY1]], 1, 15, 15, 1, implicit $exec
-    ; GCN-TRUE16-NEXT: [[V_CMP_NGE_F16_fake16_e64_:%[0-9]+]]:sgpr_32 = V_CMP_NGE_F16_fake16_e64 0, [[V_CMP_NGE_F16_fake16_e64_]], 0, [[COPY]], 0, implicit $mode, implicit $exec
-    ; GCN-TRUE16-NEXT: [[V_CMP_NGE_F32_e64_dpp:%[0-9]+]]:sgpr_32 = V_CMP_NGE_F32_e64_dpp 0, [[COPY1]], 0, [[COPY]], 0, 1, 15, 15, 1, implicit $mode, implicit $exec
-    ; GCN-TRUE16-NEXT: [[S_AND_B32_:%[0-9]+]]:sgpr_32 = S_AND_B32 [[V_CMP_NGE_F32_e64_dpp]], 10101, implicit-def $scc
-    ; GCN-TRUE16-NEXT: V_CMP_GT_I32_e32_dpp [[COPY1]], [[COPY]], 1, 15, 15, 1, implicit-def $vcc, implicit $exec
-    ;
-    ; GCN-FAKE16-LABEL: name: vopc
-    ; GCN-FAKE16: liveins: $vgpr0, $vgpr1, $vgpr2
-    ; GCN-FAKE16-NEXT: {{  $}}
-    ; GCN-FAKE16-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
-    ; GCN-FAKE16-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
-    ; GCN-FAKE16-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
-    ; GCN-FAKE16-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
-    ; GCN-FAKE16-NEXT: V_CMP_LT_F32_e32_dpp 0, [[COPY1]], 0, [[COPY]], 1, 15, 15, 1, implicit-def $vcc, implicit $mode, implicit $exec
-    ; GCN-FAKE16-NEXT: [[V_MOV_B32_dpp:%[0-9]+]]:vgpr_32 = V_MOV_B32_dpp [[DEF]], [[COPY1]], 1, 15, 15, 1, implicit $exec
-    ; GCN-FAKE16-NEXT: V_CMPX_EQ_I16_fake16_nosdst_e64 [[V_MOV_B32_dpp]], [[COPY]], implicit-def $exec, implicit-def $vcc_lo, implicit $mode, implicit $exec
-    ; GCN-FAKE16-NEXT: [[V_CMP_CLASS_F16_fake16_e64_dpp:%[0-9]+]]:sgpr_32 = V_CMP_CLASS_F16_fake16_e64_dpp 0, [[COPY1]], 0, [[COPY]], 1, 15, 15, 1, implicit $exec
-    ; GCN-FAKE16-NEXT: [[V_CMP_GE_F16_fake16_e64_dpp:%[0-9]+]]:sgpr_32 = V_CMP_GE_F16_fake16_e64_dpp 1, [[COPY1]], 0, [[COPY]], 1, 1, 15, 15, 1, implicit $mode, implicit $exec
-    ; GCN-FAKE16-NEXT: [[V_MOV_B32_dpp1:%[0-9]+]]:vgpr_32 = V_MOV_B32_dpp [[DEF]], [[COPY1]], 1, 15, 15, 1, implicit $exec
-    ; GCN-FAKE16-NEXT: V_CMPX_GT_U32_nosdst_e64 [[V_MOV_B32_dpp1]], [[COPY]], implicit-def $exec, implicit $mode, implicit $exec
-    ; GCN-FAKE16-NEXT: V_CMP_CLASS_F32_e32_dpp 2, [[COPY1]], [[COPY]], 1, 15, 15, 1, implicit-def $vcc, implicit $exec
-    ; GCN-FAKE16-NEXT: V_CMP_NGE_F32_e32_dpp 0, [[COPY1]], 0, [[COPY]], 1, 15, 15, 1, implicit-def $vcc, implicit $mode, implicit $exec
-    ; GCN-FAKE16-NEXT: [[V_MOV_B32_dpp2:%[0-9]+]]:vgpr_32 = V_MOV_B32_dpp [[DEF]], [[COPY1]], 1, 15, 15, 1, implicit $exec
-    ; GCN-FAKE16-NEXT: [[V_CMP_NGE_F16_fake16_e64_:%[0-9]+]]:sgpr_32 = V_CMP_NGE_F16_fake16_e64 0, [[V_CMP_NGE_F16_fake16_e64_]], 0, [[COPY]], 0, implicit $mode, implicit $exec
-    ; GCN-FAKE16-NEXT: [[V_CMP_NGE_F32_e64_dpp:%[0-9]+]]:sgpr_32 = V_CMP_NGE_F32_e64_dpp 0, [[COPY1]], 0, [[COPY]], 0, 1, 15, 15, 1, implicit $mode, implicit $exec
-    ; GCN-FAKE16-NEXT: [[S_AND_B32_:%[0-9]+]]:sgpr_32 = S_AND_B32 [[V_CMP_NGE_F32_e64_dpp]], 10101, implicit-def $scc
-    ; GCN-FAKE16-NEXT: V_CMP_GT_I32_e32_dpp [[COPY1]], [[COPY]], 1, 15, 15, 1, implicit-def $vcc, implicit $exec
+    ; GCN-LABEL: name: vopc
+    ; GCN: liveins: $vgpr0, $vgpr1, $vgpr2
+    ; GCN-NEXT: {{  $}}
+    ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+    ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
+    ; GCN-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
+    ; GCN-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
+    ; GCN-NEXT: V_CMP_LT_F32_e32_dpp 0, [[COPY1]], 0, [[COPY]], 1, 15, 15, 1, implicit-def $vcc, implicit $mode, implicit $exec
+    ; GCN-NEXT: [[V_MOV_B32_dpp:%[0-9]+]]:vgpr_32 = V_MOV_B32_dpp [[DEF]], [[COPY1]], 1, 15, 15, 1, implicit $exec
+    ; GCN-NEXT: V_CMPX_EQ_I16_fake16_nosdst_e64 [[V_MOV_B32_dpp]], [[COPY]], implicit-def $exec, implicit-def $vcc_lo, implicit $mode, implicit $exec
+    ; GCN-NEXT: [[V_CMP_CLASS_F16_fake16_e64_dpp:%[0-9]+]]:sgpr_32 = V_CMP_CLASS_F16_fake16_e64_dpp 0, [[COPY1]], 0, [[COPY]], 1, 15, 15, 1, implicit $exec
+    ; GCN-NEXT: [[V_CMP_GE_F16_fake16_e64_dpp:%[0-9]+]]:sgpr_32 = V_CMP_GE_F16_fake16_e64_dpp 1, [[COPY1]], 0, [[COPY]], 1, 1, 15, 15, 1, implicit $mode, implicit $exec
+    ; GCN-NEXT: [[V_MOV_B32_dpp1:%[0-9]+]]:vgpr_32 = V_MOV_B32_dpp [[DEF]], [[COPY1]], 1, 15, 15, 1, implicit $exec
+    ; GCN-NEXT: V_CMPX_GT_U32_nosdst_e64 [[V_MOV_B32_dpp1]], [[COPY]], implicit-def $exec, implicit $mode, implicit $exec
+    ; GCN-NEXT: V_CMP_CLASS_F32_e32_dpp 2, [[COPY1]], [[COPY]], 1, 15, 15, 1, implicit-def $vcc, implicit $exec
+    ; GCN-NEXT: V_CMP_NGE_F32_e32_dpp 0, [[COPY1]], 0, [[COPY]], 1, 15, 15, 1, implicit-def $vcc, implicit $mode, implicit $exec
+    ; GCN-NEXT: [[V_MOV_B32_dpp2:%[0-9]+]]:vgpr_32 = V_MOV_B32_dpp [[DEF]], [[COPY1]], 1, 15, 15, 1, implicit $exec
+    ; GCN-NEXT: [[V_CMP_NGE_F16_fake16_e64_:%[0-9]+]]:sgpr_32 = V_CMP_NGE_F16_fake16_e64 0, [[V_CMP_NGE_F16_fake16_e64_]], 0, [[COPY]], 0, implicit $mode, implicit $exec
+    ; GCN-NEXT: [[V_CMP_NGE_F32_e64_dpp:%[0-9]+]]:sgpr_32 = V_CMP_NGE_F32_e64_dpp 0, [[COPY1]], 0, [[COPY]], 0, 1, 15, 15, 1, implicit $mode, implicit $exec
+    ; GCN-NEXT: [[S_AND_B32_:%[0-9]+]]:sgpr_32 = S_AND_B32 [[V_CMP_NGE_F32_e64_dpp]], 10101, implicit-def $scc
+    ; GCN-NEXT: V_CMP_GT_I32_e32_dpp [[COPY1]], [[COPY]], 1, 15, 15, 1, implicit-def $vcc, implicit $exec
     %0:vgpr_32 = COPY $vgpr0
     %1:vgpr_32 = COPY $vgpr1
     %2:vgpr_32 = COPY $vgpr2