diff --git a/llvm/include/llvm/IR/InlineAsm.h b/llvm/include/llvm/IR/InlineAsm.h index e5f506e5694da..c3c3ed33adda9 100644 --- a/llvm/include/llvm/IR/InlineAsm.h +++ b/llvm/include/llvm/IR/InlineAsm.h @@ -84,7 +84,7 @@ class InlineAsm final : public Value { FunctionType *getFunctionType() const; const std::string &getAsmString() const { return AsmString; } - const std::string &getConstraintString() const { return Constraints; } + StringRef getConstraintString() const { return Constraints; } void collectAsmStrs(SmallVectorImpl &AsmStrs) const; /// This static method can be used by the parser to check to see if the diff --git a/llvm/lib/Bitcode/Reader/BitcodeReader.cpp b/llvm/lib/Bitcode/Reader/BitcodeReader.cpp index a7fbb0c74cb1e..1e07f060d72cb 100644 --- a/llvm/lib/Bitcode/Reader/BitcodeReader.cpp +++ b/llvm/lib/Bitcode/Reader/BitcodeReader.cpp @@ -6022,7 +6022,7 @@ Error BitcodeReader::parseFunctionBody(Function *F) { FunctionType::get(FTy->getReturnType(), ArgTys, FTy->isVarArg()); // Update constraint string to use label constraints. - std::string Constraints = IA->getConstraintString(); + std::string Constraints = IA->getConstraintString().str(); unsigned ArgNo = 0; size_t Pos = 0; for (const auto &CI : ConstraintInfo) { diff --git a/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp b/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp index ef397879a132c..158b0a669acb1 100644 --- a/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp +++ b/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp @@ -2805,7 +2805,7 @@ void ModuleBitcodeWriter::writeConstants(unsigned FirstVal, unsigned LastVal, Record.append(AsmStr.begin(), AsmStr.end()); // Add the constraint string. - const std::string &ConstraintStr = IA->getConstraintString(); + StringRef ConstraintStr = IA->getConstraintString(); Record.push_back(ConstraintStr.size()); Record.append(ConstraintStr.begin(), ConstraintStr.end()); Stream.EmitRecord(bitc::CST_CODE_INLINEASM, Record); diff --git a/llvm/lib/IR/Core.cpp b/llvm/lib/IR/Core.cpp index 0e062ba819776..a3cedcfd41095 100644 --- a/llvm/lib/IR/Core.cpp +++ b/llvm/lib/IR/Core.cpp @@ -529,11 +529,10 @@ const char *LLVMGetInlineAsmAsmString(LLVMValueRef InlineAsmVal, size_t *Len) { const char *LLVMGetInlineAsmConstraintString(LLVMValueRef InlineAsmVal, size_t *Len) { Value *Val = unwrap(InlineAsmVal); - const std::string &ConstraintString = - cast(Val)->getConstraintString(); + StringRef ConstraintString = cast(Val)->getConstraintString(); - *Len = ConstraintString.length(); - return ConstraintString.c_str(); + *Len = ConstraintString.size(); + return ConstraintString.data(); } LLVMInlineAsmDialect LLVMGetInlineAsmDialect(LLVMValueRef InlineAsmVal) { diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index 878f6878c2b60..fde7f04cc1747 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -20276,9 +20276,9 @@ bool ARMTargetLowering::ExpandInlineAsm(CallInst *CI) const { SplitString(AsmStr, AsmPieces, " \t,"); // rev $0, $1 - if (AsmPieces.size() == 3 && - AsmPieces[0] == "rev" && AsmPieces[1] == "$0" && AsmPieces[2] == "$1" && - IA->getConstraintString().compare(0, 4, "=l,l") == 0) { + if (AsmPieces.size() == 3 && AsmPieces[0] == "rev" && + AsmPieces[1] == "$0" && AsmPieces[2] == "$1" && + IA->getConstraintString().starts_with("=l,l")) { IntegerType *Ty = dyn_cast(CI->getType()); if (Ty && Ty->getBitWidth() == 32) return IntrinsicLowering::LowerToByteSwap(CI); diff --git a/llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp b/llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp index 2a736c91c05c7..5ce3c7b35493b 100644 --- a/llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp +++ b/llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp @@ -1979,7 +1979,7 @@ void DXILBitcodeWriter::writeConstants(unsigned FirstVal, unsigned LastVal, Record.append(AsmStr.begin(), AsmStr.end()); // Add the constraint string. - const std::string &ConstraintStr = IA->getConstraintString(); + StringRef ConstraintStr = IA->getConstraintString(); Record.push_back(ConstraintStr.size()); Record.append(ConstraintStr.begin(), ConstraintStr.end()); Stream.EmitRecord(bitc::CST_CODE_INLINEASM, Record); diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 231b677c300a1..9f75fe8803cda 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -60860,7 +60860,7 @@ bool X86TargetLowering::ExpandInlineAsm(CallInst *CI) const { // rorw $$8, ${0:w} --> llvm.bswap.i16 if (CI->getType()->isIntegerTy(16) && - IA->getConstraintString().compare(0, 5, "=r,0,") == 0 && + IA->getConstraintString().starts_with("=r,0,") && (matchAsm(AsmPieces[0], {"rorw", "$$8,", "${0:w}"}) || matchAsm(AsmPieces[0], {"rolw", "$$8,", "${0:w}"}))) { AsmPieces.clear(); @@ -60873,7 +60873,7 @@ bool X86TargetLowering::ExpandInlineAsm(CallInst *CI) const { break; case 3: if (CI->getType()->isIntegerTy(32) && - IA->getConstraintString().compare(0, 5, "=r,0,") == 0 && + IA->getConstraintString().starts_with("=r,0,") && matchAsm(AsmPieces[0], {"rorw", "$$8,", "${0:w}"}) && matchAsm(AsmPieces[1], {"rorl", "$$16,", "$0"}) && matchAsm(AsmPieces[2], {"rorw", "$$8,", "${0:w}"})) {