From 8add945cb6622e7ae52a5a469f2c4f2bd6618a1a Mon Sep 17 00:00:00 2001 From: pvanhout Date: Wed, 21 May 2025 15:20:07 +0200 Subject: [PATCH 1/2] [CodeGen] Add SSID & Atomic Ordering to IntrinsicInfo getTgtMemIntrinsic should be able to propagate such information to the MMO --- llvm/include/llvm/CodeGen/TargetLowering.h | 3 +++ llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 5 +++-- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 13 ++++++++++--- 3 files changed, 16 insertions(+), 5 deletions(-) diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h index 03099e9ad44dc..ef44c117acd1a 100644 --- a/llvm/include/llvm/CodeGen/TargetLowering.h +++ b/llvm/include/llvm/CodeGen/TargetLowering.h @@ -1214,6 +1214,9 @@ class TargetLoweringBase { struct IntrinsicInfo { unsigned opc = 0; // target opcode EVT memVT; // memory VT + SyncScope::ID ssid = SyncScope::System; + AtomicOrdering order = AtomicOrdering::NotAtomic; + AtomicOrdering failureOrder = AtomicOrdering::NotAtomic; // value representing memory location PointerUnion ptrVal; diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp index 8ab2533afc15f..051d220255876 100644 --- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp +++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -2847,8 +2847,9 @@ bool IRTranslator::translateCall(const User &U, MachineIRBuilder &MIRBuilder) { MPI = MachinePointerInfo(Info.ptrVal, Info.offset); else if (Info.fallbackAddressSpace) MPI = MachinePointerInfo(*Info.fallbackAddressSpace); - MIB.addMemOperand( - MF->getMachineMemOperand(MPI, Info.flags, MemTy, Alignment, CI.getAAMetadata())); + MIB.addMemOperand(MF->getMachineMemOperand( + MPI, Info.flags, MemTy, Alignment, CI.getAAMetadata(), + /*Ranges=*/nullptr, Info.ssid, Info.order, Info.failureOrder)); } if (CI.isConvergent()) { diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index e32fcfe6148df..434484b671bf2 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -5305,9 +5305,16 @@ void SelectionDAGBuilder::visitTargetIntrinsic(const CallInst &I, MPI = MachinePointerInfo(Info.ptrVal, Info.offset); else if (Info.fallbackAddressSpace) MPI = MachinePointerInfo(*Info.fallbackAddressSpace); - Result = DAG.getMemIntrinsicNode( - Info.opc, getCurSDLoc(), VTs, Ops, Info.memVT, MPI, Info.align, - Info.flags, LocationSize::precise(Info.size), I.getAAMetadata()); + EVT MemVT = Info.memVT; + LocationSize Size = LocationSize::precise(Info.size); + if (Size.hasValue() && !Size.getValue()) + Size = LocationSize::precise(MemVT.getStoreSize()); + Align Alignment = Info.align.value_or(DAG.getEVTAlign(MemVT)); + MachineMemOperand *MMO = DAG.getMachineFunction().getMachineMemOperand( + MPI, Info.flags, Size, Alignment, I.getAAMetadata(), /*Ranges=*/nullptr, + Info.ssid, Info.order, Info.failureOrder); + Result = + DAG.getMemIntrinsicNode(Info.opc, getCurSDLoc(), VTs, Ops, MemVT, MMO); } else if (!HasChain) { Result = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, getCurSDLoc(), VTs, Ops); } else if (!I.getType()->isVoidTy()) { From 7dc163c3c5b6a030132083ac0ee9e0741d45f2b4 Mon Sep 17 00:00:00 2001 From: pvanhout Date: Thu, 22 May 2025 09:43:22 +0200 Subject: [PATCH 2/2] reorder fields --- llvm/include/llvm/CodeGen/TargetLowering.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h index ef44c117acd1a..32f9fa533381f 100644 --- a/llvm/include/llvm/CodeGen/TargetLowering.h +++ b/llvm/include/llvm/CodeGen/TargetLowering.h @@ -1214,9 +1214,6 @@ class TargetLoweringBase { struct IntrinsicInfo { unsigned opc = 0; // target opcode EVT memVT; // memory VT - SyncScope::ID ssid = SyncScope::System; - AtomicOrdering order = AtomicOrdering::NotAtomic; - AtomicOrdering failureOrder = AtomicOrdering::NotAtomic; // value representing memory location PointerUnion ptrVal; @@ -1231,6 +1228,9 @@ class TargetLoweringBase { MaybeAlign align = Align(1); // alignment MachineMemOperand::Flags flags = MachineMemOperand::MONone; + SyncScope::ID ssid = SyncScope::System; + AtomicOrdering order = AtomicOrdering::NotAtomic; + AtomicOrdering failureOrder = AtomicOrdering::NotAtomic; IntrinsicInfo() = default; };