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[DAG] Fold (and X, (add (not Y), Z)) -> (and X, (not (sub Y, Z))). #141476

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Merged
merged 9 commits into from
Jun 16, 2025
Merged

[DAG] Fold (and X, (add (not Y), Z)) -> (and X, (not (sub Y, Z))). #141476

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b45efac
[DAG] Fold (bitwiseop X, (add (not Y), Z)) -> (bitwiseop X, (not (sub…
simonzgx May 26, 2025
d014f09
Fix failed UTs and resolve comments.
simonzgx May 28, 2025
8b7ac35
Add new test cases and reformat code.
simonzgx May 29, 2025
132ffaa
Fix comments.
simonzgx May 29, 2025
ccf66b0
Fix comments: do not fold XORNOT/ORNOT & update test.
simonzgx Jun 2, 2025
4df00b7
Fix comments.
simonzgx Jun 3, 2025
5b9c7c5
Merge branch 'main' into fix-missed-opt
simonzgx Jun 15, 2025
28b2ad6
Fix comments.
simonzgx Jun 16, 2025
8623f29
Merge branch 'main' into fix-missed-opt
RKSimon Jun 16, 2025
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45 changes: 45 additions & 0 deletions llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -396,6 +396,8 @@ namespace {
bool PromoteLoad(SDValue Op);

SDValue foldShiftToAvg(SDNode *N);
// Fold `a bitwiseop (~b +/- c)` -> `a bitwiseop ~(b -/+ c)`
SDValue foldBitwiseOpWithNeg(SDNode *N);

SDValue combineMinNumMaxNum(const SDLoc &DL, EVT VT, SDValue LHS,
SDValue RHS, SDValue True, SDValue False,
Expand Down Expand Up @@ -7528,6 +7530,11 @@ SDValue DAGCombiner::visitAND(SDNode *N) {
return DAG.getNode(ISD::AND, DL, VT, X,
DAG.getNOT(DL, DAG.getNode(Opc, DL, VT, Y, Z), VT));

// Fold (and X, (add (not Y), Z)) -> (and X, (not (sub Y, Z)))
// Fold (and X, (sub (not Y), Z)) -> (and X, (not (add Y, Z)))
if (SDValue Folded = foldBitwiseOpWithNeg(N))
return Folded;

// Fold (and (srl X, C), 1) -> (srl X, BW-1) for signbit extraction
// If we are shifting down an extended sign bit, see if we can simplify
// this to shifting the MSB directly to expose further simplifications.
Expand Down Expand Up @@ -8205,6 +8212,11 @@ SDValue DAGCombiner::visitOR(SDNode *N) {
}
}

// Fold (or X, (add (not Y), Z)) -> (or X, (not (sub Y, Z)))
// Fold (or X, (sub (not Y), Z)) -> (or X, (not (add Y, Z)))
if (SDValue Folded = foldBitwiseOpWithNeg(N))
return Folded;

// fold (or x, 0) -> x
if (isNullConstant(N1))
return N0;
Expand Down Expand Up @@ -9856,6 +9868,10 @@ SDValue DAGCombiner::visitXOR(SDNode *N) {
return DAG.getNode(ISD::ROTL, DL, VT, DAG.getSignedConstant(~1, DL, VT),
N0.getOperand(1));
}
// Fold (xor X, (add (not Y), Z)) -> (xor X, (not (sub Y, Z)))
// Fold (xor X, (sub (not Y), Z)) -> (xor X, (not (add Y, Z)))
if (SDValue Folded = foldBitwiseOpWithNeg(N))
return Folded;

// Simplify: xor (op x...), (op y...) -> (op (xor x, y))
if (N0Opcode == N1.getOpcode())
Expand Down Expand Up @@ -11609,6 +11625,35 @@ SDValue DAGCombiner::foldShiftToAvg(SDNode *N) {
return DAG.getNode(FloorISD, SDLoc(N), N->getValueType(0), {A, B});
}

SDValue DAGCombiner::foldBitwiseOpWithNeg(SDNode *N) {
if (!TLI.hasAndNot(SDValue(N, 0)))
return SDValue();

unsigned Opc = N->getOpcode();
if (Opc != ISD::AND && Opc != ISD::OR && Opc != ISD::XOR)
return SDValue();

SDValue N1 = N->getOperand(1);
EVT VT = N1.getValueType();
SDLoc DL(N);
SDValue X, Y, Z, NotY;

if (sd_match(
N, m_c_BinOp(Opc, m_Value(X), m_Add(m_AllOf(m_Value(NotY), m_Not(m_Value(Y))),
m_Value(Z)))))
return DAG.getNode(Opc, DL, VT, X,
DAG.getNOT(DL, DAG.getNode(ISD::SUB, DL, VT, Y, Z), VT));

if (sd_match(N, m_c_BinOp(Opc, m_Value(X),
m_Sub(m_AllOf(m_Value(NotY), m_Not(m_Value(Y))),
m_Value(Z)))) &&
NotY->hasOneUse())
return DAG.getNode(Opc, DL, VT, X,
DAG.getNOT(DL, DAG.getNode(ISD::ADD, DL, VT, Y, Z), VT));

return SDValue();
}

/// Generate Min/Max node
SDValue DAGCombiner::combineMinNumMaxNum(const SDLoc &DL, EVT VT, SDValue LHS,
SDValue RHS, SDValue True,
Expand Down
10 changes: 4 additions & 6 deletions llvm/test/CodeGen/LoongArch/ctlz-cttz-ctpop.ll
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Expand Up @@ -885,9 +885,8 @@ define i64 @test_cttz_i64(i64 %a) nounwind {
define i8 @test_not_cttz_i8(i8 %a) nounwind {
; LA32R-LABEL: test_not_cttz_i8:
; LA32R: # %bb.0:
; LA32R-NEXT: nor $a1, $a0, $zero
; LA32R-NEXT: addi.w $a1, $a1, -1
; LA32R-NEXT: and $a0, $a0, $a1
; LA32R-NEXT: addi.w $a1, $a0, 1
; LA32R-NEXT: andn $a0, $a0, $a1
; LA32R-NEXT: srli.w $a1, $a0, 1
; LA32R-NEXT: andi $a1, $a1, 85
; LA32R-NEXT: sub.w $a0, $a0, $a1
Expand Down Expand Up @@ -921,9 +920,8 @@ define i8 @test_not_cttz_i8(i8 %a) nounwind {
define i16 @test_not_cttz_i16(i16 %a) nounwind {
; LA32R-LABEL: test_not_cttz_i16:
; LA32R: # %bb.0:
; LA32R-NEXT: nor $a1, $a0, $zero
; LA32R-NEXT: addi.w $a1, $a1, -1
; LA32R-NEXT: and $a0, $a0, $a1
; LA32R-NEXT: addi.w $a1, $a0, 1
; LA32R-NEXT: andn $a0, $a0, $a1
; LA32R-NEXT: srli.w $a1, $a0, 1
; LA32R-NEXT: lu12i.w $a2, 5
; LA32R-NEXT: ori $a2, $a2, 1365
Expand Down
33 changes: 18 additions & 15 deletions llvm/test/CodeGen/X86/fold-pcmpeqd-2.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -73,17 +73,20 @@ define void @program_1(ptr %dest, ptr %t0, <4 x float> %p0, <4 x float> %p1, <4
; X86-NEXT: xorl %esi, %esi
; X86-NEXT: xorps %xmm3, %xmm3
; X86-NEXT: movaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload
; X86-NEXT: movdqa {{[-0-9]+}}(%e{{[sb]}}p), %xmm1 ## 16-byte Reload
; X86-NEXT: movaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm1 ## 16-byte Reload
; X86-NEXT: movaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm2 ## 16-byte Reload
; X86-NEXT: calll *%esi
; X86-NEXT: movaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload
; X86-NEXT: minps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
; X86-NEXT: movaps %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill
; X86-NEXT: pxor %xmm1, %xmm1
; X86-NEXT: psubd {{[-0-9]+}}(%e{{[sb]}}p), %xmm1 ## 16-byte Folded Reload
; X86-NEXT: movdqa {{[-0-9]+}}(%e{{[sb]}}p), %xmm1 ## 16-byte Reload
; X86-NEXT: psubd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1
; X86-NEXT: movdqa {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload
; X86-NEXT: psubd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
; X86-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
; X86-NEXT: movdqa %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill
; X86-NEXT: movaps {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload
; X86-NEXT: xorps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
; X86-NEXT: movaps %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill
; X86-NEXT: movdqa {{[-0-9]+}}(%e{{[sb]}}p), %xmm0 ## 16-byte Reload
; X86-NEXT: por %xmm1, %xmm0
; X86-NEXT: movdqa %xmm0, {{[-0-9]+}}(%e{{[sb]}}p) ## 16-byte Spill
Expand All @@ -108,10 +111,8 @@ define void @program_1(ptr %dest, ptr %t0, <4 x float> %p0, <4 x float> %p1, <4
; X64-NEXT: retq
; X64-NEXT: LBB0_3: ## %forbody
; X64-NEXT: pushq %rbx
; X64-NEXT: subq $64, %rsp
; X64-NEXT: xorps %xmm0, %xmm0
; X64-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; X64-NEXT: movaps {{.*#+}} xmm1 = [1.28E+2,1.28E+2,1.28E+2,1.28E+2]
; X64-NEXT: subq $48, %rsp
; X64-NEXT: movaps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; X64-NEXT: minps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; X64-NEXT: cvttps2dq %xmm1, %xmm0
; X64-NEXT: cvtdq2ps %xmm0, %xmm0
Expand Down Expand Up @@ -162,17 +163,19 @@ define void @program_1(ptr %dest, ptr %t0, <4 x float> %p0, <4 x float> %p1, <4
; X64-NEXT: movaps (%rsp), %xmm0 ## 16-byte Reload
; X64-NEXT: minps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; X64-NEXT: movaps %xmm0, (%rsp) ## 16-byte Spill
; X64-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; X64-NEXT: psubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; X64-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; X64-NEXT: psubd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; X64-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; X64-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; X64-NEXT: psubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; X64-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; X64-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; X64-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; X64-NEXT: orps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
; X64-NEXT: xorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; X64-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; X64-NEXT: xorps %xmm3, %xmm3
; X64-NEXT: xorps %xmm4, %xmm4
; X64-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; X64-NEXT: por %xmm1, %xmm0
; X64-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
; X64-NEXT: xorps %xmm3, %xmm3
; X64-NEXT: xorps %xmm4, %xmm4
; X64-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Reload
; X64-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 ## 16-byte Reload
; X64-NEXT: movaps (%rsp), %xmm2 ## 16-byte Reload
Expand Down
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