From b4112176dbbde378271b1037ec6b59feca9e14b2 Mon Sep 17 00:00:00 2001 From: Francesco Petrogalli Date: Tue, 27 May 2025 15:18:28 -0700 Subject: [PATCH 01/16] [RISCV] Add basic MachO support. Based on a patch written by Tim Northover (https://github.com/TNorthover). --- llvm/lib/BinaryFormat/MachO.cpp | 8 +++ llvm/lib/Object/MachOObjectFile.cpp | 13 +++++ .../Target/RISCV/MCTargetDesc/CMakeLists.txt | 1 + .../RISCV/MCTargetDesc/RISCVAsmBackend.cpp | 22 +++++++- .../RISCV/MCTargetDesc/RISCVAsmBackend.h | 1 + .../RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp | 13 +++++ .../RISCV/MCTargetDesc/RISCVMCAsmInfo.h | 6 +++ .../RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp | 6 ++- .../RISCV/MCTargetDesc/RISCVMCTargetDesc.h | 3 ++ .../MCTargetDesc/RISCVMachObjectWriter.cpp | 54 +++++++++++++++++++ llvm/lib/Target/RISCV/RISCVTargetMachine.cpp | 29 ++++++++++ llvm/test/CodeGen/RISCV/riscv-macho.ll | 13 +++++ llvm/test/MC/RISCV/riscv-macho.s | 26 +++++++++ 13 files changed, 193 insertions(+), 2 deletions(-) create mode 100644 llvm/lib/Target/RISCV/MCTargetDesc/RISCVMachObjectWriter.cpp create mode 100644 llvm/test/CodeGen/RISCV/riscv-macho.ll create mode 100644 llvm/test/MC/RISCV/riscv-macho.s diff --git a/llvm/lib/BinaryFormat/MachO.cpp b/llvm/lib/BinaryFormat/MachO.cpp index f46b9d5147ff1..369b5ba927136 100644 --- a/llvm/lib/BinaryFormat/MachO.cpp +++ b/llvm/lib/BinaryFormat/MachO.cpp @@ -74,6 +74,10 @@ static Error unsupported(const char *Str, const Triple &T) { T.str().c_str()); } +static MachO::CPUSubTypeRISCV getRISCVSubType(const Triple &T) { + return MachO::CPU_SUBTYPE_RISCV_ALL; +} + Expected MachO::getCPUType(const Triple &T) { if (!T.isOSBinFormatMachO()) return unsupported("type", T); @@ -89,6 +93,8 @@ Expected MachO::getCPUType(const Triple &T) { return MachO::CPU_TYPE_POWERPC; if (T.getArch() == Triple::ppc64) return MachO::CPU_TYPE_POWERPC64; + if (T.getArch() == Triple::riscv32) + return MachO::CPU_TYPE_RISCV; return unsupported("type", T); } @@ -103,6 +109,8 @@ Expected MachO::getCPUSubType(const Triple &T) { return getARM64SubType(T); if (T.getArch() == Triple::ppc || T.getArch() == Triple::ppc64) return getPowerPCSubType(T); + if (T.getArch() == Triple::riscv32) + return getRISCVSubType(T); return unsupported("subtype", T); } diff --git a/llvm/lib/Object/MachOObjectFile.cpp b/llvm/lib/Object/MachOObjectFile.cpp index e09dc947c2779..da6cc45b2cf16 100644 --- a/llvm/lib/Object/MachOObjectFile.cpp +++ b/llvm/lib/Object/MachOObjectFile.cpp @@ -2668,6 +2668,8 @@ StringRef MachOObjectFile::getFileFormatName() const { return "Mach-O arm64 (ILP32)"; case MachO::CPU_TYPE_POWERPC: return "Mach-O 32-bit ppc"; + case MachO::CPU_TYPE_RISCV: + return "Mach-O 32-bit RISC-V"; default: return "Mach-O 32-bit unknown"; } @@ -2701,6 +2703,8 @@ Triple::ArchType MachOObjectFile::getArch(uint32_t CPUType, uint32_t CPUSubType) return Triple::ppc; case MachO::CPU_TYPE_POWERPC64: return Triple::ppc64; + case MachO::CPU_TYPE_RISCV: + return Triple::riscv32; default: return Triple::UnknownArch; } @@ -2838,6 +2842,15 @@ Triple MachOObjectFile::getArchTriple(uint32_t CPUType, uint32_t CPUSubType, default: return Triple(); } + case MachO::CPU_TYPE_RISCV: + switch (CPUSubType & ~MachO::CPU_SUBTYPE_MASK) { + case MachO::CPU_SUBTYPE_RISCV_ALL: + if (ArchFlag) + *ArchFlag = "riscv32"; + return Triple("riscv32-apple-macho"); + default: + return Triple(); + } default: return Triple(); } diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/CMakeLists.txt b/llvm/lib/Target/RISCV/MCTargetDesc/CMakeLists.txt index e68c956f888e4..1a8dd50327dde 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/CMakeLists.txt +++ b/llvm/lib/Target/RISCV/MCTargetDesc/CMakeLists.txt @@ -3,6 +3,7 @@ add_llvm_component_library(LLVMRISCVDesc RISCVBaseInfo.cpp RISCVELFObjectWriter.cpp RISCVInstPrinter.cpp + RISCVMachObjectWriter.cpp RISCVMCAsmInfo.cpp RISCVMCCodeEmitter.cpp RISCVMCExpr.cpp diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp index 41a9c92cf99c3..34b8b3ca4a8c8 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp @@ -14,6 +14,7 @@ #include "llvm/MC/MCContext.h" #include "llvm/MC/MCELFObjectWriter.h" #include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCMachObjectWriter.h" #include "llvm/MC/MCObjectWriter.h" #include "llvm/MC/MCSymbol.h" #include "llvm/MC/MCValue.h" @@ -954,12 +955,31 @@ RISCVAsmBackend::createObjectTargetWriter() const { return createRISCVELFObjectWriter(OSABI, Is64Bit); } +class DarwinRISCVAsmBackend : public RISCVAsmBackend { +public: + DarwinRISCVAsmBackend(const MCSubtargetInfo &STI, uint8_t OSABI, bool Is64Bit, + bool IsLittleEndian, + const MCTargetOptions &Options) + : RISCVAsmBackend(STI, OSABI, Is64Bit, IsLittleEndian, Options) {} + + std::unique_ptr + createObjectTargetWriter() const override { + const Triple &TT = STI.getTargetTriple(); + uint32_t CPUType = cantFail(MachO::getCPUType(TT)); + uint32_t CPUSubType = cantFail(MachO::getCPUSubType(TT)); + return createRISCVMachObjectWriter(CPUType, CPUSubType); + } +}; + MCAsmBackend *llvm::createRISCVAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options) { const Triple &TT = STI.getTargetTriple(); uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS()); + if (TT.isOSBinFormatMachO()) + return new DarwinRISCVAsmBackend(STI, OSABI, TT.isArch64Bit(), TT.isLittleEndian(), + Options); return new RISCVAsmBackend(STI, OSABI, TT.isArch64Bit(), TT.isLittleEndian(), - Options); + Options); } diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h index 5152d054cb177..b5b1ab901d534 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h @@ -22,6 +22,7 @@ class MCObjectTargetWriter; class raw_ostream; class RISCVAsmBackend : public MCAsmBackend { +protected: const MCSubtargetInfo &STI; uint8_t OSABI; bool Is64Bit; diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp index 77f65d814ce7a..ea8d9e0b9e600 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp @@ -58,3 +58,16 @@ void RISCVMCAsmInfo::printSpecifierExpr(raw_ostream &OS, if (HasSpecifier) OS << ')'; } + +RISCVMCAsmInfoDarwin::RISCVMCAsmInfoDarwin() { + CodePointerSize = 4; + PrivateGlobalPrefix = "L"; + PrivateLabelPrefix = "L"; + SeparatorString = "%%"; + CommentString = ";"; + AlignmentIsInBytes = false; + SupportsDebugInformation = true; + ExceptionsType = ExceptionHandling::DwarfCFI; + Data16bitsDirective = "\t.half\t"; + Data32bitsDirective = "\t.word\t"; +} diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.h index 097e94b6117c7..568ef1998d4d2 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.h +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.h @@ -13,6 +13,7 @@ #ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVMCASMINFO_H #define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVMCASMINFO_H +#include "llvm/MC/MCAsmInfoDarwin.h" #include "llvm/MC/MCAsmInfoELF.h" #include "llvm/MC/MCFixup.h" @@ -50,6 +51,11 @@ Specifier parseSpecifierName(StringRef name); StringRef getSpecifierName(Specifier Kind); } // namespace RISCV +class RISCVMCAsmInfoDarwin : public MCAsmInfoDarwin { +public: + explicit RISCVMCAsmInfoDarwin(); +}; + } // namespace llvm #endif diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp index d917ef4129791..e2393185ad715 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp @@ -60,7 +60,11 @@ static MCRegisterInfo *createRISCVMCRegisterInfo(const Triple &TT) { static MCAsmInfo *createRISCVMCAsmInfo(const MCRegisterInfo &MRI, const Triple &TT, const MCTargetOptions &Options) { - MCAsmInfo *MAI = new RISCVMCAsmInfo(TT); + MCAsmInfo *MAI = nullptr; + if (TT.isOSBinFormatELF()) + MAI = new RISCVMCAsmInfo(TT); + else if (TT.isOSBinFormatMachO()) + MAI = new RISCVMCAsmInfoDarwin(); unsigned SP = MRI.getDwarfRegNum(RISCV::X2, true); MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(nullptr, SP, 0); diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h index bdee7ed4f011e..2a4afdb05d0f1 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h @@ -36,6 +36,9 @@ MCAsmBackend *createRISCVAsmBackend(const Target &T, const MCSubtargetInfo &STI, std::unique_ptr createRISCVELFObjectWriter(uint8_t OSABI, bool Is64Bit); +std::unique_ptr +createRISCVMachObjectWriter(uint32_t CPUType, uint32_t CPUSubtype); + } // namespace llvm // Defines symbolic names for RISC-V registers. diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMachObjectWriter.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMachObjectWriter.cpp new file mode 100644 index 0000000000000..ae33d5dc78062 --- /dev/null +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMachObjectWriter.cpp @@ -0,0 +1,54 @@ +//===-- RISCVMachObjectWriter.cpp - RISC-V Mach Object Writer -------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "MCTargetDesc/RISCVFixupKinds.h" +#include "MCTargetDesc/RISCVMCTargetDesc.h" +#include "llvm/ADT/StringExtras.h" +#include "llvm/ADT/Twine.h" +#include "llvm/BinaryFormat/MachO.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCAssembler.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCFixup.h" +#include "llvm/MC/MCMachObjectWriter.h" +#include "llvm/MC/MCSection.h" +#include "llvm/MC/MCSectionMachO.h" +#include "llvm/MC/MCSymbol.h" +#include "llvm/MC/MCValue.h" +#include "llvm/Support/Casting.h" +#include "llvm/Support/MathExtras.h" +#include +#include + +using namespace llvm; + +namespace { + +class RISCVMachObjectWriter : public MCMachObjectTargetWriter { +public: + RISCVMachObjectWriter(uint32_t CPUType, uint32_t CPUSubtype) + : MCMachObjectTargetWriter(false, CPUType, CPUSubtype) {} + + void recordRelocation(MachObjectWriter *Writer, MCAssembler &Asm, + const MCFragment *Fragment, const MCFixup &Fixup, + MCValue Target, uint64_t &FixedValue) override; +}; + +} // end anonymous namespace + +void RISCVMachObjectWriter::recordRelocation( + MachObjectWriter *Writer, MCAssembler &Asm, const MCFragment *Fragment, + const MCFixup &Fixup, MCValue Target, uint64_t &FixedValue) { + llvm_unreachable("unimplemented"); +} + +std::unique_ptr +llvm::createRISCVMachObjectWriter(uint32_t CPUType, uint32_t CPUSubtype) { + return std::make_unique(CPUType, CPUSubtype); +} diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp index f81b1e1260ee3..d0a0a58a16125 100644 --- a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp +++ b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp @@ -141,11 +141,40 @@ extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVTarget() { initializeRISCVAsmPrinterPass(*PR); } +static StringRef computeDataLayout(const Triple &TT, + const TargetOptions &Options) { + StringRef ABIName = Options.MCOptions.getABIName(); + if (TT.isOSBinFormatMachO()) + return "e-m:o-p:32:32-i64:64-n32-S128"; + + if (TT.isArch64Bit()) { + if (ABIName == "lp64e") + return "e-m:e-p:64:64-i64:64-i128:128-n32:64-S64"; + + return "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128"; + } + assert(TT.isArch32Bit() && "only RV32 and RV64 are currently supported"); + + if (ABIName == "ilp32e") + return "e-m:e-p:32:32-i64:64-n32-S32"; + + return "e-m:e-p:32:32-i64:64-n32-S128"; +} + static Reloc::Model getEffectiveRelocModel(const Triple &TT, std::optional RM) { return RM.value_or(Reloc::Static); } +static std::unique_ptr createTLOF(const Triple &TT) { + if (TT.isOSBinFormatELF()) + return std::make_unique(); + else if (TT.isOSBinFormatMachO()) + return std::make_unique(); + else + return std::unique_ptr(); +} + RISCVTargetMachine::RISCVTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, diff --git a/llvm/test/CodeGen/RISCV/riscv-macho.ll b/llvm/test/CodeGen/RISCV/riscv-macho.ll new file mode 100644 index 0000000000000..19d5fc026bbee --- /dev/null +++ b/llvm/test/CodeGen/RISCV/riscv-macho.ll @@ -0,0 +1,13 @@ +; RUN: llc -mtriple=riscv32-apple-macho %s -o - | FileCheck %s +; RUN: llc -mtriple=riscv32-apple-macho -filetype=obj %s -o %t.o +; RUN: llvm-objdump -d %t.o | FileCheck %s --check-prefix=CHECK-OBJ + +; CHECK-LABEL: _main: +; CHECK: li a0, 0 +; CHECK: ret + +; CHECK-OBJ: li a0, 0 +; CHECK-OBJ: ret +define i32 @main() nounwind { + ret i32 0 +} diff --git a/llvm/test/MC/RISCV/riscv-macho.s b/llvm/test/MC/RISCV/riscv-macho.s new file mode 100644 index 0000000000000..f2cec7bf08ebb --- /dev/null +++ b/llvm/test/MC/RISCV/riscv-macho.s @@ -0,0 +1,26 @@ +; RUN: llvm-mc -triple riscv32-apple-macho %s -o - | FileCheck %s +; RUN: llvm-mc -triple riscv32-apple-macho -filetype=obj %s -o %t.o +; RUN: llvm-objdump -d %t.o | FileCheck %s --check-prefix=CHECK-DIS +; RUN: llvm-nm %t.o | FileCheck %s --check-prefix=CHECK-SYMS + + nop + .half 42 + .word 42 +Lfoo: +lfoo: +foo: + +; CHECK: nop +; CHECK: .half 42 +; CHECK: .word 42 + +; CHECK-DIS: file format mach-o 32-bit risc-v +; CHECK-DIS: Disassembly of section __TEXT,__text: +; CHECK-DIS: nop +; CHECK-DIS: 002a +; CHECK-DIS: 002a +; CHECK-DIS: 0000 + +; CHECK-SYMS-NOT: Lfoo +; CHECK-SYMS: foo +; CHECK-SYMS: lfoo From 57c567c192f39c7f012571dfa0af7280638f1ecb Mon Sep 17 00:00:00 2001 From: Francesco Petrogalli Date: Thu, 29 May 2025 12:45:03 -0700 Subject: [PATCH 02/16] Assert on nullptr. --- llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp index e2393185ad715..68523c83c0d08 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp @@ -65,6 +65,7 @@ static MCAsmInfo *createRISCVMCAsmInfo(const MCRegisterInfo &MRI, MAI = new RISCVMCAsmInfo(TT); else if (TT.isOSBinFormatMachO()) MAI = new RISCVMCAsmInfoDarwin(); + assert(MAI && "Missing MCAsmInfo."); unsigned SP = MRI.getDwarfRegNum(RISCV::X2, true); MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(nullptr, SP, 0); From 89eb2b9cc6ef3b4dc082e857314c8260068edb12 Mon Sep 17 00:00:00 2001 From: Francesco Petrogalli Date: Thu, 29 May 2025 12:52:00 -0700 Subject: [PATCH 03/16] Assert on invalid triple/ABI. --- llvm/lib/Target/RISCV/RISCVTargetMachine.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp index d0a0a58a16125..143619a65147b 100644 --- a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp +++ b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp @@ -144,9 +144,11 @@ extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVTarget() { static StringRef computeDataLayout(const Triple &TT, const TargetOptions &Options) { StringRef ABIName = Options.MCOptions.getABIName(); - if (TT.isOSBinFormatMachO()) + if (TT.isOSBinFormatMachO()) { + assert(TT.isArch32Bit() && "Invalid triple."); + assert((ABIName != "ilp32e") && "Invalid ABI."); return "e-m:o-p:32:32-i64:64-n32-S128"; - + } if (TT.isArch64Bit()) { if (ABIName == "lp64e") return "e-m:e-p:64:64-i64:64-i128:128-n32:64-S64"; From 639dc662034e440256ccad064d2b6a29168c611b Mon Sep 17 00:00:00 2001 From: Francesco Petrogalli Date: Tue, 23 Sep 2025 11:23:57 -0700 Subject: [PATCH 04/16] Move computeDataLayout to TargetParser. [NFCI] --- llvm/lib/Target/RISCV/RISCVTargetMachine.cpp | 22 -------------------- llvm/lib/TargetParser/TargetDataLayout.cpp | 6 ++++++ 2 files changed, 6 insertions(+), 22 deletions(-) diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp index 143619a65147b..8d5caab7a2a5c 100644 --- a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp +++ b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp @@ -141,28 +141,6 @@ extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVTarget() { initializeRISCVAsmPrinterPass(*PR); } -static StringRef computeDataLayout(const Triple &TT, - const TargetOptions &Options) { - StringRef ABIName = Options.MCOptions.getABIName(); - if (TT.isOSBinFormatMachO()) { - assert(TT.isArch32Bit() && "Invalid triple."); - assert((ABIName != "ilp32e") && "Invalid ABI."); - return "e-m:o-p:32:32-i64:64-n32-S128"; - } - if (TT.isArch64Bit()) { - if (ABIName == "lp64e") - return "e-m:e-p:64:64-i64:64-i128:128-n32:64-S64"; - - return "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128"; - } - assert(TT.isArch32Bit() && "only RV32 and RV64 are currently supported"); - - if (ABIName == "ilp32e") - return "e-m:e-p:32:32-i64:64-n32-S32"; - - return "e-m:e-p:32:32-i64:64-n32-S128"; -} - static Reloc::Model getEffectiveRelocModel(const Triple &TT, std::optional RM) { return RM.value_or(Reloc::Static); diff --git a/llvm/lib/TargetParser/TargetDataLayout.cpp b/llvm/lib/TargetParser/TargetDataLayout.cpp index cea246e9527bd..0820136c6c93c 100644 --- a/llvm/lib/TargetParser/TargetDataLayout.cpp +++ b/llvm/lib/TargetParser/TargetDataLayout.cpp @@ -275,6 +275,12 @@ static std::string computeAMDDataLayout(const Triple &TT) { } static std::string computeRISCVDataLayout(const Triple &TT, StringRef ABIName) { + if (TT.isOSBinFormatMachO()) { + assert(TT.isArch32Bit() && "Invalid triple."); + assert((ABIName != "ilp32e") && "Invalid ABI."); + return "e-m:o-p:32:32-i64:64-n32-S128"; + } + std::string Ret; if (TT.isLittleEndian()) From 155e581f1575c81a7cbc5ee83e8329f236882f03 Mon Sep 17 00:00:00 2001 From: Francesco Petrogalli Date: Tue, 23 Sep 2025 13:37:03 -0700 Subject: [PATCH 05/16] Fix the test. --- llvm/test/CodeGen/RISCV/riscv-macho.ll | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/llvm/test/CodeGen/RISCV/riscv-macho.ll b/llvm/test/CodeGen/RISCV/riscv-macho.ll index 19d5fc026bbee..624321b259a73 100644 --- a/llvm/test/CodeGen/RISCV/riscv-macho.ll +++ b/llvm/test/CodeGen/RISCV/riscv-macho.ll @@ -1,6 +1,6 @@ ; RUN: llc -mtriple=riscv32-apple-macho %s -o - | FileCheck %s ; RUN: llc -mtriple=riscv32-apple-macho -filetype=obj %s -o %t.o -; RUN: llvm-objdump -d %t.o | FileCheck %s --check-prefix=CHECK-OBJ +; RUN: llvm-objdump -D %t.o | FileCheck %s --check-prefix=CHECK-OBJ ; CHECK-LABEL: _main: ; CHECK: li a0, 0 From fde002c9c5804ccdac4bb43d8130ef8c3aefd364 Mon Sep 17 00:00:00 2001 From: Francesco Petrogalli Date: Wed, 24 Sep 2025 16:00:44 -0700 Subject: [PATCH 06/16] Add assertion on endianness. --- llvm/lib/TargetParser/TargetDataLayout.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/llvm/lib/TargetParser/TargetDataLayout.cpp b/llvm/lib/TargetParser/TargetDataLayout.cpp index 0820136c6c93c..602ed9c4587de 100644 --- a/llvm/lib/TargetParser/TargetDataLayout.cpp +++ b/llvm/lib/TargetParser/TargetDataLayout.cpp @@ -276,6 +276,7 @@ static std::string computeAMDDataLayout(const Triple &TT) { static std::string computeRISCVDataLayout(const Triple &TT, StringRef ABIName) { if (TT.isOSBinFormatMachO()) { + assert(TT.isLittleEndian() && "Invalid endianness"); assert(TT.isArch32Bit() && "Invalid triple."); assert((ABIName != "ilp32e") && "Invalid ABI."); return "e-m:o-p:32:32-i64:64-n32-S128"; From 7b5eae7e17ff2a1476cf6f1d8aff5b4074951a7f Mon Sep 17 00:00:00 2001 From: Francesco Petrogalli Date: Wed, 24 Sep 2025 16:02:22 -0700 Subject: [PATCH 07/16] Address code formatting issues. [NFC] --- .../lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp index 34b8b3ca4a8c8..32c7e76f8565a 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp @@ -958,9 +958,8 @@ RISCVAsmBackend::createObjectTargetWriter() const { class DarwinRISCVAsmBackend : public RISCVAsmBackend { public: DarwinRISCVAsmBackend(const MCSubtargetInfo &STI, uint8_t OSABI, bool Is64Bit, - bool IsLittleEndian, - const MCTargetOptions &Options) - : RISCVAsmBackend(STI, OSABI, Is64Bit, IsLittleEndian, Options) {} + bool IsLittleEndian, const MCTargetOptions &Options) + : RISCVAsmBackend(STI, OSABI, Is64Bit, IsLittleEndian, Options) {} std::unique_ptr createObjectTargetWriter() const override { @@ -978,8 +977,8 @@ MCAsmBackend *llvm::createRISCVAsmBackend(const Target &T, const Triple &TT = STI.getTargetTriple(); uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS()); if (TT.isOSBinFormatMachO()) - return new DarwinRISCVAsmBackend(STI, OSABI, TT.isArch64Bit(), TT.isLittleEndian(), - Options); + return new DarwinRISCVAsmBackend(STI, OSABI, TT.isArch64Bit(), + TT.isLittleEndian(), Options); return new RISCVAsmBackend(STI, OSABI, TT.isArch64Bit(), TT.isLittleEndian(), - Options); + Options); } From c4a264e110825ef49b588974cf542e9866b168cb Mon Sep 17 00:00:00 2001 From: Francesco Petrogalli Date: Fri, 26 Sep 2025 10:28:46 -0700 Subject: [PATCH 08/16] Remove period from assertion. [nfc] Co-authored-by: Jonas Devlieghere --- llvm/lib/TargetParser/TargetDataLayout.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/llvm/lib/TargetParser/TargetDataLayout.cpp b/llvm/lib/TargetParser/TargetDataLayout.cpp index 602ed9c4587de..25df11233423f 100644 --- a/llvm/lib/TargetParser/TargetDataLayout.cpp +++ b/llvm/lib/TargetParser/TargetDataLayout.cpp @@ -277,7 +277,7 @@ static std::string computeAMDDataLayout(const Triple &TT) { static std::string computeRISCVDataLayout(const Triple &TT, StringRef ABIName) { if (TT.isOSBinFormatMachO()) { assert(TT.isLittleEndian() && "Invalid endianness"); - assert(TT.isArch32Bit() && "Invalid triple."); + assert(TT.isArch32Bit() && "Invalid triple"); assert((ABIName != "ilp32e") && "Invalid ABI."); return "e-m:o-p:32:32-i64:64-n32-S128"; } From 061d63f393216df9c738b38250f023d22aa54f76 Mon Sep 17 00:00:00 2001 From: Francesco Petrogalli Date: Fri, 26 Sep 2025 10:30:00 -0700 Subject: [PATCH 09/16] Eliminate the else-after-return [NFCI] Co-authored-by: Jonas Devlieghere --- llvm/lib/Target/RISCV/RISCVTargetMachine.cpp | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp index 8d5caab7a2a5c..8c7a6abda3968 100644 --- a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp +++ b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp @@ -149,10 +149,9 @@ static Reloc::Model getEffectiveRelocModel(const Triple &TT, static std::unique_ptr createTLOF(const Triple &TT) { if (TT.isOSBinFormatELF()) return std::make_unique(); - else if (TT.isOSBinFormatMachO()) + if (TT.isOSBinFormatMachO()) return std::make_unique(); - else - return std::unique_ptr(); + return std::unique_ptr(); } RISCVTargetMachine::RISCVTargetMachine(const Target &T, const Triple &TT, From b4fccfe9f5450b1139d54e39a453535cdfba6c0b Mon Sep 17 00:00:00 2001 From: Francesco Petrogalli Date: Fri, 26 Sep 2025 10:31:12 -0700 Subject: [PATCH 10/16] Report fatal error instead of assert on initialized MAI. --- llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp index 68523c83c0d08..f69ce5228417e 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp @@ -65,7 +65,8 @@ static MCAsmInfo *createRISCVMCAsmInfo(const MCRegisterInfo &MRI, MAI = new RISCVMCAsmInfo(TT); else if (TT.isOSBinFormatMachO()) MAI = new RISCVMCAsmInfoDarwin(); - assert(MAI && "Missing MCAsmInfo."); + + reportFatalUsageError("unsupported object format"); unsigned SP = MRI.getDwarfRegNum(RISCV::X2, true); MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(nullptr, SP, 0); From e2088f5a3e6be2f7f1783307115ee35adf552706 Mon Sep 17 00:00:00 2001 From: Francesco Petrogalli Date: Fri, 26 Sep 2025 10:44:51 -0700 Subject: [PATCH 11/16] Fix silly bug. [Functional Changes Intended!!!!] --- llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp index f69ce5228417e..1184b898b6e06 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp @@ -65,8 +65,8 @@ static MCAsmInfo *createRISCVMCAsmInfo(const MCRegisterInfo &MRI, MAI = new RISCVMCAsmInfo(TT); else if (TT.isOSBinFormatMachO()) MAI = new RISCVMCAsmInfoDarwin(); - - reportFatalUsageError("unsupported object format"); + else + reportFatalUsageError("unsupported object format"); unsigned SP = MRI.getDwarfRegNum(RISCV::X2, true); MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(nullptr, SP, 0); From 941717d2d200c62ccd8771844205de676eb91ae2 Mon Sep 17 00:00:00 2001 From: Francesco Petrogalli Date: Mon, 29 Sep 2025 15:21:55 -0700 Subject: [PATCH 12/16] Rename file. [NFC] --- llvm/test/MC/RISCV/{riscv-macho.s => macho.s} | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename llvm/test/MC/RISCV/{riscv-macho.s => macho.s} (100%) diff --git a/llvm/test/MC/RISCV/riscv-macho.s b/llvm/test/MC/RISCV/macho.s similarity index 100% rename from llvm/test/MC/RISCV/riscv-macho.s rename to llvm/test/MC/RISCV/macho.s From 624b68329037364911bd6d35d54506c066296d3f Mon Sep 17 00:00:00 2001 From: Francesco Petrogalli Date: Tue, 30 Sep 2025 15:32:19 -0700 Subject: [PATCH 13/16] Remove function that is not used. --- llvm/lib/Target/RISCV/RISCVTargetMachine.cpp | 8 -------- 1 file changed, 8 deletions(-) diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp index 8c7a6abda3968..f81b1e1260ee3 100644 --- a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp +++ b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp @@ -146,14 +146,6 @@ static Reloc::Model getEffectiveRelocModel(const Triple &TT, return RM.value_or(Reloc::Static); } -static std::unique_ptr createTLOF(const Triple &TT) { - if (TT.isOSBinFormatELF()) - return std::make_unique(); - if (TT.isOSBinFormatMachO()) - return std::make_unique(); - return std::unique_ptr(); -} - RISCVTargetMachine::RISCVTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, From 5ae6609655a892d0f36fd057b3fadc8a4ad22c47 Mon Sep 17 00:00:00 2001 From: Francesco Petrogalli Date: Tue, 30 Sep 2025 15:34:42 -0700 Subject: [PATCH 14/16] Change order of files in CMake configuration. [NFC] --- llvm/lib/Target/RISCV/MCTargetDesc/CMakeLists.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/CMakeLists.txt b/llvm/lib/Target/RISCV/MCTargetDesc/CMakeLists.txt index 1a8dd50327dde..7829b6e4bcd18 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/CMakeLists.txt +++ b/llvm/lib/Target/RISCV/MCTargetDesc/CMakeLists.txt @@ -3,12 +3,12 @@ add_llvm_component_library(LLVMRISCVDesc RISCVBaseInfo.cpp RISCVELFObjectWriter.cpp RISCVInstPrinter.cpp - RISCVMachObjectWriter.cpp RISCVMCAsmInfo.cpp RISCVMCCodeEmitter.cpp RISCVMCExpr.cpp RISCVMCObjectFileInfo.cpp RISCVMCTargetDesc.cpp + RISCVMachObjectWriter.cpp RISCVMatInt.cpp RISCVTargetStreamer.cpp RISCVELFStreamer.cpp From d208ceb295f22dc3db4aa75623c160699e6665eb Mon Sep 17 00:00:00 2001 From: Francesco Petrogalli Date: Fri, 3 Oct 2025 10:56:21 -0700 Subject: [PATCH 15/16] Ensure local symbols are correctly added to the symbol table. --- .../Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp | 11 +++++++++++ llvm/test/MC/RISCV/macho-local-symbol.s | 7 +++++++ 2 files changed, 18 insertions(+) create mode 100644 llvm/test/MC/RISCV/macho-local-symbol.s diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp index 1184b898b6e06..c262a6e894a58 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp @@ -122,6 +122,16 @@ createRISCVObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI) { return nullptr; } +static MCStreamer * +createMachOStreamer(MCContext &Ctx, std::unique_ptr &&TAB, + std::unique_ptr &&OW, + std::unique_ptr &&Emitter) { + return createMachOStreamer(Ctx, std::move(TAB), std::move(OW), + std::move(Emitter), + /*DWARFMustBeAtTheEnd*/ false, + /*LabelSections*/ true); +} + static MCTargetStreamer * createRISCVAsmTargetStreamer(MCStreamer &S, formatted_raw_ostream &OS, MCInstPrinter *InstPrint) { @@ -393,6 +403,7 @@ LLVMInitializeRISCVTargetMC() { TargetRegistry::RegisterMCInstPrinter(*T, createRISCVMCInstPrinter); TargetRegistry::RegisterMCSubtargetInfo(*T, createRISCVMCSubtargetInfo); TargetRegistry::RegisterELFStreamer(*T, createRISCVELFStreamer); + TargetRegistry::RegisterMachOStreamer(*T, createMachOStreamer); TargetRegistry::RegisterObjectTargetStreamer( *T, createRISCVObjectTargetStreamer); TargetRegistry::RegisterMCInstrAnalysis(*T, createRISCVInstrAnalysis); diff --git a/llvm/test/MC/RISCV/macho-local-symbol.s b/llvm/test/MC/RISCV/macho-local-symbol.s new file mode 100644 index 0000000000000..ee7c409f34abf --- /dev/null +++ b/llvm/test/MC/RISCV/macho-local-symbol.s @@ -0,0 +1,7 @@ +;; RUN: llvm-mc -triple riscv32-apple-macho %s -filetype=obj -o - | \ +;; RUN: llvm-objdump - -d | FileCheck %s + +Ltmp0: + addi a0, a0, 1 + + ;; CHECK: 00000000 : From d513e1ce9fadea09eb335924721af28117d11af5 Mon Sep 17 00:00:00 2001 From: Francesco Petrogalli Date: Fri, 3 Oct 2025 13:09:19 -0700 Subject: [PATCH 16/16] Apply clang format [NFC] --- llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp index c262a6e894a58..9b20ff829371e 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp @@ -128,7 +128,7 @@ createMachOStreamer(MCContext &Ctx, std::unique_ptr &&TAB, std::unique_ptr &&Emitter) { return createMachOStreamer(Ctx, std::move(TAB), std::move(OW), std::move(Emitter), - /*DWARFMustBeAtTheEnd*/ false, + /*DWARFMustBeAtTheEnd*/ false, /*LabelSections*/ true); }