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[X86] mtune should be generic #142297

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2029b03
[X86] mtune should be generic
AZero13 May 31, 2025
218da1b
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AZero13 Jun 2, 2025
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2 changes: 1 addition & 1 deletion llvm/lib/Target/X86/X86Subtarget.cpp
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Expand Up @@ -253,7 +253,7 @@ void X86Subtarget::initSubtargetFeatures(StringRef CPU, StringRef TuneCPU,
CPU = "generic";

if (TuneCPU.empty())
TuneCPU = "i586"; // FIXME: "generic" is more modern than llc tests expect.
TuneCPU = "generic";

std::string FullFS = X86_MC::ParseX86Triple(TargetTriple);
assert(!FullFS.empty() && "Failed to parse X86 triple");
Expand Down
49 changes: 26 additions & 23 deletions llvm/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll
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Expand Up @@ -4,47 +4,50 @@
define void @foo(ptr %buf, i32 %size, i32 %col, ptr %p) nounwind {
; CHECK-LABEL: foo:
; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: pushl %ebp
; CHECK-NEXT: pushl %ebx
; CHECK-NEXT: pushl %edi
; CHECK-NEXT: pushl %esi
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: testl %eax, %eax
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ebp
; CHECK-NEXT: testl %ebp, %ebp
; CHECK-NEXT: jle LBB0_3
; CHECK-NEXT: ## %bb.1: ## %bb.preheader
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi
; CHECK-NEXT: addl $8, %ecx
; CHECK-NEXT: xorl %edi, %edi
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB0_2: ## %bb
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movl (%esi), %edi
; CHECK-NEXT: movzbl -8(%ecx), %ebx
; CHECK-NEXT: movb %bl, (%edi,%edx)
; CHECK-NEXT: movzbl -7(%ecx), %ebx
; CHECK-NEXT: movb %bl, 7(%edi,%edx)
; CHECK-NEXT: movzbl -6(%ecx), %ebx
; CHECK-NEXT: movb %bl, 5(%edi,%edx)
; CHECK-NEXT: movzbl -5(%ecx), %ebx
; CHECK-NEXT: movb %bl, 3(%edi,%edx)
; CHECK-NEXT: movzbl -4(%ecx), %ebx
; CHECK-NEXT: movb %bl, 2(%edi,%edx)
; CHECK-NEXT: movzbl -3(%ecx), %ebx
; CHECK-NEXT: movb %bl, 1(%edi,%edx)
; CHECK-NEXT: movzbl -2(%ecx), %ebx
; CHECK-NEXT: movb %bl, 2(%edi,%edx)
; CHECK-NEXT: movzbl -1(%ecx), %ebx
; CHECK-NEXT: movb %bl, 4(%edi,%edx)
; CHECK-NEXT: movzbl (%ecx), %ebx
; CHECK-NEXT: movb %bl, 6(%edi,%edx)
; CHECK-NEXT: addl $4, %esi
; CHECK-NEXT: movl (%esi,%edi,4), %ebx
; CHECK-NEXT: movzbl -8(%ecx), %eax
; CHECK-NEXT: movb %al, (%ebx,%edx)
; CHECK-NEXT: movzbl -7(%ecx), %eax
; CHECK-NEXT: movb %al, 7(%ebx,%edx)
; CHECK-NEXT: movzbl -6(%ecx), %eax
; CHECK-NEXT: movb %al, 5(%ebx,%edx)
; CHECK-NEXT: movzbl -5(%ecx), %eax
; CHECK-NEXT: movb %al, 3(%ebx,%edx)
; CHECK-NEXT: movzbl -4(%ecx), %eax
; CHECK-NEXT: movb %al, 2(%ebx,%edx)
; CHECK-NEXT: movzbl -3(%ecx), %eax
; CHECK-NEXT: movb %al, 1(%ebx,%edx)
; CHECK-NEXT: movzbl -2(%ecx), %eax
; CHECK-NEXT: movb %al, 2(%ebx,%edx)
; CHECK-NEXT: movzbl -1(%ecx), %eax
; CHECK-NEXT: movb %al, 4(%ebx,%edx)
; CHECK-NEXT: movzbl (%ecx), %eax
; CHECK-NEXT: movb %al, 6(%ebx,%edx)
; CHECK-NEXT: incl %edi
; CHECK-NEXT: addl $9, %ecx
; CHECK-NEXT: decl %eax
; CHECK-NEXT: cmpl %edi, %ebp
; CHECK-NEXT: jne LBB0_2
; CHECK-NEXT: LBB0_3: ## %return
; CHECK-NEXT: popl %esi
; CHECK-NEXT: popl %edi
; CHECK-NEXT: popl %ebx
; CHECK-NEXT: popl %ebp
; CHECK-NEXT: retl
entry:
icmp sgt i32 %size, 0 ; <i1>:0 [#uses=1]
Expand Down
3 changes: 2 additions & 1 deletion llvm/test/CodeGen/X86/2008-12-23-crazy-address.ll
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Expand Up @@ -36,7 +36,8 @@ define void @bar(i32 %i) nounwind {
; CHECK-NEXT: pushl %eax
; CHECK-NEXT: calll frob@PLT
; CHECK-NEXT: addl $4, %esp
; CHECK-NEXT: leal X(%esp,%esi,4), %eax
; CHECK-NEXT: leal (%esp,%esi,4), %eax
; CHECK-NEXT: addl $X, %eax
; CHECK-NEXT: pushl %eax
; CHECK-NEXT: calll borf@PLT
; CHECK-NEXT: addl $44, %esp
Expand Down
45 changes: 17 additions & 28 deletions llvm/test/CodeGen/X86/2012-01-10-UndefExceptionEdge.ll
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Expand Up @@ -29,32 +29,29 @@ define void @f(ptr nocapture %arg, ptr nocapture %arg1, ptr nocapture %arg2, ptr
; CHECK-NEXT: pushl %ebx
; CHECK-NEXT: pushl %edi
; CHECK-NEXT: pushl %esi
; CHECK-NEXT: subl $28, %esp
; CHECK-NEXT: subl $12, %esp
; CHECK-NEXT: .cfi_offset %esi, -20
; CHECK-NEXT: .cfi_offset %edi, -16
; CHECK-NEXT: .cfi_offset %ebx, -12
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: xorl %edi, %edi
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: Ltmp0:
; CHECK-NEXT: ## implicit-def: $ebx
; CHECK-NEXT: ## implicit-def: $edi
; CHECK-NEXT: calll __Znam
; CHECK-NEXT: Ltmp1:
; CHECK-NEXT: ## %bb.1: ## %bb11
; CHECK-NEXT: movl %eax, %esi
; CHECK-NEXT: movb $1, %al
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: movb $1, %bl
; CHECK-NEXT: testb %bl, %bl
; CHECK-NEXT: jne LBB0_2
; CHECK-NEXT: ## %bb.7: ## %bb31
; CHECK-NEXT: ## implicit-def: $eax
; CHECK-NEXT: ## kill: killed $eax
; CHECK-NEXT: ## implicit-def: $edi
; CHECK-NEXT: LBB0_8: ## %bb38
; CHECK-NEXT: ## =>This Loop Header: Depth=1
; CHECK-NEXT: ## Child Loop BB0_13 Depth 2
; CHECK-NEXT: ## Child Loop BB0_16 Depth 3
; CHECK-NEXT: ## Child Loop BB0_21 Depth 2
; CHECK-NEXT: movb $1, %al
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: testb %bl, %bl
; CHECK-NEXT: jne LBB0_9
; CHECK-NEXT: ## %bb.10: ## %bb41
; CHECK-NEXT: ## in Loop: Header=BB0_8 Depth=1
Expand All @@ -78,24 +75,19 @@ define void @f(ptr nocapture %arg, ptr nocapture %arg1, ptr nocapture %arg2, ptr
; CHECK-NEXT: ## Parent Loop BB0_8 Depth=1
; CHECK-NEXT: ## => This Loop Header: Depth=2
; CHECK-NEXT: ## Child Loop BB0_16 Depth 3
; CHECK-NEXT: movb $1, %cl
; CHECK-NEXT: testb %cl, %cl
; CHECK-NEXT: testb %bl, %bl
; CHECK-NEXT: jne LBB0_19
; CHECK-NEXT: ## %bb.14: ## %bb48
; CHECK-NEXT: ## in Loop: Header=BB0_13 Depth=2
; CHECK-NEXT: jne LBB0_17
; CHECK-NEXT: ## %bb.15: ## %bb49.preheader
; CHECK-NEXT: ## in Loop: Header=BB0_13 Depth=2
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: movl %esi, %edx
; CHECK-NEXT: movl %edi, %ebx
; CHECK-NEXT: LBB0_16: ## %bb49
; CHECK-NEXT: ## Parent Loop BB0_8 Depth=1
; CHECK-NEXT: ## Parent Loop BB0_13 Depth=2
; CHECK-NEXT: ## => This Inner Loop Header: Depth=3
; CHECK-NEXT: incl %ecx
; CHECK-NEXT: addl $4, %edx
; CHECK-NEXT: decl %ebx
; CHECK-NEXT: jne LBB0_16
; CHECK-NEXT: LBB0_17: ## %bb57
; CHECK-NEXT: ## in Loop: Header=BB0_13 Depth=2
Expand All @@ -107,44 +99,41 @@ define void @f(ptr nocapture %arg, ptr nocapture %arg1, ptr nocapture %arg2, ptr
; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp)
; CHECK-NEXT: movl $0, (%esp)
; CHECK-NEXT: calll ___bzero
; CHECK-NEXT: movb $1, %al
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: testb %bl, %bl
; CHECK-NEXT: jne LBB0_22
; CHECK-NEXT: ## %bb.20: ## %bb61.preheader
; CHECK-NEXT: ## in Loop: Header=BB0_8 Depth=1
; CHECK-NEXT: movl %esi, %eax
; CHECK-NEXT: movl %edi, %ecx
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: LBB0_21: ## %bb61
; CHECK-NEXT: ## Parent Loop BB0_8 Depth=1
; CHECK-NEXT: ## => This Inner Loop Header: Depth=2
; CHECK-NEXT: movl $0, (%eax)
; CHECK-NEXT: addl $4, %eax
; CHECK-NEXT: decl %ecx
; CHECK-NEXT: movl $0, (%esi,%eax,4)
; CHECK-NEXT: incl %eax
; CHECK-NEXT: jne LBB0_21
; CHECK-NEXT: LBB0_22: ## %bb67
; CHECK-NEXT: ## in Loop: Header=BB0_8 Depth=1
; CHECK-NEXT: decl {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Folded Spill
; CHECK-NEXT: decl %edi
; CHECK-NEXT: jmp LBB0_8
; CHECK-NEXT: LBB0_18: ## %bb43
; CHECK-NEXT: Ltmp5:
; CHECK-NEXT: movl %esi, %ebx
; CHECK-NEXT: movl %esi, %edi
; CHECK-NEXT: calll _OnOverFlow
; CHECK-NEXT: Ltmp6:
; CHECK-NEXT: jmp LBB0_3
; CHECK-NEXT: LBB0_2: ## %bb29
; CHECK-NEXT: Ltmp7:
; CHECK-NEXT: movl %esi, %ebx
; CHECK-NEXT: movl %esi, %edi
; CHECK-NEXT: calll _OnOverFlow
; CHECK-NEXT: Ltmp8:
; CHECK-NEXT: LBB0_3: ## %bb30
; CHECK-NEXT: ud2
; CHECK-NEXT: LBB0_4: ## %bb20.loopexit
; CHECK-NEXT: Ltmp4:
; CHECK-NEXT: LBB0_9:
; CHECK-NEXT: movl %esi, %ebx
; CHECK-NEXT: movl %esi, %edi
; CHECK-NEXT: LBB0_6: ## %bb23
; CHECK-NEXT: testl %ebx, %ebx
; CHECK-NEXT: addl $28, %esp
; CHECK-NEXT: testl %edi, %edi
; CHECK-NEXT: addl $12, %esp
; CHECK-NEXT: popl %esi
; CHECK-NEXT: popl %edi
; CHECK-NEXT: popl %ebx
Expand Down
6 changes: 2 additions & 4 deletions llvm/test/CodeGen/X86/2012-12-1-merge-multiple.ll
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Expand Up @@ -4,10 +4,8 @@
define void @multiple_stores_on_chain(ptr %A) {
; CHECK-LABEL: multiple_stores_on_chain:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movabsq $844433520132096, %rax # imm = 0x3000200010000
; CHECK-NEXT: movq %rax, (%rdi)
; CHECK-NEXT: movabsq $1970350607106052, %rax # imm = 0x7000600050004
; CHECK-NEXT: movq %rax, 8(%rdi)
; CHECK-NEXT: movaps {{.*#+}} xmm0 = [0,1,2,3,4,5,6,7]
; CHECK-NEXT: movups %xmm0, (%rdi)
; CHECK-NEXT: retq
entry:
%a1 = getelementptr inbounds i16, ptr %A, i64 1
Expand Down
32 changes: 16 additions & 16 deletions llvm/test/CodeGen/X86/64-bit-shift-by-32-minus-y.ll
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Expand Up @@ -307,19 +307,19 @@ define i64 @t5_cse(i64 %val, i64 %shamt, ptr%dst) nounwind {
; X86-NOBMI2-NEXT: pushl %esi
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NOBMI2-NEXT: movl %eax, %ebx
; X86-NOBMI2-NEXT: addl $32, %ebx
; X86-NOBMI2-NEXT: adcl $0, %edi
; X86-NOBMI2-NEXT: movl %ebx, (%ecx)
; X86-NOBMI2-NEXT: movl %edi, 4(%ecx)
; X86-NOBMI2-NEXT: movb $32, %cl
; X86-NOBMI2-NEXT: subb %al, %cl
; X86-NOBMI2-NEXT: movl %esi, %eax
; X86-NOBMI2-NEXT: shll %cl, %eax
; X86-NOBMI2-NEXT: shldl %cl, %esi, %edx
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NOBMI2-NEXT: movl %ebx, (%esi)
; X86-NOBMI2-NEXT: movl %edi, 4(%esi)
; X86-NOBMI2-NEXT: testb $32, %cl
; X86-NOBMI2-NEXT: je .LBB5_2
; X86-NOBMI2-NEXT: # %bb.1:
Expand All @@ -338,17 +338,17 @@ define i64 @t5_cse(i64 %val, i64 %shamt, ptr%dst) nounwind {
; X86-BMI2-NEXT: pushl %esi
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-BMI2-NEXT: movl %ebx, %edi
; X86-BMI2-NEXT: addl $32, %edi
; X86-BMI2-NEXT: adcl $0, %esi
; X86-BMI2-NEXT: movl %edi, (%ecx)
; X86-BMI2-NEXT: movl %esi, 4(%ecx)
; X86-BMI2-NEXT: movb $32, %cl
; X86-BMI2-NEXT: subb %bl, %cl
; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-BMI2-NEXT: shldl %cl, %eax, %edx
; X86-BMI2-NEXT: movl %edi, (%ebx)
; X86-BMI2-NEXT: movl %esi, 4(%ebx)
; X86-BMI2-NEXT: shlxl %ecx, %eax, %eax
; X86-BMI2-NEXT: testb $32, %cl
; X86-BMI2-NEXT: je .LBB5_2
Expand Down Expand Up @@ -390,18 +390,18 @@ define i64 @t6_cse2(i64 %val, i64 %shamt, ptr%dst) nounwind {
; X86-NOBMI2: # %bb.0:
; X86-NOBMI2-NEXT: pushl %edi
; X86-NOBMI2-NEXT: pushl %esi
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOBMI2-NEXT: xorl %edi, %edi
; X86-NOBMI2-NEXT: xorl %esi, %esi
; X86-NOBMI2-NEXT: movl $32, %ecx
; X86-NOBMI2-NEXT: subl {{[0-9]+}}(%esp), %ecx
; X86-NOBMI2-NEXT: sbbl {{[0-9]+}}(%esp), %edi
; X86-NOBMI2-NEXT: movl %ecx, (%eax)
; X86-NOBMI2-NEXT: movl %edi, 4(%eax)
; X86-NOBMI2-NEXT: movl %esi, %eax
; X86-NOBMI2-NEXT: sbbl {{[0-9]+}}(%esp), %esi
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NOBMI2-NEXT: movl %edi, %eax
; X86-NOBMI2-NEXT: shll %cl, %eax
; X86-NOBMI2-NEXT: shldl %cl, %esi, %edx
; X86-NOBMI2-NEXT: shldl %cl, %edi, %edx
; X86-NOBMI2-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NOBMI2-NEXT: movl %ecx, (%edi)
; X86-NOBMI2-NEXT: movl %esi, 4(%edi)
; X86-NOBMI2-NEXT: testb $32, %cl
; X86-NOBMI2-NEXT: je .LBB6_2
; X86-NOBMI2-NEXT: # %bb.1:
Expand All @@ -423,9 +423,9 @@ define i64 @t6_cse2(i64 %val, i64 %shamt, ptr%dst) nounwind {
; X86-BMI2-NEXT: movl $32, %ecx
; X86-BMI2-NEXT: subl {{[0-9]+}}(%esp), %ecx
; X86-BMI2-NEXT: sbbl {{[0-9]+}}(%esp), %edi
; X86-BMI2-NEXT: shldl %cl, %eax, %edx
; X86-BMI2-NEXT: movl %ecx, (%esi)
; X86-BMI2-NEXT: movl %edi, 4(%esi)
; X86-BMI2-NEXT: shldl %cl, %eax, %edx
; X86-BMI2-NEXT: shlxl %ecx, %eax, %eax
; X86-BMI2-NEXT: testb $32, %cl
; X86-BMI2-NEXT: je .LBB6_2
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/X86/AMX/amx-greedy-ra-spill-shape.ll
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Expand Up @@ -124,9 +124,9 @@ define void @foo(i32 %M, i32 %N, i32 %K, ptr %A, ptr %B_rcr4, ptr %C, i32 %c_row
; CHECK-NEXT: successors: %bb.6(0x7c000000), %bb.5(0x04000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[PTILEZEROV:%[0-9]+]]:tile = PTILEZEROV [[COPY6]].sub_16bit, [[MOV32rm2]].sub_16bit
; CHECK-NEXT: [[COPY9:%[0-9]+]]:gr64_nosp = MOVSX64rr32 [[COPY9]].sub_32bit
; CHECK-NEXT: [[MOV64rm7:%[0-9]+]]:gr64 = MOV64rm %stack.13, 1, $noreg, 0, $noreg :: (load (s64) from %stack.13)
; CHECK-NEXT: [[PTILELOADDV:%[0-9]+]]:tile = PTILELOADDV [[COPY6]].sub_16bit, [[COPY4]].sub_16bit, [[MOV64rm7]], 1, [[MOVSX64rr32_]], 0, $noreg
; CHECK-NEXT: [[COPY9:%[0-9]+]]:gr64_nosp = MOVSX64rr32 [[COPY9]].sub_32bit
; CHECK-NEXT: [[COPY10:%[0-9]+]]:gr32 = COPY [[LEA64_32r1]]
; CHECK-NEXT: [[COPY11:%[0-9]+]]:gr64 = COPY [[MOV64rm1]]
; CHECK-NEXT: [[COPY12:%[0-9]+]]:gr32 = COPY [[COPY4]]
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/X86/GlobalISel/add-scalar.ll
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Expand Up @@ -18,10 +18,10 @@ define i128 @test_add_i128(i128 %arg1, i128 %arg2) nounwind {
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: addl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: adcl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: adcl {{[0-9]+}}(%esp), %esi
; X86-NEXT: adcl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %ecx, (%eax)
Expand All @@ -44,8 +44,8 @@ define i64 @test_add_i64(i64 %arg1, i64 %arg2) {
; X86-LABEL: test_add_i64:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: adcl {{[0-9]+}}(%esp), %edx
; X86-NEXT: retl
%ret = add i64 %arg1, %arg2
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/X86/GlobalISel/sub-scalar.ll
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Expand Up @@ -18,10 +18,10 @@ define i128 @test_sub_i128(i128 %arg1, i128 %arg2) nounwind {
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: subl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: sbbl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: sbbl {{[0-9]+}}(%esp), %esi
; X86-NEXT: sbbl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %ecx, (%eax)
Expand All @@ -45,8 +45,8 @@ define i64 @test_sub_i64(i64 %arg1, i64 %arg2) {
; X86-LABEL: test_sub_i64:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: sbbl {{[0-9]+}}(%esp), %edx
; X86-NEXT: retl
%ret = sub i64 %arg1, %arg2
Expand Down
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