diff --git a/llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp b/llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp index 6ba64968193cf..d84b07bd1457c 100644 --- a/llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp +++ b/llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp @@ -424,8 +424,8 @@ struct PromoteMem2Reg { const SmallPtrSetImpl &DefBlocks, SmallPtrSetImpl &LiveInBlocks); void RenamePass(BasicBlock *BB, BasicBlock *Pred, - RenamePassData::ValVector &IncVals, - RenamePassData::LocationVector &IncLocs, + RenamePassData::ValVector IncVals, + RenamePassData::LocationVector IncLocs, std::vector &Worklist); bool QueuePhiNode(BasicBlock *BB, unsigned AllocaIdx, unsigned &Version); @@ -869,7 +869,8 @@ void PromoteMem2Reg::run() { RenamePassData RPD = std::move(RenamePassWorkList.back()); RenamePassWorkList.pop_back(); // RenamePass may add new worklist entries. - RenamePass(RPD.BB, RPD.Pred, RPD.Values, RPD.Locations, RenamePassWorkList); + RenamePass(RPD.BB, RPD.Pred, std::move(RPD.Values), + std::move(RPD.Locations), RenamePassWorkList); } while (!RenamePassWorkList.empty()); // Remove the allocas themselves from the function. @@ -1096,10 +1097,9 @@ static void updateForIncomingValueLocation(PHINode *PN, DebugLoc DL, /// IncomingVals indicates what value each Alloca contains on exit from the /// predecessor block Pred. void PromoteMem2Reg::RenamePass(BasicBlock *BB, BasicBlock *Pred, - RenamePassData::ValVector &IncomingVals, - RenamePassData::LocationVector &IncomingLocs, + RenamePassData::ValVector IncomingVals, + RenamePassData::LocationVector IncomingLocs, std::vector &Worklist) { -NextIteration: // If we are inserting any phi nodes into this BB, they will already be in the // block. if (PHINode *APN = dyn_cast(BB->begin())) { @@ -1222,17 +1222,17 @@ void PromoteMem2Reg::RenamePass(BasicBlock *BB, BasicBlock *Pred, // Keep track of the successors so we don't visit the same successor twice SmallPtrSet VisitedSuccs; - // Handle the first successor without using the worklist. + // Handle the first successor after the rest, to mimic legacy behaviour. + // FIXME: Handle them in regular order. VisitedSuccs.insert(*I); - Pred = BB; - BB = *I; ++I; for (; I != E; ++I) if (VisitedSuccs.insert(*I).second) - Worklist.emplace_back(*I, Pred, IncomingVals, IncomingLocs); + Worklist.emplace_back(*I, BB, IncomingVals, IncomingLocs); - goto NextIteration; + Worklist.emplace_back(*succ_begin(BB), BB, std::move(IncomingVals), + std::move(IncomingLocs)); } void llvm::PromoteMemToReg(ArrayRef Allocas, DominatorTree &DT,