From bd17b4c1ebd183e262189f7d2664acf32d4b143b Mon Sep 17 00:00:00 2001 From: Jay Foad Date: Thu, 5 Jun 2025 09:54:53 +0100 Subject: [PATCH] [MIRParser] Report register class errors in a deterministic order --- llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 28 +++++++++++++------ .../virtreg-uses-unallocatable-class.mir | 7 ++--- 2 files changed, 22 insertions(+), 13 deletions(-) diff --git a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp index a57bda54f9180..1e9fcf35255b6 100644 --- a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp +++ b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp @@ -763,22 +763,25 @@ bool MIRParserImpl::setupRegisterInfo(const PerFunctionMIParsingState &PFS, MachineRegisterInfo &MRI = MF.getRegInfo(); const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); - bool Error = false; + SmallVector Errors; + // Create VRegs auto populateVRegInfo = [&](const VRegInfo &Info, const Twine &Name) { Register Reg = Info.VReg; switch (Info.Kind) { case VRegInfo::UNKNOWN: - error(Twine("Cannot determine class/bank of virtual register ") + - Name + " in function '" + MF.getName() + "'"); - Error = true; + Errors.push_back( + (Twine("Cannot determine class/bank of virtual register ") + Name + + " in function '" + MF.getName() + "'") + .str()); break; case VRegInfo::NORMAL: if (!Info.D.RC->isAllocatable()) { - error(Twine("Cannot use non-allocatable class '") + - TRI->getRegClassName(Info.D.RC) + "' for virtual register " + - Name + " in function '" + MF.getName() + "'"); - Error = true; + Errors.push_back((Twine("Cannot use non-allocatable class '") + + TRI->getRegClassName(Info.D.RC) + + "' for virtual register " + Name + " in function '" + + MF.getName() + "'") + .str()); break; } @@ -820,7 +823,14 @@ bool MIRParserImpl::setupRegisterInfo(const PerFunctionMIParsingState &PFS, } } - return Error; + if (Errors.empty()) + return false; + + // Report errors in a deterministic order. + sort(Errors); + for (auto &E : Errors) + error(E); + return true; } bool MIRParserImpl::initializeFrameInfo(PerFunctionMIParsingState &PFS, diff --git a/llvm/test/CodeGen/MIR/AMDGPU/virtreg-uses-unallocatable-class.mir b/llvm/test/CodeGen/MIR/AMDGPU/virtreg-uses-unallocatable-class.mir index e5daee29a52da..8a0e7a3d1e2b0 100644 --- a/llvm/test/CodeGen/MIR/AMDGPU/virtreg-uses-unallocatable-class.mir +++ b/llvm/test/CodeGen/MIR/AMDGPU/virtreg-uses-unallocatable-class.mir @@ -1,14 +1,13 @@ -# UNSUPPORTED: reverse_iteration # RUN: not llc -mtriple=amdgcn-- -mcpu=gfx900 -run-pass=none -o - %s 2>&1 | FileCheck %s # Check a diagnostic is emitted if non-allocatable classes are used # with virtual registers, and there's no assert. -# CHECK: error: {{.*}}: Cannot use non-allocatable class 'TTMP_32' for virtual register named_use in function 'virtreg_unallocatable' -# CHECK: error: {{.*}}: Cannot use non-allocatable class 'TTMP_32' for virtual register named_def in function 'virtreg_unallocatable' # CHECK: error: {{.*}}: Cannot use non-allocatable class 'TTMP_32' for virtual register 0 in function 'virtreg_unallocatable' -# CHECK: error: {{.*}}: Cannot use non-allocatable class 'TTMP_32' for virtual register 2 in function 'virtreg_unallocatable' # CHECK: error: {{.*}}: Cannot use non-allocatable class 'TTMP_32' for virtual register 1 in function 'virtreg_unallocatable' +# CHECK: error: {{.*}}: Cannot use non-allocatable class 'TTMP_32' for virtual register 2 in function 'virtreg_unallocatable' +# CHECK: error: {{.*}}: Cannot use non-allocatable class 'TTMP_32' for virtual register named_def in function 'virtreg_unallocatable' +# CHECK: error: {{.*}}: Cannot use non-allocatable class 'TTMP_32' for virtual register named_use in function 'virtreg_unallocatable' --- name: virtreg_unallocatable