From 6b683479d68a722b75d254330782d18d0fad1282 Mon Sep 17 00:00:00 2001 From: Jay Foad Date: Thu, 5 Jun 2025 10:33:04 +0100 Subject: [PATCH] [AMDGPU] Move S_ADD_U64_PSEUDO handling into getVALUOp. NFC. S_ADD_U64_PSEUDO and S_SUB_U64_PSEUDO are not "special cases" so can be handled in getVALUOp instead of moveToVALUImpl. --- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp index a27d4eeee97f4..805f8e9acdca7 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp @@ -5528,6 +5528,10 @@ unsigned SIInstrInfo::getVALUOp(const MachineInstr &MI) const { return AMDGPU::V_ADD_CO_U32_e32; case AMDGPU::S_SUB_U32: return AMDGPU::V_SUB_CO_U32_e32; + case AMDGPU::S_ADD_U64_PSEUDO: + return AMDGPU::V_ADD_U64_PSEUDO; + case AMDGPU::S_SUB_U64_PSEUDO: + return AMDGPU::V_SUB_U64_PSEUDO; case AMDGPU::S_SUBB_U32: return AMDGPU::V_SUBB_U32_e32; case AMDGPU::S_MUL_I32: return AMDGPU::V_MUL_LO_U32_e64; case AMDGPU::S_MUL_HI_U32: return AMDGPU::V_MUL_HI_U32_e64; @@ -7310,12 +7314,6 @@ void SIInstrInfo::moveToVALUImpl(SIInstrWorklist &Worklist, switch (Opcode) { default: break; - case AMDGPU::S_ADD_U64_PSEUDO: - NewOpcode = AMDGPU::V_ADD_U64_PSEUDO; - break; - case AMDGPU::S_SUB_U64_PSEUDO: - NewOpcode = AMDGPU::V_SUB_U64_PSEUDO; - break; case AMDGPU::S_ADD_I32: case AMDGPU::S_SUB_I32: { // FIXME: The u32 versions currently selected use the carry.