[HLSL][SPIRV] Use resource names #143412
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[HLSL][SPIRV] Use resource names #143412
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llvmbot
added
clang
The SPIR-V backend does not have access to the original name of a resource in the source, so it tries to create a name. This leads to some problems with reflection. That is why start to pass the name of the resource from Clang to the SPIR-V backend. Fixes llvm#138533
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@llvm/pr-subscribers-hlsl @llvm/pr-subscribers-clang-codegen Author: Steven Perron (s-perron) ChangesPatch is 46.79 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/143412.diff 21 Files Affected:
diff --git a/clang/lib/CodeGen/CGHLSLRuntime.cpp b/clang/lib/CodeGen/CGHLSLRuntime.cpp
index 6d267e6164845..d7f73318b3f5a 100644
--- a/clang/lib/CodeGen/CGHLSLRuntime.cpp
+++ b/clang/lib/CodeGen/CGHLSLRuntime.cpp
@@ -243,7 +243,7 @@ CGHLSLRuntime::getCreateHandleFromBindingIntrinsic() {
case llvm::Triple::dxil:
return std::pair(llvm::Intrinsic::dx_resource_handlefrombinding, true);
case llvm::Triple::spirv:
- return std::pair(llvm::Intrinsic::spv_resource_handlefrombinding, false);
+ return std::pair(llvm::Intrinsic::spv_resource_handlefrombinding, true);
default:
llvm_unreachable("Intrinsic resource_handlefrombinding not supported by "
"target architecture");
@@ -258,7 +258,7 @@ CGHLSLRuntime::getCreateHandleFromImplicitBindingIntrinsic() {
true);
case llvm::Triple::spirv:
return std::pair(llvm::Intrinsic::spv_resource_handlefromimplicitbinding,
- false);
+ true);
default:
llvm_unreachable(
"Intrinsic resource_handlefromimplicitbinding not supported by "
diff --git a/llvm/include/llvm/IR/IntrinsicsSPIRV.td b/llvm/include/llvm/IR/IntrinsicsSPIRV.td
index 8d984d6ce58df..6e6074a0d8582 100644
--- a/llvm/include/llvm/IR/IntrinsicsSPIRV.td
+++ b/llvm/include/llvm/IR/IntrinsicsSPIRV.td
@@ -115,15 +115,15 @@ let TargetPrefix = "spv" in {
// array size of the binding, as well as an index and an indicator
// whether that index may be non-uniform.
def int_spv_resource_handlefrombinding
- : DefaultAttrsIntrinsic<
- [llvm_any_ty],
- [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i1_ty],
- [IntrNoMem]>;
+ : DefaultAttrsIntrinsic<[llvm_any_ty],
+ [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
+ llvm_i32_ty, llvm_i1_ty, llvm_ptr_ty],
+ [IntrNoMem]>;
def int_spv_resource_handlefromimplicitbinding
- : DefaultAttrsIntrinsic<
- [llvm_any_ty],
- [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i1_ty],
- [IntrNoMem]>;
+ : DefaultAttrsIntrinsic<[llvm_any_ty],
+ [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
+ llvm_i32_ty, llvm_i1_ty, llvm_ptr_ty],
+ [IntrNoMem]>;
def int_spv_firstbituhigh : DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0, llvm_i32_ty>], [llvm_anyint_ty], [IntrNoMem]>;
def int_spv_firstbitshigh : DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0, llvm_i32_ty>], [llvm_anyint_ty], [IntrNoMem]>;
diff --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
index c5e8269efd25a..292b83e05b56d 100644
--- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
@@ -799,107 +799,15 @@ Register SPIRVGlobalRegistry::buildGlobalVariable(
return Reg;
}
-static std::string GetSpirvImageTypeName(const SPIRVType *Type,
- MachineIRBuilder &MIRBuilder,
- const std::string &Prefix,
- SPIRVGlobalRegistry &GR);
-
// Returns a name based on the Type. Notes that this does not look at
// decorations, and will return the same string for two types that are the same
// except for decorations.
-static std::string buildSpirvTypeName(const SPIRVType *Type,
- MachineIRBuilder &MIRBuilder,
- SPIRVGlobalRegistry &GR) {
- switch (Type->getOpcode()) {
- case SPIRV::OpTypeSampledImage: {
- return GetSpirvImageTypeName(Type, MIRBuilder, "sampled_image_", GR);
- }
- case SPIRV::OpTypeImage: {
- return GetSpirvImageTypeName(Type, MIRBuilder, "image_", GR);
- }
- case SPIRV::OpTypeArray: {
- MachineRegisterInfo *MRI = MIRBuilder.getMRI();
- Register ElementTypeReg = Type->getOperand(1).getReg();
- auto *ElementType = MRI->getUniqueVRegDef(ElementTypeReg);
- uint32_t ArraySize = getArrayComponentCount(MRI, Type);
- return (buildSpirvTypeName(ElementType, MIRBuilder, GR) + Twine("[") +
- Twine(ArraySize) + Twine("]"))
- .str();
- }
- case SPIRV::OpTypeFloat:
- return ("f" + Twine(Type->getOperand(1).getImm())).str();
- case SPIRV::OpTypeSampler:
- return ("sampler");
- case SPIRV::OpTypeInt:
- if (Type->getOperand(2).getImm())
- return ("i" + Twine(Type->getOperand(1).getImm())).str();
- return ("u" + Twine(Type->getOperand(1).getImm())).str();
- case SPIRV::OpTypePointer: {
- uint32_t StorageClass = GR.getPointerStorageClass(Type);
- SPIRVType *PointeeType = GR.getPointeeType(Type);
- return ("p_" + Twine(StorageClass) + Twine("_") +
- buildSpirvTypeName(PointeeType, MIRBuilder, GR))
- .str();
- }
- case SPIRV::OpTypeStruct: {
- std::string TypeName = "{";
- for (uint32_t I = 1; I < Type->getNumOperands(); ++I) {
- SPIRVType *MemberType =
- GR.getSPIRVTypeForVReg(Type->getOperand(I).getReg());
- TypeName += '_' + buildSpirvTypeName(MemberType, MIRBuilder, GR);
- }
- return TypeName + "}";
- }
- case SPIRV::OpTypeVector: {
- MachineRegisterInfo *MRI = MIRBuilder.getMRI();
- Register ElementTypeReg = Type->getOperand(1).getReg();
- auto *ElementType = MRI->getUniqueVRegDef(ElementTypeReg);
- uint32_t VectorSize = GR.getScalarOrVectorComponentCount(Type);
- return (buildSpirvTypeName(ElementType, MIRBuilder, GR) + Twine("[") +
- Twine(VectorSize) + Twine("]"))
- .str();
- }
- case SPIRV::OpTypeRuntimeArray: {
- MachineRegisterInfo *MRI = MIRBuilder.getMRI();
- Register ElementTypeReg = Type->getOperand(1).getReg();
- auto *ElementType = MRI->getUniqueVRegDef(ElementTypeReg);
- uint32_t ArraySize = 0;
- return (buildSpirvTypeName(ElementType, MIRBuilder, GR) + Twine("[") +
- Twine(ArraySize) + Twine("]"))
- .str();
- }
- default:
- llvm_unreachable("Trying to the the name of an unknown type.");
- }
-}
-
-static std::string GetSpirvImageTypeName(const SPIRVType *Type,
- MachineIRBuilder &MIRBuilder,
- const std::string &Prefix,
- SPIRVGlobalRegistry &GR) {
- Register SampledTypeReg = Type->getOperand(1).getReg();
- auto *SampledType = MIRBuilder.getMRI()->getUniqueVRegDef(SampledTypeReg);
- std::string TypeName =
- Prefix + buildSpirvTypeName(SampledType, MIRBuilder, GR);
- for (uint32_t I = 2; I < Type->getNumOperands(); ++I) {
- TypeName = (TypeName + '_' + Twine(Type->getOperand(I).getImm())).str();
- }
- return TypeName;
-}
-
Register SPIRVGlobalRegistry::getOrCreateGlobalVariableWithBinding(
- const SPIRVType *VarType, uint32_t Set, uint32_t Binding,
+ const SPIRVType *VarType, uint32_t Set, uint32_t Binding, StringRef Name,
MachineIRBuilder &MIRBuilder) {
Register VarReg =
MIRBuilder.getMRI()->createVirtualRegister(&SPIRV::iIDRegClass);
- // TODO(138533): The name should come from the llvm-ir, but how that name will
- // be passed from the HLSL to the backend has not been decided. Using this
- // place holder for now.
- std::string Name =
- ("__resource_" + buildSpirvTypeName(VarType, MIRBuilder, *this) + "_" +
- Twine(Set) + "_" + Twine(Binding))
- .str();
buildGlobalVariable(VarReg, VarType, Name, nullptr,
getPointerStorageClass(VarType), nullptr, false, false,
SPIRV::LinkageType::Import, MIRBuilder, false);
diff --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
index 3b481b3aba0c1..35f616a1981d2 100644
--- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
+++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
@@ -548,6 +548,7 @@ class SPIRVGlobalRegistry : public SPIRVIRMapping {
bool IsInstSelector);
Register getOrCreateGlobalVariableWithBinding(const SPIRVType *VarType,
uint32_t Set, uint32_t Binding,
+ StringRef Name,
MachineIRBuilder &MIRBuilder);
// Convenient helpers for getting types with check for duplicates.
diff --git a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
index 2dae0721886c7..8edd0b533b9fa 100644
--- a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
@@ -322,7 +322,7 @@ class SPIRVInstructionSelector : public InstructionSelector {
SPIRV::StorageClass::StorageClass SC,
uint32_t Set, uint32_t Binding,
uint32_t ArraySize, Register IndexReg,
- bool IsNonUniform,
+ bool IsNonUniform, StringRef Name,
MachineIRBuilder MIRBuilder) const;
SPIRVType *widenTypeToVec4(const SPIRVType *Type, MachineInstr &I) const;
bool extractSubvector(Register &ResVReg, const SPIRVType *ResType,
@@ -3380,14 +3380,14 @@ bool SPIRVInstructionSelector::selectImageWriteIntrinsic(
Register SPIRVInstructionSelector::buildPointerToResource(
const SPIRVType *SpirvResType, SPIRV::StorageClass::StorageClass SC,
uint32_t Set, uint32_t Binding, uint32_t ArraySize, Register IndexReg,
- bool IsNonUniform, MachineIRBuilder MIRBuilder) const {
+ bool IsNonUniform, StringRef Name, MachineIRBuilder MIRBuilder) const {
const Type *ResType = GR.getTypeForSPIRVType(SpirvResType);
if (ArraySize == 1) {
SPIRVType *PtrType =
GR.getOrCreateSPIRVPointerType(ResType, MIRBuilder, SC);
assert(GR.getPointeeType(PtrType) == SpirvResType &&
"SpirvResType did not have an explicit layout.");
- return GR.getOrCreateGlobalVariableWithBinding(PtrType, Set, Binding,
+ return GR.getOrCreateGlobalVariableWithBinding(PtrType, Set, Binding, Name,
MIRBuilder);
}
@@ -3395,7 +3395,7 @@ Register SPIRVInstructionSelector::buildPointerToResource(
SPIRVType *VarPointerType =
GR.getOrCreateSPIRVPointerType(VarType, MIRBuilder, SC);
Register VarReg = GR.getOrCreateGlobalVariableWithBinding(
- VarPointerType, Set, Binding, MIRBuilder);
+ VarPointerType, Set, Binding, Name, MIRBuilder);
SPIRVType *ResPointerType =
GR.getOrCreateSPIRVPointerType(ResType, MIRBuilder, SC);
@@ -4081,6 +4081,9 @@ bool SPIRVInstructionSelector::loadHandleBeforePosition(
uint32_t ArraySize = foldImm(HandleDef.getOperand(4), MRI);
Register IndexReg = HandleDef.getOperand(5).getReg();
bool IsNonUniform = ArraySize > 1 && foldImm(HandleDef.getOperand(6), MRI);
+ std::string Name =
+ getStringValueFromReg(HandleDef.getOperand(7).getReg(), *MRI);
+
bool IsStructuredBuffer = ResType->getOpcode() == SPIRV::OpTypePointer;
MachineIRBuilder MIRBuilder(HandleDef);
SPIRVType *VarType = ResType;
@@ -4091,8 +4094,9 @@ bool SPIRVInstructionSelector::loadHandleBeforePosition(
SC = GR.getPointerStorageClass(ResType);
}
- Register VarReg = buildPointerToResource(VarType, SC, Set, Binding, ArraySize,
- IndexReg, IsNonUniform, MIRBuilder);
+ Register VarReg =
+ buildPointerToResource(VarType, SC, Set, Binding, ArraySize, IndexReg,
+ IsNonUniform, Name, MIRBuilder);
if (IsNonUniform)
buildOpDecorate(HandleReg, HandleDef, TII, SPIRV::Decoration::NonUniformEXT,
diff --git a/llvm/lib/Target/SPIRV/SPIRVUtils.cpp b/llvm/lib/Target/SPIRV/SPIRVUtils.cpp
index 725a7979d3e5b..768efb96a53e9 100644
--- a/llvm/lib/Target/SPIRV/SPIRVUtils.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVUtils.cpp
@@ -80,6 +80,16 @@ std::string getStringImm(const MachineInstr &MI, unsigned StartIndex) {
return getSPIRVStringOperand(MI, StartIndex);
}
+std::string getStringValueFromReg(Register Reg, MachineRegisterInfo &MRI) {
+ MachineInstr *Def = getVRegDef(MRI, Reg);
+ assert(Def && Def->getOpcode() == TargetOpcode::G_GLOBAL_VALUE &&
+ "Expected G_GLOBAL_VALUE");
+ const GlobalValue *GV = Def->getOperand(1).getGlobal();
+ Value *V = GV->getOperand(0);
+ const ConstantDataArray *CDA = cast<ConstantDataArray>(V);
+ return CDA->getAsCString().str();
+}
+
void addNumImm(const APInt &Imm, MachineInstrBuilder &MIB) {
const auto Bitwidth = Imm.getBitWidth();
if (Bitwidth == 1)
diff --git a/llvm/lib/Target/SPIRV/SPIRVUtils.h b/llvm/lib/Target/SPIRV/SPIRVUtils.h
index f14a7d356ea58..d732188f9289f 100644
--- a/llvm/lib/Target/SPIRV/SPIRVUtils.h
+++ b/llvm/lib/Target/SPIRV/SPIRVUtils.h
@@ -125,6 +125,10 @@ void addStringImm(const StringRef &Str, IRBuilder<> &B,
// the reverse of the logic in addStringImm.
std::string getStringImm(const MachineInstr &MI, unsigned StartIndex);
+// Returns the string constant that the register refers to. It is assumed that
+// Reg is a global value that contains a string.
+std::string getStringValueFromReg(Register Reg, MachineRegisterInfo &MRI);
+
// Add the given numerical immediate to MIB.
void addNumImm(const APInt &Imm, MachineInstrBuilder &MIB);
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoad.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoad.ll
index 58252fe297f3e..b14b6af156caf 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoad.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoad.ll
@@ -1,6 +1,8 @@
; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv-vulkan-library %s -o - | FileCheck %s
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-vulkan-library %s -o - -filetype=obj | spirv-val %}
+@.str.b0 = private unnamed_addr constant [3 x i8] c"B0\00", align 1
+
; CHECK-NOT: OpCapability StorageImageReadWithoutFormat
; CHECK-DAG: OpDecorate [[IntBufferVar:%[0-9]+]] DescriptorSet 16
@@ -20,7 +22,7 @@ define void @RWBufferLoad_Vec4_I32() #0 {
; CHECK: [[buffer:%[0-9]+]] = OpLoad [[RWBufferTypeInt]] [[IntBufferVar]]
%buffer0 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_i32_5_2_0_0_2_24(
- i32 16, i32 7, i32 1, i32 0, i1 false)
+ i32 16, i32 7, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
; CHECK: OpImageRead [[v4_int]] [[buffer]] [[zero]]
%data0 = call <4 x i32> @llvm.spv.resource.load.typedbuffer(
@@ -35,7 +37,7 @@ define void @RWBufferLoad_I32() #0 {
; CHECK: [[buffer:%[0-9]+]] = OpLoad [[RWBufferTypeInt]] [[IntBufferVar]]
%buffer1 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_i32_5_2_0_0_2_24(
- i32 16, i32 7, i32 1, i32 0, i1 false)
+ i32 16, i32 7, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
; CHECK: [[V:%[0-9]+]] = OpImageRead [[v4_int]] [[buffer]] [[zero]]
; CHECK: OpCompositeExtract [[int]] [[V]] 0
@@ -51,7 +53,7 @@ define void @RWBufferLoad_Vec2_I32() #0 {
; CHECK: [[buffer:%[0-9]+]] = OpLoad [[RWBufferTypeInt]] [[IntBufferVar]]
%buffer0 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_i32_5_2_0_0_2_24(
- i32 16, i32 7, i32 1, i32 0, i1 false)
+ i32 16, i32 7, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
; CHECK: [[V:%[0-9]+]] = OpImageRead [[v4_int]] [[buffer]] [[zero]]
; CHECK: [[e0:%[0-9]+]] = OpCompositeExtract [[int]] [[V]] 0
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoadStore.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoadStore.ll
index d810ef9ccecc4..22fb4c3e78dcc 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoadStore.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoadStore.ll
@@ -1,6 +1,8 @@
; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv-vulkan-library %s -o - | FileCheck %s
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-vulkan-library %s -o - -filetype=obj | spirv-val %}
+@.str.b0 = private unnamed_addr constant [3 x i8] c"B0\00", align 1
+
; CHECK-DAG: [[float:%[0-9]+]] = OpTypeFloat 32
; CHECK-DAG: [[v2float:%[0-9]+]] = OpTypeVector [[float]] 2
; CHECK-DAG: [[v4float:%[0-9]+]] = OpTypeVector [[float]] 4
@@ -18,7 +20,7 @@
define void @main_scalar() local_unnamed_addr #0 {
entry:
; CHECK: [[H:%[0-9]+]] = OpLoad [[ImageType]] [[Var]]
- %s_h.i = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 1) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, i1 false)
+ %s_h.i = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 1) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
; CHECK: [[R:%[0-9]+]] = OpImageRead [[v4float]] [[H]] [[one]]
; CHECK: [[V:%[0-9]+]] = OpCompositeExtract [[float]] [[R]] 0
@@ -57,7 +59,7 @@ bb_both:
define void @main_vector2() local_unnamed_addr #0 {
entry:
; CHECK: [[H:%[0-9]+]] = OpLoad [[ImageType]] [[Var]]
- %s_h.i = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 1) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, i1 false)
+ %s_h.i = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 1) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
; CHECK: [[R:%[0-9]+]] = OpImageRead [[v4float]] [[H]] [[one]]
; CHECK: [[E0:%[0-9]+]] = OpCompositeExtract [[float]] [[R]] 0
@@ -100,7 +102,7 @@ bb_both:
define void @main_vector4() local_unnamed_addr #0 {
entry:
; CHECK: [[H:%[0-9]+]] = OpLoad [[ImageType]] [[Var]]
- %s_h.i = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 1) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, i1 false)
+ %s_h.i = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 1) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
; CHECK: [[R:%[0-9]+]] = OpImageRead [[v4float]] [[H]] [[one]]
%0 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", float, 5, 2, 0, 0, 2, 1) %s_h.i, i32 1)
@@ -132,11 +134,5 @@ bb_both:
ret void
}
-; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)
-declare ptr @llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", float, 5, 2, 0, 0, 2, 1), i32) #1
-
-; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)
-declare target("spirv.Image", float, 5, 2, 0, 0, 2, 1) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32, i32, i32, i32, i1) #1
-
attributes #0 = { mustprogress nofree noinline norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none) "frame-pointer"="all" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(none) }
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll
index 812e20e45565b..ee976f1a4110e 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll
@@ -1,6 +1,8 @@
; RUN: llc -O3 -verify-machineinstrs -mtriple=spirv-vulkan-library %s -o - | FileCheck %s
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-vulkan-library %s -o - -filetype=obj | spirv-val %}
+@.str.b = private unnamed_addr constant [2 x i8] c"B\00", align 1
+
; CHECK-NOT: OpCapability StorageImageReadWithoutFormat
; CHECK-DAG: OpDecorate [[IntBufferVar:%[0-9]+]] DescriptorSet 16
@@ -22,7 +24,7 @@ declare <4 x i32> @get_data() #1
define void @RWBufferStore_Vec4_I32() #0 {
%buffer0 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_i32_5_2_0_0_2_24(
- i32 16, i32 7, i32 1, i32 0, i1 false)
+ i32 16, i32 7, i32 1, i32 0, i1 false, ptr nonnull @.str.b)
...
[truncated]
|
|
@llvm/pr-subscribers-clang Author: Steven Perron (s-perron) ChangesPatch is 46.79 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/143412.diff 21 Files Affected:
diff --git a/clang/lib/CodeGen/CGHLSLRuntime.cpp b/clang/lib/CodeGen/CGHLSLRuntime.cpp
index 6d267e6164845..d7f73318b3f5a 100644
--- a/clang/lib/CodeGen/CGHLSLRuntime.cpp
+++ b/clang/lib/CodeGen/CGHLSLRuntime.cpp
@@ -243,7 +243,7 @@ CGHLSLRuntime::getCreateHandleFromBindingIntrinsic() {
case llvm::Triple::dxil:
return std::pair(llvm::Intrinsic::dx_resource_handlefrombinding, true);
case llvm::Triple::spirv:
- return std::pair(llvm::Intrinsic::spv_resource_handlefrombinding, false);
+ return std::pair(llvm::Intrinsic::spv_resource_handlefrombinding, true);
default:
llvm_unreachable("Intrinsic resource_handlefrombinding not supported by "
"target architecture");
@@ -258,7 +258,7 @@ CGHLSLRuntime::getCreateHandleFromImplicitBindingIntrinsic() {
true);
case llvm::Triple::spirv:
return std::pair(llvm::Intrinsic::spv_resource_handlefromimplicitbinding,
- false);
+ true);
default:
llvm_unreachable(
"Intrinsic resource_handlefromimplicitbinding not supported by "
diff --git a/llvm/include/llvm/IR/IntrinsicsSPIRV.td b/llvm/include/llvm/IR/IntrinsicsSPIRV.td
index 8d984d6ce58df..6e6074a0d8582 100644
--- a/llvm/include/llvm/IR/IntrinsicsSPIRV.td
+++ b/llvm/include/llvm/IR/IntrinsicsSPIRV.td
@@ -115,15 +115,15 @@ let TargetPrefix = "spv" in {
// array size of the binding, as well as an index and an indicator
// whether that index may be non-uniform.
def int_spv_resource_handlefrombinding
- : DefaultAttrsIntrinsic<
- [llvm_any_ty],
- [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i1_ty],
- [IntrNoMem]>;
+ : DefaultAttrsIntrinsic<[llvm_any_ty],
+ [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
+ llvm_i32_ty, llvm_i1_ty, llvm_ptr_ty],
+ [IntrNoMem]>;
def int_spv_resource_handlefromimplicitbinding
- : DefaultAttrsIntrinsic<
- [llvm_any_ty],
- [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i1_ty],
- [IntrNoMem]>;
+ : DefaultAttrsIntrinsic<[llvm_any_ty],
+ [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
+ llvm_i32_ty, llvm_i1_ty, llvm_ptr_ty],
+ [IntrNoMem]>;
def int_spv_firstbituhigh : DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0, llvm_i32_ty>], [llvm_anyint_ty], [IntrNoMem]>;
def int_spv_firstbitshigh : DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0, llvm_i32_ty>], [llvm_anyint_ty], [IntrNoMem]>;
diff --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
index c5e8269efd25a..292b83e05b56d 100644
--- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
@@ -799,107 +799,15 @@ Register SPIRVGlobalRegistry::buildGlobalVariable(
return Reg;
}
-static std::string GetSpirvImageTypeName(const SPIRVType *Type,
- MachineIRBuilder &MIRBuilder,
- const std::string &Prefix,
- SPIRVGlobalRegistry &GR);
-
// Returns a name based on the Type. Notes that this does not look at
// decorations, and will return the same string for two types that are the same
// except for decorations.
-static std::string buildSpirvTypeName(const SPIRVType *Type,
- MachineIRBuilder &MIRBuilder,
- SPIRVGlobalRegistry &GR) {
- switch (Type->getOpcode()) {
- case SPIRV::OpTypeSampledImage: {
- return GetSpirvImageTypeName(Type, MIRBuilder, "sampled_image_", GR);
- }
- case SPIRV::OpTypeImage: {
- return GetSpirvImageTypeName(Type, MIRBuilder, "image_", GR);
- }
- case SPIRV::OpTypeArray: {
- MachineRegisterInfo *MRI = MIRBuilder.getMRI();
- Register ElementTypeReg = Type->getOperand(1).getReg();
- auto *ElementType = MRI->getUniqueVRegDef(ElementTypeReg);
- uint32_t ArraySize = getArrayComponentCount(MRI, Type);
- return (buildSpirvTypeName(ElementType, MIRBuilder, GR) + Twine("[") +
- Twine(ArraySize) + Twine("]"))
- .str();
- }
- case SPIRV::OpTypeFloat:
- return ("f" + Twine(Type->getOperand(1).getImm())).str();
- case SPIRV::OpTypeSampler:
- return ("sampler");
- case SPIRV::OpTypeInt:
- if (Type->getOperand(2).getImm())
- return ("i" + Twine(Type->getOperand(1).getImm())).str();
- return ("u" + Twine(Type->getOperand(1).getImm())).str();
- case SPIRV::OpTypePointer: {
- uint32_t StorageClass = GR.getPointerStorageClass(Type);
- SPIRVType *PointeeType = GR.getPointeeType(Type);
- return ("p_" + Twine(StorageClass) + Twine("_") +
- buildSpirvTypeName(PointeeType, MIRBuilder, GR))
- .str();
- }
- case SPIRV::OpTypeStruct: {
- std::string TypeName = "{";
- for (uint32_t I = 1; I < Type->getNumOperands(); ++I) {
- SPIRVType *MemberType =
- GR.getSPIRVTypeForVReg(Type->getOperand(I).getReg());
- TypeName += '_' + buildSpirvTypeName(MemberType, MIRBuilder, GR);
- }
- return TypeName + "}";
- }
- case SPIRV::OpTypeVector: {
- MachineRegisterInfo *MRI = MIRBuilder.getMRI();
- Register ElementTypeReg = Type->getOperand(1).getReg();
- auto *ElementType = MRI->getUniqueVRegDef(ElementTypeReg);
- uint32_t VectorSize = GR.getScalarOrVectorComponentCount(Type);
- return (buildSpirvTypeName(ElementType, MIRBuilder, GR) + Twine("[") +
- Twine(VectorSize) + Twine("]"))
- .str();
- }
- case SPIRV::OpTypeRuntimeArray: {
- MachineRegisterInfo *MRI = MIRBuilder.getMRI();
- Register ElementTypeReg = Type->getOperand(1).getReg();
- auto *ElementType = MRI->getUniqueVRegDef(ElementTypeReg);
- uint32_t ArraySize = 0;
- return (buildSpirvTypeName(ElementType, MIRBuilder, GR) + Twine("[") +
- Twine(ArraySize) + Twine("]"))
- .str();
- }
- default:
- llvm_unreachable("Trying to the the name of an unknown type.");
- }
-}
-
-static std::string GetSpirvImageTypeName(const SPIRVType *Type,
- MachineIRBuilder &MIRBuilder,
- const std::string &Prefix,
- SPIRVGlobalRegistry &GR) {
- Register SampledTypeReg = Type->getOperand(1).getReg();
- auto *SampledType = MIRBuilder.getMRI()->getUniqueVRegDef(SampledTypeReg);
- std::string TypeName =
- Prefix + buildSpirvTypeName(SampledType, MIRBuilder, GR);
- for (uint32_t I = 2; I < Type->getNumOperands(); ++I) {
- TypeName = (TypeName + '_' + Twine(Type->getOperand(I).getImm())).str();
- }
- return TypeName;
-}
-
Register SPIRVGlobalRegistry::getOrCreateGlobalVariableWithBinding(
- const SPIRVType *VarType, uint32_t Set, uint32_t Binding,
+ const SPIRVType *VarType, uint32_t Set, uint32_t Binding, StringRef Name,
MachineIRBuilder &MIRBuilder) {
Register VarReg =
MIRBuilder.getMRI()->createVirtualRegister(&SPIRV::iIDRegClass);
- // TODO(138533): The name should come from the llvm-ir, but how that name will
- // be passed from the HLSL to the backend has not been decided. Using this
- // place holder for now.
- std::string Name =
- ("__resource_" + buildSpirvTypeName(VarType, MIRBuilder, *this) + "_" +
- Twine(Set) + "_" + Twine(Binding))
- .str();
buildGlobalVariable(VarReg, VarType, Name, nullptr,
getPointerStorageClass(VarType), nullptr, false, false,
SPIRV::LinkageType::Import, MIRBuilder, false);
diff --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
index 3b481b3aba0c1..35f616a1981d2 100644
--- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
+++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
@@ -548,6 +548,7 @@ class SPIRVGlobalRegistry : public SPIRVIRMapping {
bool IsInstSelector);
Register getOrCreateGlobalVariableWithBinding(const SPIRVType *VarType,
uint32_t Set, uint32_t Binding,
+ StringRef Name,
MachineIRBuilder &MIRBuilder);
// Convenient helpers for getting types with check for duplicates.
diff --git a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
index 2dae0721886c7..8edd0b533b9fa 100644
--- a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
@@ -322,7 +322,7 @@ class SPIRVInstructionSelector : public InstructionSelector {
SPIRV::StorageClass::StorageClass SC,
uint32_t Set, uint32_t Binding,
uint32_t ArraySize, Register IndexReg,
- bool IsNonUniform,
+ bool IsNonUniform, StringRef Name,
MachineIRBuilder MIRBuilder) const;
SPIRVType *widenTypeToVec4(const SPIRVType *Type, MachineInstr &I) const;
bool extractSubvector(Register &ResVReg, const SPIRVType *ResType,
@@ -3380,14 +3380,14 @@ bool SPIRVInstructionSelector::selectImageWriteIntrinsic(
Register SPIRVInstructionSelector::buildPointerToResource(
const SPIRVType *SpirvResType, SPIRV::StorageClass::StorageClass SC,
uint32_t Set, uint32_t Binding, uint32_t ArraySize, Register IndexReg,
- bool IsNonUniform, MachineIRBuilder MIRBuilder) const {
+ bool IsNonUniform, StringRef Name, MachineIRBuilder MIRBuilder) const {
const Type *ResType = GR.getTypeForSPIRVType(SpirvResType);
if (ArraySize == 1) {
SPIRVType *PtrType =
GR.getOrCreateSPIRVPointerType(ResType, MIRBuilder, SC);
assert(GR.getPointeeType(PtrType) == SpirvResType &&
"SpirvResType did not have an explicit layout.");
- return GR.getOrCreateGlobalVariableWithBinding(PtrType, Set, Binding,
+ return GR.getOrCreateGlobalVariableWithBinding(PtrType, Set, Binding, Name,
MIRBuilder);
}
@@ -3395,7 +3395,7 @@ Register SPIRVInstructionSelector::buildPointerToResource(
SPIRVType *VarPointerType =
GR.getOrCreateSPIRVPointerType(VarType, MIRBuilder, SC);
Register VarReg = GR.getOrCreateGlobalVariableWithBinding(
- VarPointerType, Set, Binding, MIRBuilder);
+ VarPointerType, Set, Binding, Name, MIRBuilder);
SPIRVType *ResPointerType =
GR.getOrCreateSPIRVPointerType(ResType, MIRBuilder, SC);
@@ -4081,6 +4081,9 @@ bool SPIRVInstructionSelector::loadHandleBeforePosition(
uint32_t ArraySize = foldImm(HandleDef.getOperand(4), MRI);
Register IndexReg = HandleDef.getOperand(5).getReg();
bool IsNonUniform = ArraySize > 1 && foldImm(HandleDef.getOperand(6), MRI);
+ std::string Name =
+ getStringValueFromReg(HandleDef.getOperand(7).getReg(), *MRI);
+
bool IsStructuredBuffer = ResType->getOpcode() == SPIRV::OpTypePointer;
MachineIRBuilder MIRBuilder(HandleDef);
SPIRVType *VarType = ResType;
@@ -4091,8 +4094,9 @@ bool SPIRVInstructionSelector::loadHandleBeforePosition(
SC = GR.getPointerStorageClass(ResType);
}
- Register VarReg = buildPointerToResource(VarType, SC, Set, Binding, ArraySize,
- IndexReg, IsNonUniform, MIRBuilder);
+ Register VarReg =
+ buildPointerToResource(VarType, SC, Set, Binding, ArraySize, IndexReg,
+ IsNonUniform, Name, MIRBuilder);
if (IsNonUniform)
buildOpDecorate(HandleReg, HandleDef, TII, SPIRV::Decoration::NonUniformEXT,
diff --git a/llvm/lib/Target/SPIRV/SPIRVUtils.cpp b/llvm/lib/Target/SPIRV/SPIRVUtils.cpp
index 725a7979d3e5b..768efb96a53e9 100644
--- a/llvm/lib/Target/SPIRV/SPIRVUtils.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVUtils.cpp
@@ -80,6 +80,16 @@ std::string getStringImm(const MachineInstr &MI, unsigned StartIndex) {
return getSPIRVStringOperand(MI, StartIndex);
}
+std::string getStringValueFromReg(Register Reg, MachineRegisterInfo &MRI) {
+ MachineInstr *Def = getVRegDef(MRI, Reg);
+ assert(Def && Def->getOpcode() == TargetOpcode::G_GLOBAL_VALUE &&
+ "Expected G_GLOBAL_VALUE");
+ const GlobalValue *GV = Def->getOperand(1).getGlobal();
+ Value *V = GV->getOperand(0);
+ const ConstantDataArray *CDA = cast<ConstantDataArray>(V);
+ return CDA->getAsCString().str();
+}
+
void addNumImm(const APInt &Imm, MachineInstrBuilder &MIB) {
const auto Bitwidth = Imm.getBitWidth();
if (Bitwidth == 1)
diff --git a/llvm/lib/Target/SPIRV/SPIRVUtils.h b/llvm/lib/Target/SPIRV/SPIRVUtils.h
index f14a7d356ea58..d732188f9289f 100644
--- a/llvm/lib/Target/SPIRV/SPIRVUtils.h
+++ b/llvm/lib/Target/SPIRV/SPIRVUtils.h
@@ -125,6 +125,10 @@ void addStringImm(const StringRef &Str, IRBuilder<> &B,
// the reverse of the logic in addStringImm.
std::string getStringImm(const MachineInstr &MI, unsigned StartIndex);
+// Returns the string constant that the register refers to. It is assumed that
+// Reg is a global value that contains a string.
+std::string getStringValueFromReg(Register Reg, MachineRegisterInfo &MRI);
+
// Add the given numerical immediate to MIB.
void addNumImm(const APInt &Imm, MachineInstrBuilder &MIB);
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoad.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoad.ll
index 58252fe297f3e..b14b6af156caf 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoad.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoad.ll
@@ -1,6 +1,8 @@
; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv-vulkan-library %s -o - | FileCheck %s
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-vulkan-library %s -o - -filetype=obj | spirv-val %}
+@.str.b0 = private unnamed_addr constant [3 x i8] c"B0\00", align 1
+
; CHECK-NOT: OpCapability StorageImageReadWithoutFormat
; CHECK-DAG: OpDecorate [[IntBufferVar:%[0-9]+]] DescriptorSet 16
@@ -20,7 +22,7 @@ define void @RWBufferLoad_Vec4_I32() #0 {
; CHECK: [[buffer:%[0-9]+]] = OpLoad [[RWBufferTypeInt]] [[IntBufferVar]]
%buffer0 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_i32_5_2_0_0_2_24(
- i32 16, i32 7, i32 1, i32 0, i1 false)
+ i32 16, i32 7, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
; CHECK: OpImageRead [[v4_int]] [[buffer]] [[zero]]
%data0 = call <4 x i32> @llvm.spv.resource.load.typedbuffer(
@@ -35,7 +37,7 @@ define void @RWBufferLoad_I32() #0 {
; CHECK: [[buffer:%[0-9]+]] = OpLoad [[RWBufferTypeInt]] [[IntBufferVar]]
%buffer1 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_i32_5_2_0_0_2_24(
- i32 16, i32 7, i32 1, i32 0, i1 false)
+ i32 16, i32 7, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
; CHECK: [[V:%[0-9]+]] = OpImageRead [[v4_int]] [[buffer]] [[zero]]
; CHECK: OpCompositeExtract [[int]] [[V]] 0
@@ -51,7 +53,7 @@ define void @RWBufferLoad_Vec2_I32() #0 {
; CHECK: [[buffer:%[0-9]+]] = OpLoad [[RWBufferTypeInt]] [[IntBufferVar]]
%buffer0 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_i32_5_2_0_0_2_24(
- i32 16, i32 7, i32 1, i32 0, i1 false)
+ i32 16, i32 7, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
; CHECK: [[V:%[0-9]+]] = OpImageRead [[v4_int]] [[buffer]] [[zero]]
; CHECK: [[e0:%[0-9]+]] = OpCompositeExtract [[int]] [[V]] 0
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoadStore.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoadStore.ll
index d810ef9ccecc4..22fb4c3e78dcc 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoadStore.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoadStore.ll
@@ -1,6 +1,8 @@
; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv-vulkan-library %s -o - | FileCheck %s
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-vulkan-library %s -o - -filetype=obj | spirv-val %}
+@.str.b0 = private unnamed_addr constant [3 x i8] c"B0\00", align 1
+
; CHECK-DAG: [[float:%[0-9]+]] = OpTypeFloat 32
; CHECK-DAG: [[v2float:%[0-9]+]] = OpTypeVector [[float]] 2
; CHECK-DAG: [[v4float:%[0-9]+]] = OpTypeVector [[float]] 4
@@ -18,7 +20,7 @@
define void @main_scalar() local_unnamed_addr #0 {
entry:
; CHECK: [[H:%[0-9]+]] = OpLoad [[ImageType]] [[Var]]
- %s_h.i = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 1) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, i1 false)
+ %s_h.i = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 1) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
; CHECK: [[R:%[0-9]+]] = OpImageRead [[v4float]] [[H]] [[one]]
; CHECK: [[V:%[0-9]+]] = OpCompositeExtract [[float]] [[R]] 0
@@ -57,7 +59,7 @@ bb_both:
define void @main_vector2() local_unnamed_addr #0 {
entry:
; CHECK: [[H:%[0-9]+]] = OpLoad [[ImageType]] [[Var]]
- %s_h.i = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 1) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, i1 false)
+ %s_h.i = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 1) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
; CHECK: [[R:%[0-9]+]] = OpImageRead [[v4float]] [[H]] [[one]]
; CHECK: [[E0:%[0-9]+]] = OpCompositeExtract [[float]] [[R]] 0
@@ -100,7 +102,7 @@ bb_both:
define void @main_vector4() local_unnamed_addr #0 {
entry:
; CHECK: [[H:%[0-9]+]] = OpLoad [[ImageType]] [[Var]]
- %s_h.i = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 1) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, i1 false)
+ %s_h.i = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 1) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, i1 false, ptr nonnull @.str.b0)
; CHECK: [[R:%[0-9]+]] = OpImageRead [[v4float]] [[H]] [[one]]
%0 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", float, 5, 2, 0, 0, 2, 1) %s_h.i, i32 1)
@@ -132,11 +134,5 @@ bb_both:
ret void
}
-; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)
-declare ptr @llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", float, 5, 2, 0, 0, 2, 1), i32) #1
-
-; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)
-declare target("spirv.Image", float, 5, 2, 0, 0, 2, 1) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32, i32, i32, i32, i1) #1
-
attributes #0 = { mustprogress nofree noinline norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none) "frame-pointer"="all" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(none) }
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll
index 812e20e45565b..ee976f1a4110e 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll
@@ -1,6 +1,8 @@
; RUN: llc -O3 -verify-machineinstrs -mtriple=spirv-vulkan-library %s -o - | FileCheck %s
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-vulkan-library %s -o - -filetype=obj | spirv-val %}
+@.str.b = private unnamed_addr constant [2 x i8] c"B\00", align 1
+
; CHECK-NOT: OpCapability StorageImageReadWithoutFormat
; CHECK-DAG: OpDecorate [[IntBufferVar:%[0-9]+]] DescriptorSet 16
@@ -22,7 +24,7 @@ declare <4 x i32> @get_data() #1
define void @RWBufferStore_Vec4_I32() #0 {
%buffer0 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24)
@llvm.spv.resource.handlefrombinding.tspirv.Image_i32_5_2_0_0_2_24(
- i32 16, i32 7, i32 1, i32 0, i1 false)
+ i32 16, i32 7, i32 1, i32 0, i1 false, ptr nonnull @.str.b)
...
[truncated]
|
Keenuts
approved these changes
Jun 10, 2025
bogner
approved these changes
Jun 10, 2025
|
LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/175/builds/20255 Here is the relevant piece of the build log for the reference |
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s-perron
added a commit
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Jun 13, 2025
Fix test broken by llvm#143412.
|
Broken builds fixed by #144116 |
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tomtor
pushed a commit
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that referenced
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Jun 14, 2025
The SPIR-V backend does not have access to the original name of a
resource in the source, so it tries to create a name. This leads to some
problems with reflection.
That is why start to pass the name of the resource from Clang to the
SPIR-V backend.
Fixes llvm#138533
tomtor
pushed a commit
to tomtor/llvm-project
that referenced
this pull request
Jun 14, 2025
Fix test broken by llvm#143412.
akuhlens
pushed a commit
to akuhlens/llvm-project
that referenced
this pull request
Jun 24, 2025
The SPIR-V backend does not have access to the original name of a
resource in the source, so it tries to create a name. This leads to some
problems with reflection.
That is why start to pass the name of the resource from Clang to the
SPIR-V backend.
Fixes llvm#138533
akuhlens
pushed a commit
to akuhlens/llvm-project
that referenced
this pull request
Jun 24, 2025
Fix test broken by llvm#143412.
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The SPIR-V backend does not have access to the original name of a
resource in the source, so it tries to create a name. This leads to some
problems with reflection.
That is why start to pass the name of the resource from Clang to the
SPIR-V backend.
Fixes #138533