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[clang][docs][RISCV] Pre-pend the HelpText for -mrvv-vector-bits into the DocBrief. #144128
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… the DocBrief. The DocBrief is used to generate the webpage description of the optio. The current text only talks about the possible values, but not what the option does.
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@llvm/pr-subscribers-clang Author: Craig Topper (topperc) ChangesThe DocBrief is used to generate the webpage description of the option. The current text only talks about the possible values, but not what the option does. Full diff: https://github.com/llvm/llvm-project/pull/144128.diff 1 Files Affected:
diff --git a/clang/include/clang/Driver/Options.td b/clang/include/clang/Driver/Options.td
index 152df89118a6a..5097630098911 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -5056,9 +5056,10 @@ def mrvv_vector_bits_EQ : Joined<["-"], "mrvv-vector-bits=">, Group<m_Group>,
Visibility<[ClangOption, FlangOption]>,
HelpText<"Specify the size in bits of an RVV vector register">,
DocBrief<!strconcat(
- "Defaults to the vector length agnostic value of \"scalable\". "
- "Accepts power of 2 values between 64 and 65536. Also accepts "
- "\"zvl\" to use the value implied by -march/-mcpu.",
+ "Specify the size in bits of an RVV vector register. Defaults to the "
+ "vector length agnostic value of \"scalable\". Accepts power of 2 values "
+ "between 64 and 65536. Also accepts \"zvl\" to use the value implied by "
+ "-march/-mcpu.",
!cond(
// Flang does not set the preprocessor define.
!eq(GlobalDocumentation.Program, "Flang") : "",
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@llvm/pr-subscribers-backend-risc-v Author: Craig Topper (topperc) ChangesThe DocBrief is used to generate the webpage description of the option. The current text only talks about the possible values, but not what the option does. Full diff: https://github.com/llvm/llvm-project/pull/144128.diff 1 Files Affected:
diff --git a/clang/include/clang/Driver/Options.td b/clang/include/clang/Driver/Options.td
index 152df89118a6a..5097630098911 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -5056,9 +5056,10 @@ def mrvv_vector_bits_EQ : Joined<["-"], "mrvv-vector-bits=">, Group<m_Group>,
Visibility<[ClangOption, FlangOption]>,
HelpText<"Specify the size in bits of an RVV vector register">,
DocBrief<!strconcat(
- "Defaults to the vector length agnostic value of \"scalable\". "
- "Accepts power of 2 values between 64 and 65536. Also accepts "
- "\"zvl\" to use the value implied by -march/-mcpu.",
+ "Specify the size in bits of an RVV vector register. Defaults to the "
+ "vector length agnostic value of \"scalable\". Accepts power of 2 values "
+ "between 64 and 65536. Also accepts \"zvl\" to use the value implied by "
+ "-march/-mcpu.",
!cond(
// Flang does not set the preprocessor define.
!eq(GlobalDocumentation.Program, "Flang") : "",
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mshockwave
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LGTM
…the DocBrief. (llvm#144128) The DocBrief is used to generate the webpage description of the option. The current text only talks about the possible values, but not what the option does.
…the DocBrief. (llvm#144128) The DocBrief is used to generate the webpage description of the option. The current text only talks about the possible values, but not what the option does.
The DocBrief is used to generate the webpage description of the option. The current text only talks about the possible values, but not what the option does.