From 4a10a361c2cd8608bf70b692851574e2e8e0ebf9 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Mon, 16 Jun 2025 22:29:22 +0900 Subject: [PATCH] AArch64: Add arm64ec libcall tests for __arm_sc_* functions --- llvm/test/CodeGen/AArch64/arm64ec-builtins.ll | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/llvm/test/CodeGen/AArch64/arm64ec-builtins.ll b/llvm/test/CodeGen/AArch64/arm64ec-builtins.ll index 92b95a90d89a0..53d08a1157776 100644 --- a/llvm/test/CodeGen/AArch64/arm64ec-builtins.ll +++ b/llvm/test/CodeGen/AArch64/arm64ec-builtins.ll @@ -43,3 +43,33 @@ define float @f6(float %val, i32 %a) { %call = tail call fast float @llvm.ldexp.f32(float %val, i32 %a) ret float %call } + +@dst = global [512 x i8] zeroinitializer, align 1 +@src = global [512 x i8] zeroinitializer, align 1 + +; FIXME: Wrong and probably needs a # prefix +define void @call__arm_sc_memcpy(i64 noundef %n) #0 { +; CHECK-LABEL: "#call__arm_sc_memcpy": +; CHECK: bl __arm_sc_memcpy + + tail call void @llvm.memcpy.p0.p0.i64(ptr align 1 @dst, ptr nonnull align 1 @src, i64 %n, i1 false) + ret void +} + +; FIXME: Wrong and probably needs a # prefix +define void @call__arm_sc_memmove(i64 noundef %n) #0 { +; CHECK-LABEL: "#call__arm_sc_memmove": +; CHECK: bl __arm_sc_memmove + tail call void @llvm.memmove.p0.p0.i64(ptr align 1 @dst, ptr nonnull align 1 @src, i64 %n, i1 false) + ret void +} + +; FIXME: Wrong and probably needs a # prefix +define void @call__arm_sc_memset(i64 noundef %n) #0 { +; CHECK-LABEL: "#call__arm_sc_memset": +; CHECK: bl __arm_sc_memset + tail call void @llvm.memset.p0.i64(ptr align 1 @dst, i8 2, i64 %n, i1 false) + ret void +} + +attributes #0 = { nounwind "aarch64_pstate_sm_enabled" "target-features"="+sme2" }