From f62343c79421a09556ced2f748d4d56b183e3938 Mon Sep 17 00:00:00 2001 From: Stanislav Mekhanoshin Date: Fri, 20 Jun 2025 10:52:11 -0700 Subject: [PATCH] [AMDGPU] Don't insert wait instructions that are not supported by gfx1250 No tests yet, but it will allow further tests not to be polluted with these waits. --- llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp b/llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp index d2de494a23ef7..3212060f303a5 100644 --- a/llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp +++ b/llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp @@ -2272,8 +2272,10 @@ bool SIGfx12CacheControl::insertWaitsBeforeSystemScopeStore( const DebugLoc &DL = MI->getDebugLoc(); BuildMI(MBB, MI, DL, TII->get(S_WAIT_LOADCNT_soft)).addImm(0); - BuildMI(MBB, MI, DL, TII->get(S_WAIT_SAMPLECNT_soft)).addImm(0); - BuildMI(MBB, MI, DL, TII->get(S_WAIT_BVHCNT_soft)).addImm(0); + if (ST.hasImageInsts()) { + BuildMI(MBB, MI, DL, TII->get(S_WAIT_SAMPLECNT_soft)).addImm(0); + BuildMI(MBB, MI, DL, TII->get(S_WAIT_BVHCNT_soft)).addImm(0); + } BuildMI(MBB, MI, DL, TII->get(S_WAIT_KMCNT_soft)).addImm(0); BuildMI(MBB, MI, DL, TII->get(S_WAIT_STORECNT_soft)).addImm(0);