From 0ded7a29e1984372c94d49c5ab5fb1c8f7c3e4e5 Mon Sep 17 00:00:00 2001 From: AZero13 Date: Fri, 17 Oct 2025 14:45:44 -0400 Subject: [PATCH 1/2] Pre-commit test (NFC) --- llvm/test/Transforms/InstCombine/scmp.ll | 296 +++++++++++++++++++++++ 1 file changed, 296 insertions(+) diff --git a/llvm/test/Transforms/InstCombine/scmp.ll b/llvm/test/Transforms/InstCombine/scmp.ll index 2bf22aeb7a6e9..8d1db3dc4bfe0 100644 --- a/llvm/test/Transforms/InstCombine/scmp.ll +++ b/llvm/test/Transforms/InstCombine/scmp.ll @@ -423,6 +423,95 @@ define i8 @scmp_from_select_eq_and_gt_commuted3(i32 %x, i32 %y) { ret i8 %r } +; Commutative tests for (x != y) ? (x > y ? 1 : -1) : 0 +define i8 @scmp_from_select_ne_and_gt_commuted1(i32 %x, i32 %y) { +; CHECK-LABEL: define i8 @scmp_from_select_ne_and_gt_commuted1( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = call i8 @llvm.scmp.i8.i32(i32 [[Y]], i32 [[X]]) +; CHECK-NEXT: ret i8 [[R]] +; + %ne = icmp ne i32 %x, %y + %gt = icmp slt i32 %x, %y + %sel1 = select i1 %gt, i8 1, i8 -1 + %r = select i1 %ne, i8 %sel1, i8 0 + ret i8 %r +} + +define i8 @scmp_from_select_ne_and_gt_commuted2(i32 %x, i32 %y) { +; CHECK-LABEL: define i8 @scmp_from_select_ne_and_gt_commuted2( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = call i8 @llvm.scmp.i8.i32(i32 [[Y]], i32 [[X]]) +; CHECK-NEXT: ret i8 [[R]] +; + %ne = icmp ne i32 %x, %y + %gt = icmp sgt i32 %x, %y + %sel1 = select i1 %gt, i8 -1, i8 1 + %r = select i1 %ne, i8 %sel1, i8 0 + ret i8 %r +} + +define i8 @scmp_from_select_ne_and_gt_commuted3(i32 %x, i32 %y) { +; CHECK-LABEL: define i8 @scmp_from_select_ne_and_gt_commuted3( +; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) { +; CHECK-NEXT: [[R:%.*]] = call i8 @llvm.scmp.i8.i32(i32 [[X]], i32 [[Y]]) +; CHECK-NEXT: ret i8 [[R]] +; + %ne = icmp ne i32 %x, %y + %gt = icmp slt i32 %x, %y + %sel1 = select i1 %gt, i8 -1, i8 1 + %r = select i1 %ne, i8 %sel1, i8 0 + ret i8 %r +} + +; Commutative tests for x != C ? (x > C - 1 ? 1 : -1) : 0 +define i8 @scmp_from_select_ne_const_and_gt_commuted1(i32 %x) { +; CHECK-LABEL: define i8 @scmp_from_select_ne_const_and_gt_commuted1( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[NE_NOT:%.*]] = icmp eq i32 [[X]], 5 +; CHECK-NEXT: [[GT:%.*]] = icmp slt i32 [[X]], 4 +; CHECK-NEXT: [[SEL1:%.*]] = select i1 [[GT]], i8 1, i8 -1 +; CHECK-NEXT: [[R:%.*]] = select i1 [[NE_NOT]], i8 0, i8 [[SEL1]] +; CHECK-NEXT: ret i8 [[R]] +; + %ne = icmp ne i32 %x, 5 + %gt = icmp slt i32 %x, 4 + %sel1 = select i1 %gt, i8 1, i8 -1 + %r = select i1 %ne, i8 %sel1, i8 0 + ret i8 %r +} + +define i8 @scmp_from_select_ne_const_and_gt_commuted2(i32 %x) { +; CHECK-LABEL: define i8 @scmp_from_select_ne_const_and_gt_commuted2( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[NE_NOT:%.*]] = icmp eq i32 [[X]], 5 +; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[X]], 4 +; CHECK-NEXT: [[SEL1:%.*]] = select i1 [[GT]], i8 -1, i8 1 +; CHECK-NEXT: [[R:%.*]] = select i1 [[NE_NOT]], i8 0, i8 [[SEL1]] +; CHECK-NEXT: ret i8 [[R]] +; + %ne = icmp ne i32 %x, 5 + %gt = icmp sgt i32 %x, 4 + %sel1 = select i1 %gt, i8 -1, i8 1 + %r = select i1 %ne, i8 %sel1, i8 0 + ret i8 %r +} + +define i8 @scmp_from_select_ne_const_and_gt_commuted3(i32 %x) { +; CHECK-LABEL: define i8 @scmp_from_select_ne_const_and_gt_commuted3( +; CHECK-SAME: i32 [[X:%.*]]) { +; CHECK-NEXT: [[NE_NOT:%.*]] = icmp eq i32 [[X]], 5 +; CHECK-NEXT: [[GT:%.*]] = icmp slt i32 [[X]], 4 +; CHECK-NEXT: [[SEL1:%.*]] = select i1 [[GT]], i8 -1, i8 1 +; CHECK-NEXT: [[R:%.*]] = select i1 [[NE_NOT]], i8 0, i8 [[SEL1]] +; CHECK-NEXT: ret i8 [[R]] +; + %ne = icmp ne i32 %x, 5 + %gt = icmp slt i32 %x, 4 + %sel1 = select i1 %gt, i8 -1, i8 1 + %r = select i1 %ne, i8 %sel1, i8 0 + ret i8 %r +} + define <3 x i2> @scmp_unary_shuffle_ops(<3 x i8> %x, <3 x i8> %y) { ; CHECK-LABEL: define <3 x i2> @scmp_unary_shuffle_ops( ; CHECK-SAME: <3 x i8> [[X:%.*]], <3 x i8> [[Y:%.*]]) { @@ -436,6 +525,213 @@ define <3 x i2> @scmp_unary_shuffle_ops(<3 x i8> %x, <3 x i8> %y) { ret <3 x i2> %r } +define i32 @scmp_ashr(i32 %a) { +; CHECK-LABEL: define i32 @scmp_ashr( +; CHECK-SAME: i32 [[A:%.*]]) { +; CHECK-NEXT: [[A_LOBIT:%.*]] = ashr i32 [[A]], 31 +; CHECK-NEXT: [[CMP_INV:%.*]] = icmp slt i32 [[A]], 1 +; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[CMP_INV]], i32 [[A_LOBIT]], i32 1 +; CHECK-NEXT: ret i32 [[RETVAL_0]] +; + %a.lobit = ashr i32 %a, 31 + %cmp.inv = icmp slt i32 %a, 1 + %retval.0 = select i1 %cmp.inv, i32 %a.lobit, i32 1 + ret i32 %retval.0 +} + +define i32 @scmp_sgt_slt(i32 %a) { +; CHECK-LABEL: define i32 @scmp_sgt_slt( +; CHECK-SAME: i32 [[A:%.*]]) { +; CHECK-NEXT: [[A_LOBIT:%.*]] = ashr i32 [[A]], 31 +; CHECK-NEXT: [[CMP_INV:%.*]] = icmp slt i32 [[A]], 1 +; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[CMP_INV]], i32 [[A_LOBIT]], i32 1 +; CHECK-NEXT: ret i32 [[RETVAL_0]] +; + %cmp = icmp sgt i32 %a, 0 + %cmp1 = icmp slt i32 %a, 0 + %. = select i1 %cmp1, i32 -1, i32 0 + %retval.0 = select i1 %cmp, i32 1, i32 %. + ret i32 %retval.0 +} + +define i32 @scmp_zero_slt(i32 %a) { +; CHECK-LABEL: define i32 @scmp_zero_slt( +; CHECK-SAME: i32 [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0 +; CHECK-NEXT: [[CMP1_INV:%.*]] = icmp slt i32 [[A]], 1 +; CHECK-NEXT: [[DOT:%.*]] = select i1 [[CMP1_INV]], i32 -1, i32 1 +; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[CMP]], i32 0, i32 [[DOT]] +; CHECK-NEXT: ret i32 [[RETVAL_0]] +; + %cmp = icmp eq i32 %a, 0 + %cmp1.inv = icmp slt i32 %a, 1 + %. = select i1 %cmp1.inv, i32 -1, i32 1 + %retval.0 = select i1 %cmp, i32 0, i32 %. + ret i32 %retval.0 +} + +define i32 @scmp_zero_sgt(i32 %a) { +; CHECK-LABEL: define i32 @scmp_zero_sgt( +; CHECK-SAME: i32 [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0 +; CHECK-NEXT: [[CMP1_INV:%.*]] = icmp sgt i32 [[A]], -1 +; CHECK-NEXT: [[DOT:%.*]] = select i1 [[CMP1_INV]], i32 1, i32 -1 +; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[CMP]], i32 0, i32 [[DOT]] +; CHECK-NEXT: ret i32 [[RETVAL_0]] +; + %cmp = icmp eq i32 %a, 0 + %cmp1.inv = icmp sgt i32 %a, -1 + %. = select i1 %cmp1.inv, i32 1, i32 -1 + %retval.0 = select i1 %cmp, i32 0, i32 %. + ret i32 %retval.0 +} + + +define i32 @scmp_zero_sgt_1(i32 %a) { +; CHECK-LABEL: define i32 @scmp_zero_sgt_1( +; CHECK-SAME: i32 [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0 +; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[A]], -1 +; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP1]], i32 1, i32 -1 +; CHECK-NEXT: [[COND2:%.*]] = select i1 [[CMP]], i32 0, i32 [[COND]] +; CHECK-NEXT: ret i32 [[COND2]] +; + %cmp = icmp eq i32 %a, 0 + %cmp1 = icmp sgt i32 %a, -1 + %cond = select i1 %cmp1, i32 1, i32 -1 + %cond2 = select i1 %cmp, i32 0, i32 %cond + ret i32 %cond2 +} + +define i32 @scmp_zero_slt_1(i32 %a) { +; CHECK-LABEL: define i32 @scmp_zero_slt_1( +; CHECK-SAME: i32 [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0 +; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[A]], 1 +; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP1]], i32 -1, i32 1 +; CHECK-NEXT: [[COND2:%.*]] = select i1 [[CMP]], i32 0, i32 [[COND]] +; CHECK-NEXT: ret i32 [[COND2]] +; + %cmp = icmp eq i32 %a, 0 + %cmp1 = icmp slt i32 %a, 1 + %cond = select i1 %cmp1, i32 -1, i32 1 + %cond2 = select i1 %cmp, i32 0, i32 %cond + ret i32 %cond2 +} + +define i32 @scmp_zero_slt_neg(i32 %a) { +; CHECK-LABEL: define i32 @scmp_zero_slt_neg( +; CHECK-SAME: i32 [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0 +; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[A]], -1 +; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP1]], i32 -1, i32 1 +; CHECK-NEXT: [[COND2:%.*]] = select i1 [[CMP]], i32 0, i32 [[COND]] +; CHECK-NEXT: ret i32 [[COND2]] +; + %cmp = icmp eq i32 %a, 0 + %cmp1 = icmp slt i32 %a, -1 + %cond = select i1 %cmp1, i32 -1, i32 1 + %cond2 = select i1 %cmp, i32 0, i32 %cond + ret i32 %cond2 +} + +define i32 @scmp_zero_sgt_neg(i32 %a) { +; CHECK-LABEL: define i32 @scmp_zero_sgt_neg( +; CHECK-SAME: i32 [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0 +; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[A]], 1 +; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP1]], i32 1, i32 -1 +; CHECK-NEXT: [[COND2:%.*]] = select i1 [[CMP]], i32 0, i32 [[COND]] +; CHECK-NEXT: ret i32 [[COND2]] +; + %cmp = icmp eq i32 %a, 0 + %cmp1 = icmp sgt i32 %a, 1 + %cond = select i1 %cmp1, i32 1, i32 -1 + %cond2 = select i1 %cmp, i32 0, i32 %cond + ret i32 %cond2 +} + +define i32 @ucmp_ugt_ult_neg(i32 %a) { +; CHECK-LABEL: define i32 @ucmp_ugt_ult_neg( +; CHECK-SAME: i32 [[A:%.*]]) { +; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp ne i32 [[A]], 0 +; CHECK-NEXT: [[RETVAL_0:%.*]] = zext i1 [[CMP_NOT]] to i32 +; CHECK-NEXT: ret i32 [[RETVAL_0]] +; + %cmp = icmp ugt i32 %a, 0 + %cmp1 = icmp ult i32 %a, 0 + %. = select i1 %cmp1, i32 -1, i32 0 + %retval.0 = select i1 %cmp, i32 1, i32 %. + ret i32 %retval.0 +} + +define i32 @ucmp_zero_ult_neg(i32 %a) { +; CHECK-LABEL: define i32 @ucmp_zero_ult_neg( +; CHECK-SAME: i32 [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[A]], 0 +; CHECK-NEXT: [[RETVAL_0:%.*]] = zext i1 [[CMP]] to i32 +; CHECK-NEXT: ret i32 [[RETVAL_0]] +; + %cmp = icmp eq i32 %a, 0 + %cmp1.inv = icmp ult i32 %a, 1 + %. = select i1 %cmp1.inv, i32 -1, i32 1 + %retval.0 = select i1 %cmp, i32 0, i32 %. + ret i32 %retval.0 +} + +define i32 @ucmp_zero_ugt_neg(i32 %a) { +; CHECK-LABEL: define i32 @ucmp_zero_ugt_neg( +; CHECK-SAME: i32 [[A:%.*]]) { +; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[A]], 0 +; CHECK-NEXT: [[RETVAL_0:%.*]] = sext i1 [[CMP]] to i32 +; CHECK-NEXT: ret i32 [[RETVAL_0]] +; + %cmp = icmp eq i32 %a, 0 + %cmp1.inv = icmp ugt i32 %a, -1 + %. = select i1 %cmp1.inv, i32 1, i32 -1 + %retval.0 = select i1 %cmp, i32 0, i32 %. + ret i32 %retval.0 +} + +define i32 @scmp_sgt_slt_ab(i32 %a, i32 %b) { +; CHECK-LABEL: define i32 @scmp_sgt_slt_ab( +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[RETVAL_0:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 [[B]]) +; CHECK-NEXT: ret i32 [[RETVAL_0]] +; + %cmp = icmp sgt i32 %a, %b + %cmp1 = icmp slt i32 %a, %b + %. = select i1 %cmp1, i32 -1, i32 0 + %retval.0 = select i1 %cmp, i32 1, i32 %. + ret i32 %retval.0 +} + +define i32 @scmp_zero_slt_ab(i32 %a, i32 %b) { +; CHECK-LABEL: define i32 @scmp_zero_slt_ab( +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[RETVAL_0:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 [[B]]) +; CHECK-NEXT: ret i32 [[RETVAL_0]] +; + %cmp = icmp eq i32 %a, %b + %cmp1.inv = icmp slt i32 %a, %b + %. = select i1 %cmp1.inv, i32 -1, i32 1 + %retval.0 = select i1 %cmp, i32 0, i32 %. + ret i32 %retval.0 +} + +define i32 @scmp_zero_sgt_ab(i32 %a, i32 %b) { +; CHECK-LABEL: define i32 @scmp_zero_sgt_ab( +; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) { +; CHECK-NEXT: [[RETVAL_0:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 [[B]]) +; CHECK-NEXT: ret i32 [[RETVAL_0]] +; + %cmp = icmp eq i32 %a, %b + %cmp1.inv = icmp sgt i32 %a, %b + %. = select i1 %cmp1.inv, i32 1, i32 -1 + %retval.0 = select i1 %cmp, i32 0, i32 %. + ret i32 %retval.0 +} + ; Negative test: true value of outer select is not zero define i8 @scmp_from_select_eq_and_gt_neg1(i32 %x, i32 %y) { ; CHECK-LABEL: define i8 @scmp_from_select_eq_and_gt_neg1( From fdf5dabb6e6554947ffec8bc6820b4b35421f8d5 Mon Sep 17 00:00:00 2001 From: AZero13 Date: Fri, 17 Oct 2025 14:45:53 -0400 Subject: [PATCH 2/2] [InstCombine] Add missing patterns for scmp and ucmp Fixes: https://github.com/llvm/llvm-project/issues/146178 --- .../InstCombine/InstCombineSelect.cpp | 42 +++++++++++++ llvm/test/Transforms/InstCombine/scmp.ll | 61 ++++--------------- 2 files changed, 55 insertions(+), 48 deletions(-) diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp index 09cb225f7b859..a8eb9b9cf6a84 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp @@ -3757,6 +3757,10 @@ static Instruction *foldBitCeil(SelectInst &SI, IRBuilderBase &Builder, // (x < y) ? -1 : zext(x > y) // (x > y) ? 1 : sext(x != y) // (x > y) ? 1 : sext(x < y) +// (x == y) ? 0 : (x > y ? 1 : -1) +// (x == y) ? 0 : (x < y ? -1 : 1) +// Special case: x == C ? 0 : (x > C - 1 ? 1 : -1) +// Special case: x == C ? 0 : (x < C + 1 ? -1 : 1) // Into ucmp/scmp(x, y), where signedness is determined by the signedness // of the comparison in the original sequence. Instruction *InstCombinerImpl::foldSelectToCmp(SelectInst &SI) { @@ -3849,6 +3853,44 @@ Instruction *InstCombinerImpl::foldSelectToCmp(SelectInst &SI) { } } + // Special cases with constants: x == C ? 0 : (x > C-1 ? 1 : -1) + if (Pred == ICmpInst::ICMP_EQ && match(TV, m_Zero())) { + const APInt *C; + if (match(RHS, m_APInt(C))) { + CmpPredicate InnerPred; + Value *InnerRHS; + const APInt *InnerTV, *InnerFV; + if (match(FV, + m_Select(m_ICmp(InnerPred, m_Specific(LHS), m_Value(InnerRHS)), + m_APInt(InnerTV), m_APInt(InnerFV)))) { + + // x == C ? 0 : (x > C-1 ? 1 : -1) + if (ICmpInst::isGT(InnerPred) && InnerTV->isOne() && + InnerFV->isAllOnes()) { + IsSigned = ICmpInst::isSigned(InnerPred); + bool CanSubOne = IsSigned ? !C->isMinSignedValue() : !C->isMinValue(); + if (CanSubOne) { + APInt Cminus1 = *C - 1; + if (match(InnerRHS, m_SpecificInt(Cminus1))) + Replace = true; + } + } + + // x == C ? 0 : (x < C+1 ? -1 : 1) + if (ICmpInst::isLT(InnerPred) && InnerTV->isAllOnes() && + InnerFV->isOne()) { + IsSigned = ICmpInst::isSigned(InnerPred); + bool CanAddOne = IsSigned ? !C->isMaxSignedValue() : !C->isMaxValue(); + if (CanAddOne) { + APInt Cplus1 = *C + 1; + if (match(InnerRHS, m_SpecificInt(Cplus1))) + Replace = true; + } + } + } + } + } + Intrinsic::ID IID = IsSigned ? Intrinsic::scmp : Intrinsic::ucmp; if (Replace) return replaceInstUsesWith( diff --git a/llvm/test/Transforms/InstCombine/scmp.ll b/llvm/test/Transforms/InstCombine/scmp.ll index 8d1db3dc4bfe0..c0be5b986b7fd 100644 --- a/llvm/test/Transforms/InstCombine/scmp.ll +++ b/llvm/test/Transforms/InstCombine/scmp.ll @@ -457,8 +457,8 @@ define i8 @scmp_from_select_ne_and_gt_commuted3(i32 %x, i32 %y) { ; CHECK-NEXT: ret i8 [[R]] ; %ne = icmp ne i32 %x, %y - %gt = icmp slt i32 %x, %y - %sel1 = select i1 %gt, i8 -1, i8 1 + %gt = icmp sgt i32 %x, %y + %sel1 = select i1 %gt, i8 1, i8 -1 %r = select i1 %ne, i8 %sel1, i8 0 ret i8 %r } @@ -467,14 +467,11 @@ define i8 @scmp_from_select_ne_and_gt_commuted3(i32 %x, i32 %y) { define i8 @scmp_from_select_ne_const_and_gt_commuted1(i32 %x) { ; CHECK-LABEL: define i8 @scmp_from_select_ne_const_and_gt_commuted1( ; CHECK-SAME: i32 [[X:%.*]]) { -; CHECK-NEXT: [[NE_NOT:%.*]] = icmp eq i32 [[X]], 5 -; CHECK-NEXT: [[GT:%.*]] = icmp slt i32 [[X]], 4 -; CHECK-NEXT: [[SEL1:%.*]] = select i1 [[GT]], i8 1, i8 -1 -; CHECK-NEXT: [[R:%.*]] = select i1 [[NE_NOT]], i8 0, i8 [[SEL1]] +; CHECK-NEXT: [[R:%.*]] = call i8 @llvm.scmp.i8.i32(i32 [[X]], i32 5) ; CHECK-NEXT: ret i8 [[R]] ; %ne = icmp ne i32 %x, 5 - %gt = icmp slt i32 %x, 4 + %gt = icmp sgt i32 %x, 4 %sel1 = select i1 %gt, i8 1, i8 -1 %r = select i1 %ne, i8 %sel1, i8 0 ret i8 %r @@ -483,15 +480,12 @@ define i8 @scmp_from_select_ne_const_and_gt_commuted1(i32 %x) { define i8 @scmp_from_select_ne_const_and_gt_commuted2(i32 %x) { ; CHECK-LABEL: define i8 @scmp_from_select_ne_const_and_gt_commuted2( ; CHECK-SAME: i32 [[X:%.*]]) { -; CHECK-NEXT: [[NE_NOT:%.*]] = icmp eq i32 [[X]], 5 -; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[X]], 4 -; CHECK-NEXT: [[SEL1:%.*]] = select i1 [[GT]], i8 -1, i8 1 -; CHECK-NEXT: [[R:%.*]] = select i1 [[NE_NOT]], i8 0, i8 [[SEL1]] +; CHECK-NEXT: [[R:%.*]] = call i8 @llvm.scmp.i8.i32(i32 [[X]], i32 5) ; CHECK-NEXT: ret i8 [[R]] ; %ne = icmp ne i32 %x, 5 %gt = icmp sgt i32 %x, 4 - %sel1 = select i1 %gt, i8 -1, i8 1 + %sel1 = select i1 %gt, i8 1, i8 -1 %r = select i1 %ne, i8 %sel1, i8 0 ret i8 %r } @@ -499,15 +493,12 @@ define i8 @scmp_from_select_ne_const_and_gt_commuted2(i32 %x) { define i8 @scmp_from_select_ne_const_and_gt_commuted3(i32 %x) { ; CHECK-LABEL: define i8 @scmp_from_select_ne_const_and_gt_commuted3( ; CHECK-SAME: i32 [[X:%.*]]) { -; CHECK-NEXT: [[NE_NOT:%.*]] = icmp eq i32 [[X]], 5 -; CHECK-NEXT: [[GT:%.*]] = icmp slt i32 [[X]], 4 -; CHECK-NEXT: [[SEL1:%.*]] = select i1 [[GT]], i8 -1, i8 1 -; CHECK-NEXT: [[R:%.*]] = select i1 [[NE_NOT]], i8 0, i8 [[SEL1]] +; CHECK-NEXT: [[R:%.*]] = call i8 @llvm.scmp.i8.i32(i32 [[X]], i32 5) ; CHECK-NEXT: ret i8 [[R]] ; %ne = icmp ne i32 %x, 5 - %gt = icmp slt i32 %x, 4 - %sel1 = select i1 %gt, i8 -1, i8 1 + %gt = icmp sgt i32 %x, 4 + %sel1 = select i1 %gt, i8 1, i8 -1 %r = select i1 %ne, i8 %sel1, i8 0 ret i8 %r } @@ -525,20 +516,6 @@ define <3 x i2> @scmp_unary_shuffle_ops(<3 x i8> %x, <3 x i8> %y) { ret <3 x i2> %r } -define i32 @scmp_ashr(i32 %a) { -; CHECK-LABEL: define i32 @scmp_ashr( -; CHECK-SAME: i32 [[A:%.*]]) { -; CHECK-NEXT: [[A_LOBIT:%.*]] = ashr i32 [[A]], 31 -; CHECK-NEXT: [[CMP_INV:%.*]] = icmp slt i32 [[A]], 1 -; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[CMP_INV]], i32 [[A_LOBIT]], i32 1 -; CHECK-NEXT: ret i32 [[RETVAL_0]] -; - %a.lobit = ashr i32 %a, 31 - %cmp.inv = icmp slt i32 %a, 1 - %retval.0 = select i1 %cmp.inv, i32 %a.lobit, i32 1 - ret i32 %retval.0 -} - define i32 @scmp_sgt_slt(i32 %a) { ; CHECK-LABEL: define i32 @scmp_sgt_slt( ; CHECK-SAME: i32 [[A:%.*]]) { @@ -557,10 +534,7 @@ define i32 @scmp_sgt_slt(i32 %a) { define i32 @scmp_zero_slt(i32 %a) { ; CHECK-LABEL: define i32 @scmp_zero_slt( ; CHECK-SAME: i32 [[A:%.*]]) { -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0 -; CHECK-NEXT: [[CMP1_INV:%.*]] = icmp slt i32 [[A]], 1 -; CHECK-NEXT: [[DOT:%.*]] = select i1 [[CMP1_INV]], i32 -1, i32 1 -; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[CMP]], i32 0, i32 [[DOT]] +; CHECK-NEXT: [[RETVAL_0:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 0) ; CHECK-NEXT: ret i32 [[RETVAL_0]] ; %cmp = icmp eq i32 %a, 0 @@ -573,10 +547,7 @@ define i32 @scmp_zero_slt(i32 %a) { define i32 @scmp_zero_sgt(i32 %a) { ; CHECK-LABEL: define i32 @scmp_zero_sgt( ; CHECK-SAME: i32 [[A:%.*]]) { -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0 -; CHECK-NEXT: [[CMP1_INV:%.*]] = icmp sgt i32 [[A]], -1 -; CHECK-NEXT: [[DOT:%.*]] = select i1 [[CMP1_INV]], i32 1, i32 -1 -; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[CMP]], i32 0, i32 [[DOT]] +; CHECK-NEXT: [[RETVAL_0:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 0) ; CHECK-NEXT: ret i32 [[RETVAL_0]] ; %cmp = icmp eq i32 %a, 0 @@ -590,10 +561,7 @@ define i32 @scmp_zero_sgt(i32 %a) { define i32 @scmp_zero_sgt_1(i32 %a) { ; CHECK-LABEL: define i32 @scmp_zero_sgt_1( ; CHECK-SAME: i32 [[A:%.*]]) { -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0 -; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[A]], -1 -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP1]], i32 1, i32 -1 -; CHECK-NEXT: [[COND2:%.*]] = select i1 [[CMP]], i32 0, i32 [[COND]] +; CHECK-NEXT: [[COND2:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 0) ; CHECK-NEXT: ret i32 [[COND2]] ; %cmp = icmp eq i32 %a, 0 @@ -606,10 +574,7 @@ define i32 @scmp_zero_sgt_1(i32 %a) { define i32 @scmp_zero_slt_1(i32 %a) { ; CHECK-LABEL: define i32 @scmp_zero_slt_1( ; CHECK-SAME: i32 [[A:%.*]]) { -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0 -; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[A]], 1 -; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP1]], i32 -1, i32 1 -; CHECK-NEXT: [[COND2:%.*]] = select i1 [[CMP]], i32 0, i32 [[COND]] +; CHECK-NEXT: [[COND2:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 0) ; CHECK-NEXT: ret i32 [[COND2]] ; %cmp = icmp eq i32 %a, 0