From 5dc52519b5500a80cf685db9b5f6bd2b42b593ad Mon Sep 17 00:00:00 2001 From: Changpeng Fang Date: Wed, 23 Jul 2025 13:08:38 -0700 Subject: [PATCH] AMDGPU: Support V_PK_MAXIMUM3_F16 and V_PK_MINIMUM3_F16 on gfx1250 Co-authored-by: Stanislav Mekhanoshin --- llvm/lib/Target/AMDGPU/VOP3PInstructions.td | 2 + llvm/test/CodeGen/AMDGPU/fmaximum3.v2f16.ll | 99 ++++++++++++ llvm/test/CodeGen/AMDGPU/fminimum3.v2f16.ll | 99 ++++++++++++ llvm/test/MC/AMDGPU/gfx1250_asm_vop3p.s | 144 ++++++++++++++++++ .../AMDGPU/gfx1250_dasm_vop3p.txt | 90 +++++++++++ 5 files changed, 434 insertions(+) create mode 100644 llvm/test/CodeGen/AMDGPU/fmaximum3.v2f16.ll create mode 100644 llvm/test/CodeGen/AMDGPU/fminimum3.v2f16.ll diff --git a/llvm/lib/Target/AMDGPU/VOP3PInstructions.td b/llvm/lib/Target/AMDGPU/VOP3PInstructions.td index 43f9bc946e6fe..23dfa4b07a0e4 100644 --- a/llvm/lib/Target/AMDGPU/VOP3PInstructions.td +++ b/llvm/lib/Target/AMDGPU/VOP3PInstructions.td @@ -2235,6 +2235,8 @@ defm V_PK_ADD_BF16 : VOP3P_Real_gfx1250<0x23>; defm V_PK_MUL_BF16 : VOP3P_Real_gfx1250<0x2a>; defm V_PK_MIN_NUM_BF16 : VOP3P_Real_gfx1250<0x2b>; defm V_PK_MAX_NUM_BF16 : VOP3P_Real_gfx1250<0x2c>; +defm V_PK_MINIMUM3_F16 : VOP3P_Real_gfx1250<0x36>; +defm V_PK_MAXIMUM3_F16 : VOP3P_Real_gfx1250<0x37>; defm V_PK_MINIMUM_F16 : VOP3P_Real_gfx12<0x1d>; defm V_PK_MAXIMUM_F16 : VOP3P_Real_gfx12<0x1e>; diff --git a/llvm/test/CodeGen/AMDGPU/fmaximum3.v2f16.ll b/llvm/test/CodeGen/AMDGPU/fmaximum3.v2f16.ll new file mode 100644 index 0000000000000..852c9cf8face8 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/fmaximum3.v2f16.ll @@ -0,0 +1,99 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 +; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck --check-prefixes=GFX1250,GFX1250-SDAG %s +; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck --check-prefixes=GFX1250,GFX1250-GISEL %s + +define <2 x half> @fmaximum3_v2f16(<2 x half> %a, <2 x half> %b, <2 x half> %c) { +; GFX1250-SDAG-LABEL: fmaximum3_v2f16: +; GFX1250-SDAG: ; %bb.0: ; %entry +; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0 +; GFX1250-SDAG-NEXT: v_pk_maximum3_f16 v0, v2, v0, v1 +; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31] +; +; GFX1250-GISEL-LABEL: fmaximum3_v2f16: +; GFX1250-GISEL: ; %bb.0: ; %entry +; GFX1250-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0 +; GFX1250-GISEL-NEXT: v_pk_maximum3_f16 v0, v0, v1, v1 +; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-GISEL-NEXT: v_pk_maximum3_f16 v0, v2, v0, v0 +; GFX1250-GISEL-NEXT: s_set_pc_i64 s[30:31] +entry: + %min = call <2 x half> @llvm.maximum.v2f16(<2 x half> %a, <2 x half> %b) + %res = call <2 x half> @llvm.maximum.v2f16(<2 x half> %c, <2 x half> %min) + ret <2 x half> %res +} + +define <2 x half> @fmaximum3_v2f16_vss(<2 x half> %a, <2 x half> inreg %b, <2 x half> inreg %c) { +; GFX1250-SDAG-LABEL: fmaximum3_v2f16_vss: +; GFX1250-SDAG: ; %bb.0: ; %entry +; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0 +; GFX1250-SDAG-NEXT: v_pk_maximum3_f16 v0, s1, v0, s0 +; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31] +; +; GFX1250-GISEL-LABEL: fmaximum3_v2f16_vss: +; GFX1250-GISEL: ; %bb.0: ; %entry +; GFX1250-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0 +; GFX1250-GISEL-NEXT: v_pk_maximum3_f16 v0, v0, s0, s0 +; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-GISEL-NEXT: v_pk_maximum3_f16 v0, s1, v0, v0 +; GFX1250-GISEL-NEXT: s_set_pc_i64 s[30:31] +entry: + %min = call <2 x half> @llvm.maximum.v2f16(<2 x half> %a, <2 x half> %b) + %res = call <2 x half> @llvm.maximum.v2f16(<2 x half> %c, <2 x half> %min) + ret <2 x half> %res +} + +define <3 x half> @fmaximum3_v3f16(<3 x half> %a, <3 x half> %b, <3 x half> %c) { +; GFX1250-SDAG-LABEL: fmaximum3_v3f16: +; GFX1250-SDAG: ; %bb.0: ; %entry +; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0 +; GFX1250-SDAG-NEXT: v_pk_maximum3_f16 v0, v4, v0, v2 +; GFX1250-SDAG-NEXT: v_pk_maximum3_f16 v1, v5, v1, v3 +; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31] +; +; GFX1250-GISEL-LABEL: fmaximum3_v3f16: +; GFX1250-GISEL: ; %bb.0: ; %entry +; GFX1250-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0 +; GFX1250-GISEL-NEXT: v_pk_maximum3_f16 v0, v0, v2, v2 +; GFX1250-GISEL-NEXT: v_maximum_f16 v1, v1, v3 +; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX1250-GISEL-NEXT: v_pk_maximum3_f16 v0, v4, v0, v0 +; GFX1250-GISEL-NEXT: v_maximum_f16 v1, v5, v1 +; GFX1250-GISEL-NEXT: s_set_pc_i64 s[30:31] +entry: + %min = call <3 x half> @llvm.maximum.v3f16(<3 x half> %a, <3 x half> %b) + %res = call <3 x half> @llvm.maximum.v3f16(<3 x half> %c, <3 x half> %min) + ret <3 x half> %res +} + +define <4 x half> @fmaximum3_v4f16(<4 x half> %a, <4 x half> %b, <4 x half> %c) { +; GFX1250-SDAG-LABEL: fmaximum3_v4f16: +; GFX1250-SDAG: ; %bb.0: ; %entry +; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0 +; GFX1250-SDAG-NEXT: v_pk_maximum3_f16 v0, v4, v0, v2 +; GFX1250-SDAG-NEXT: v_pk_maximum3_f16 v1, v5, v1, v3 +; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31] +; +; GFX1250-GISEL-LABEL: fmaximum3_v4f16: +; GFX1250-GISEL: ; %bb.0: ; %entry +; GFX1250-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0 +; GFX1250-GISEL-NEXT: v_pk_maximum3_f16 v0, v0, v2, v2 +; GFX1250-GISEL-NEXT: v_pk_maximum3_f16 v1, v1, v3, v3 +; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX1250-GISEL-NEXT: v_pk_maximum3_f16 v0, v4, v0, v0 +; GFX1250-GISEL-NEXT: v_pk_maximum3_f16 v1, v5, v1, v1 +; GFX1250-GISEL-NEXT: s_set_pc_i64 s[30:31] +entry: + %min = call <4 x half> @llvm.maximum.v4f16(<4 x half> %a, <4 x half> %b) + %res = call <4 x half> @llvm.maximum.v4f16(<4 x half> %c, <4 x half> %min) + ret <4 x half> %res +} +;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: +; GFX1250: {{.*}} diff --git a/llvm/test/CodeGen/AMDGPU/fminimum3.v2f16.ll b/llvm/test/CodeGen/AMDGPU/fminimum3.v2f16.ll new file mode 100644 index 0000000000000..df9fb10badb9a --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/fminimum3.v2f16.ll @@ -0,0 +1,99 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 +; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck --check-prefixes=GFX1250,GFX1250-SDAG %s +; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck --check-prefixes=GFX1250,GFX1250-GISEL %s + +define <2 x half> @fminimum3_v2f16(<2 x half> %a, <2 x half> %b, <2 x half> %c) { +; GFX1250-SDAG-LABEL: fminimum3_v2f16: +; GFX1250-SDAG: ; %bb.0: ; %entry +; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0 +; GFX1250-SDAG-NEXT: v_pk_minimum3_f16 v0, v2, v0, v1 +; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31] +; +; GFX1250-GISEL-LABEL: fminimum3_v2f16: +; GFX1250-GISEL: ; %bb.0: ; %entry +; GFX1250-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0 +; GFX1250-GISEL-NEXT: v_pk_minimum3_f16 v0, v0, v1, v1 +; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-GISEL-NEXT: v_pk_minimum3_f16 v0, v2, v0, v0 +; GFX1250-GISEL-NEXT: s_set_pc_i64 s[30:31] +entry: + %min = call <2 x half> @llvm.minimum.v2f16(<2 x half> %a, <2 x half> %b) + %res = call <2 x half> @llvm.minimum.v2f16(<2 x half> %c, <2 x half> %min) + ret <2 x half> %res +} + +define <2 x half> @fminimum3_v2f16_vss(<2 x half> %a, <2 x half> inreg %b, <2 x half> inreg %c) { +; GFX1250-SDAG-LABEL: fminimum3_v2f16_vss: +; GFX1250-SDAG: ; %bb.0: ; %entry +; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0 +; GFX1250-SDAG-NEXT: v_pk_minimum3_f16 v0, s1, v0, s0 +; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31] +; +; GFX1250-GISEL-LABEL: fminimum3_v2f16_vss: +; GFX1250-GISEL: ; %bb.0: ; %entry +; GFX1250-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0 +; GFX1250-GISEL-NEXT: v_pk_minimum3_f16 v0, v0, s0, s0 +; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-GISEL-NEXT: v_pk_minimum3_f16 v0, s1, v0, v0 +; GFX1250-GISEL-NEXT: s_set_pc_i64 s[30:31] +entry: + %min = call <2 x half> @llvm.minimum.v2f16(<2 x half> %a, <2 x half> %b) + %res = call <2 x half> @llvm.minimum.v2f16(<2 x half> %c, <2 x half> %min) + ret <2 x half> %res +} + +define <3 x half> @fminimum3_v3f16(<3 x half> %a, <3 x half> %b, <3 x half> %c) { +; GFX1250-SDAG-LABEL: fminimum3_v3f16: +; GFX1250-SDAG: ; %bb.0: ; %entry +; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0 +; GFX1250-SDAG-NEXT: v_pk_minimum3_f16 v0, v4, v0, v2 +; GFX1250-SDAG-NEXT: v_pk_minimum3_f16 v1, v5, v1, v3 +; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31] +; +; GFX1250-GISEL-LABEL: fminimum3_v3f16: +; GFX1250-GISEL: ; %bb.0: ; %entry +; GFX1250-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0 +; GFX1250-GISEL-NEXT: v_pk_minimum3_f16 v0, v0, v2, v2 +; GFX1250-GISEL-NEXT: v_minimum_f16 v1, v1, v3 +; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX1250-GISEL-NEXT: v_pk_minimum3_f16 v0, v4, v0, v0 +; GFX1250-GISEL-NEXT: v_minimum_f16 v1, v5, v1 +; GFX1250-GISEL-NEXT: s_set_pc_i64 s[30:31] +entry: + %min = call <3 x half> @llvm.minimum.v3f16(<3 x half> %a, <3 x half> %b) + %res = call <3 x half> @llvm.minimum.v3f16(<3 x half> %c, <3 x half> %min) + ret <3 x half> %res +} + +define <4 x half> @fminimum3_v4f16(<4 x half> %a, <4 x half> %b, <4 x half> %c) { +; GFX1250-SDAG-LABEL: fminimum3_v4f16: +; GFX1250-SDAG: ; %bb.0: ; %entry +; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0 +; GFX1250-SDAG-NEXT: v_pk_minimum3_f16 v0, v4, v0, v2 +; GFX1250-SDAG-NEXT: v_pk_minimum3_f16 v1, v5, v1, v3 +; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31] +; +; GFX1250-GISEL-LABEL: fminimum3_v4f16: +; GFX1250-GISEL: ; %bb.0: ; %entry +; GFX1250-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0 +; GFX1250-GISEL-NEXT: v_pk_minimum3_f16 v0, v0, v2, v2 +; GFX1250-GISEL-NEXT: v_pk_minimum3_f16 v1, v1, v3, v3 +; GFX1250-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) +; GFX1250-GISEL-NEXT: v_pk_minimum3_f16 v0, v4, v0, v0 +; GFX1250-GISEL-NEXT: v_pk_minimum3_f16 v1, v5, v1, v1 +; GFX1250-GISEL-NEXT: s_set_pc_i64 s[30:31] +entry: + %min = call <4 x half> @llvm.minimum.v4f16(<4 x half> %a, <4 x half> %b) + %res = call <4 x half> @llvm.minimum.v4f16(<4 x half> %c, <4 x half> %min) + ret <4 x half> %res +} +;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: +; GFX1250: {{.*}} diff --git a/llvm/test/MC/AMDGPU/gfx1250_asm_vop3p.s b/llvm/test/MC/AMDGPU/gfx1250_asm_vop3p.s index 4b1a6e655b4db..0710344e3f057 100644 --- a/llvm/test/MC/AMDGPU/gfx1250_asm_vop3p.s +++ b/llvm/test/MC/AMDGPU/gfx1250_asm_vop3p.s @@ -1025,3 +1025,147 @@ v_pk_fma_bf16 v5, src_scc, vcc_lo, -1 op_sel:[0,1,0] op_sel_hi:[1,0,1] neg_lo:[0 v_pk_fma_bf16 v255, 0xfe0b, vcc_hi, null op_sel:[0,0,1] op_sel_hi:[1,1,0] neg_lo:[1,1,1] neg_hi:[1,1,1] clamp // GFX1250: v_pk_fma_bf16 v255, 0xfe0b, vcc_hi, null op_sel:[0,0,1] op_sel_hi:[1,1,0] neg_lo:[1,1,1] neg_hi:[1,1,1] clamp ; encoding: [0xff,0xa7,0x11,0xcc,0xff,0xd6,0xf0,0xf9,0x0b,0xfe,0x00,0x00] // GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_minimum3_f16 v8, v1, s1, v4 +// GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 ; encoding: [0x08,0x40,0x36,0xcc,0x01,0x03,0x10,0x1c] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_minimum3_f16 v8, v1, s1, v4 +// GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 ; encoding: [0x08,0x40,0x36,0xcc,0x01,0x03,0x10,0x1c] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_minimum3_f16 v8, v1, s1, v4 +// GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 ; encoding: [0x08,0x40,0x36,0xcc,0x01,0x03,0x10,0x1c] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_minimum3_f16 v8, v1, s1, v4 +// GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 ; encoding: [0x08,0x40,0x36,0xcc,0x01,0x03,0x10,0x1c] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_minimum3_f16 v8, v1, s1, v4 op_sel_hi:[0,0,0] +// GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 op_sel_hi:[0,0,0] ; encoding: [0x08,0x00,0x36,0xcc,0x01,0x03,0x10,0x04] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_minimum3_f16 v8, v1, s1, v4 op_sel:[0,0,1] op_sel_hi:[0,0,1] +// GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 op_sel:[0,0,1] op_sel_hi:[0,0,1] ; encoding: [0x08,0x60,0x36,0xcc,0x01,0x03,0x10,0x04] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_minimum3_f16 v8, v1, s1, v4 neg_lo:[1,1,1] +// GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 neg_lo:[1,1,1] ; encoding: [0x08,0x40,0x36,0xcc,0x01,0x03,0x10,0xfc] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_minimum3_f16 v8, v1, s1, v4 neg_hi:[1,1,1] +// GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 neg_hi:[1,1,1] ; encoding: [0x08,0x47,0x36,0xcc,0x01,0x03,0x10,0x1c] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_minimum3_f16 v8, v1, s1, v4 neg_lo:[1,1,1] neg_hi:[1,1,1] +// GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 neg_lo:[1,1,1] neg_hi:[1,1,1] ; encoding: [0x08,0x47,0x36,0xcc,0x01,0x03,0x10,0xfc] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_minimum3_f16 v8, v1, s1, v4 neg_lo:[1,0,0] +// GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 neg_lo:[1,0,0] ; encoding: [0x08,0x40,0x36,0xcc,0x01,0x03,0x10,0x3c] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_minimum3_f16 v8, v1, s1, v4 neg_lo:[0,1,0] +// GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 neg_lo:[0,1,0] ; encoding: [0x08,0x40,0x36,0xcc,0x01,0x03,0x10,0x5c] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_minimum3_f16 v8, v1, s1, v4 neg_lo:[0,0,1] +// GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 neg_lo:[0,0,1] ; encoding: [0x08,0x40,0x36,0xcc,0x01,0x03,0x10,0x9c] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_minimum3_f16 v8, v1, s1, v4 neg_hi:[1,0,0] +// GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 neg_hi:[1,0,0] ; encoding: [0x08,0x41,0x36,0xcc,0x01,0x03,0x10,0x1c] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_minimum3_f16 v8, v1, s1, v4 neg_hi:[0,1,0] +// GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 neg_hi:[0,1,0] ; encoding: [0x08,0x42,0x36,0xcc,0x01,0x03,0x10,0x1c] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_minimum3_f16 v8, v1, s1, v4 neg_hi:[0,0,1] +// GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 neg_hi:[0,0,1] ; encoding: [0x08,0x44,0x36,0xcc,0x01,0x03,0x10,0x1c] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_minimum3_f16 v8, v1, s1, v4 clamp +// GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 clamp ; encoding: [0x08,0xc0,0x36,0xcc,0x01,0x03,0x10,0x1c] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_minimum3_f16 v1, v4, v9, v16 +// GFX1250: v_pk_minimum3_f16 v1, v4, v9, v16 ; encoding: [0x01,0x40,0x36,0xcc,0x04,0x13,0x42,0x1c] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_minimum3_f16 v1, v2, v5, 1.0 +// GFX1250: v_pk_minimum3_f16 v1, v2, v5, 1.0 ; encoding: [0x01,0x40,0x36,0xcc,0x02,0x0b,0xca,0x1b] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_maximum3_f16 v8, v1, s1, v4 +// GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 ; encoding: [0x08,0x40,0x37,0xcc,0x01,0x03,0x10,0x1c] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_maximum3_f16 v8, v1, s1, v4 +// GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 ; encoding: [0x08,0x40,0x37,0xcc,0x01,0x03,0x10,0x1c] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_maximum3_f16 v8, v1, s1, v4 +// GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 ; encoding: [0x08,0x40,0x37,0xcc,0x01,0x03,0x10,0x1c] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_maximum3_f16 v8, v1, s1, v4 +// GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 ; encoding: [0x08,0x40,0x37,0xcc,0x01,0x03,0x10,0x1c] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_maximum3_f16 v8, v1, s1, v4 op_sel_hi:[0,0,0] +// GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 op_sel_hi:[0,0,0] ; encoding: [0x08,0x00,0x37,0xcc,0x01,0x03,0x10,0x04] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_maximum3_f16 v8, v1, s1, v4 op_sel:[0,0,1] op_sel_hi:[0,0,1] +// GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 op_sel:[0,0,1] op_sel_hi:[0,0,1] ; encoding: [0x08,0x60,0x37,0xcc,0x01,0x03,0x10,0x04] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_maximum3_f16 v8, v1, s1, v4 neg_lo:[1,1,1] +// GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 neg_lo:[1,1,1] ; encoding: [0x08,0x40,0x37,0xcc,0x01,0x03,0x10,0xfc] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_maximum3_f16 v8, v1, s1, v4 neg_hi:[1,1,1] +// GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 neg_hi:[1,1,1] ; encoding: [0x08,0x47,0x37,0xcc,0x01,0x03,0x10,0x1c] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_maximum3_f16 v8, v1, s1, v4 neg_lo:[1,1,1] neg_hi:[1,1,1] +// GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 neg_lo:[1,1,1] neg_hi:[1,1,1] ; encoding: [0x08,0x47,0x37,0xcc,0x01,0x03,0x10,0xfc] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_maximum3_f16 v8, v1, s1, v4 neg_lo:[1,0,0] +// GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 neg_lo:[1,0,0] ; encoding: [0x08,0x40,0x37,0xcc,0x01,0x03,0x10,0x3c] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_maximum3_f16 v8, v1, s1, v4 neg_lo:[0,1,0] +// GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 neg_lo:[0,1,0] ; encoding: [0x08,0x40,0x37,0xcc,0x01,0x03,0x10,0x5c] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_maximum3_f16 v8, v1, s1, v4 neg_lo:[0,0,1] +// GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 neg_lo:[0,0,1] ; encoding: [0x08,0x40,0x37,0xcc,0x01,0x03,0x10,0x9c] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_maximum3_f16 v8, v1, s1, v4 neg_hi:[1,0,0] +// GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 neg_hi:[1,0,0] ; encoding: [0x08,0x41,0x37,0xcc,0x01,0x03,0x10,0x1c] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_maximum3_f16 v8, v1, s1, v4 neg_hi:[0,1,0] +// GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 neg_hi:[0,1,0] ; encoding: [0x08,0x42,0x37,0xcc,0x01,0x03,0x10,0x1c] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_maximum3_f16 v8, v1, s1, v4 neg_hi:[0,0,1] +// GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 neg_hi:[0,0,1] ; encoding: [0x08,0x44,0x37,0xcc,0x01,0x03,0x10,0x1c] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_maximum3_f16 v8, v1, s1, v4 clamp +// GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 clamp ; encoding: [0x08,0xc0,0x37,0xcc,0x01,0x03,0x10,0x1c] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_maximum3_f16 v1, v4, v9, v16 +// GFX1250: v_pk_maximum3_f16 v1, v4, v9, v16 ; encoding: [0x01,0x40,0x37,0xcc,0x04,0x13,0x42,0x1c] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU + +v_pk_maximum3_f16 v1, v2, v5, 1.0 +// GFX1250: v_pk_maximum3_f16 v1, v2, v5, 1.0 ; encoding: [0x01,0x40,0x37,0xcc,0x02,0x0b,0xca,0x1b] +// GFX12-ERR: :[[@LINE-2]]:1: error: instruction not supported on this GPU diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p.txt index 921db7e22a598..64106de88260f 100644 --- a/llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p.txt +++ b/llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p.txt @@ -725,3 +725,93 @@ # GFX1250: v_pk_fma_bf16 v5, vcc_lo, ttmp15, v3 ; encoding: [0x05,0x40,0x11,0xcc,0x6a,0xf6,0x0c,0x1c] 0x05,0x40,0x11,0xcc,0x6a,0xf6,0x0c,0x1c + +# GFX1250: v_pk_minimum3_f16 v1, v2, v5, 1.0 ; encoding: [0x01,0x40,0x36,0xcc,0x02,0x0b,0xca,0x1b] +0x01,0x40,0x36,0xcc,0x02,0x0b,0xca,0x1b + +# GFX1250: v_pk_minimum3_f16 v1, v4, v9, v16 ; encoding: [0x01,0x40,0x36,0xcc,0x04,0x13,0x42,0x1c] +0x01,0x40,0x36,0xcc,0x04,0x13,0x42,0x1c + +# GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 ; encoding: [0x08,0x40,0x36,0xcc,0x01,0x03,0x10,0x1c] +0x08,0x40,0x36,0xcc,0x01,0x03,0x10,0x1c + +# GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 clamp ; encoding: [0x08,0xc0,0x36,0xcc,0x01,0x03,0x10,0x1c] +0x08,0xc0,0x36,0xcc,0x01,0x03,0x10,0x1c + +# GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 neg_hi:[0,0,1] ; encoding: [0x08,0x44,0x36,0xcc,0x01,0x03,0x10,0x1c] +0x08,0x44,0x36,0xcc,0x01,0x03,0x10,0x1c + +# GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 neg_hi:[0,1,0] ; encoding: [0x08,0x42,0x36,0xcc,0x01,0x03,0x10,0x1c] +0x08,0x42,0x36,0xcc,0x01,0x03,0x10,0x1c + +# GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 neg_hi:[1,0,0] ; encoding: [0x08,0x41,0x36,0xcc,0x01,0x03,0x10,0x1c] +0x08,0x41,0x36,0xcc,0x01,0x03,0x10,0x1c + +# GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 neg_hi:[1,1,1] ; encoding: [0x08,0x47,0x36,0xcc,0x01,0x03,0x10,0x1c] +0x08,0x47,0x36,0xcc,0x01,0x03,0x10,0x1c + +# GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 neg_lo:[0,0,1] ; encoding: [0x08,0x40,0x36,0xcc,0x01,0x03,0x10,0x9c] +0x08,0x40,0x36,0xcc,0x01,0x03,0x10,0x9c + +# GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 neg_lo:[0,1,0] ; encoding: [0x08,0x40,0x36,0xcc,0x01,0x03,0x10,0x5c] +0x08,0x40,0x36,0xcc,0x01,0x03,0x10,0x5c + +# GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 neg_lo:[1,0,0] ; encoding: [0x08,0x40,0x36,0xcc,0x01,0x03,0x10,0x3c] +0x08,0x40,0x36,0xcc,0x01,0x03,0x10,0x3c + +# GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 neg_lo:[1,1,1] ; encoding: [0x08,0x40,0x36,0xcc,0x01,0x03,0x10,0xfc] +0x08,0x40,0x36,0xcc,0x01,0x03,0x10,0xfc + +# GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 neg_lo:[1,1,1] neg_hi:[1,1,1] ; encoding: [0x08,0x47,0x36,0xcc,0x01,0x03,0x10,0xfc] +0x08,0x47,0x36,0xcc,0x01,0x03,0x10,0xfc + +# GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 op_sel:[0,0,1] op_sel_hi:[0,0,1] ; encoding: [0x08,0x60,0x36,0xcc,0x01,0x03,0x10,0x04] +0x08,0x60,0x36,0xcc,0x01,0x03,0x10,0x04 + +# GFX1250: v_pk_minimum3_f16 v8, v1, s1, v4 op_sel_hi:[0,0,0] ; encoding: [0x08,0x00,0x36,0xcc,0x01,0x03,0x10,0x04] +0x08,0x00,0x36,0xcc,0x01,0x03,0x10,0x04 + +# GFX1250: v_pk_maximum3_f16 v1, v2, v5, 1.0 ; encoding: [0x01,0x40,0x37,0xcc,0x02,0x0b,0xca,0x1b] +0x01,0x40,0x37,0xcc,0x02,0x0b,0xca,0x1b + +# GFX1250: v_pk_maximum3_f16 v1, v4, v9, v16 ; encoding: [0x01,0x40,0x37,0xcc,0x04,0x13,0x42,0x1c] +0x01,0x40,0x37,0xcc,0x04,0x13,0x42,0x1c + +# GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 ; encoding: [0x08,0x40,0x37,0xcc,0x01,0x03,0x10,0x1c] +0x08,0x40,0x37,0xcc,0x01,0x03,0x10,0x1c + +# GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 clamp ; encoding: [0x08,0xc0,0x37,0xcc,0x01,0x03,0x10,0x1c] +0x08,0xc0,0x37,0xcc,0x01,0x03,0x10,0x1c + +# GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 neg_hi:[0,0,1] ; encoding: [0x08,0x44,0x37,0xcc,0x01,0x03,0x10,0x1c] +0x08,0x44,0x37,0xcc,0x01,0x03,0x10,0x1c + +# GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 neg_hi:[0,1,0] ; encoding: [0x08,0x42,0x37,0xcc,0x01,0x03,0x10,0x1c] +0x08,0x42,0x37,0xcc,0x01,0x03,0x10,0x1c + +# GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 neg_hi:[1,0,0] ; encoding: [0x08,0x41,0x37,0xcc,0x01,0x03,0x10,0x1c] +0x08,0x41,0x37,0xcc,0x01,0x03,0x10,0x1c + +# GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 neg_hi:[1,1,1] ; encoding: [0x08,0x47,0x37,0xcc,0x01,0x03,0x10,0x1c] +0x08,0x47,0x37,0xcc,0x01,0x03,0x10,0x1c + +# GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 neg_lo:[0,0,1] ; encoding: [0x08,0x40,0x37,0xcc,0x01,0x03,0x10,0x9c] +0x08,0x40,0x37,0xcc,0x01,0x03,0x10,0x9c + +# GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 neg_lo:[0,1,0] ; encoding: [0x08,0x40,0x37,0xcc,0x01,0x03,0x10,0x5c] +0x08,0x40,0x37,0xcc,0x01,0x03,0x10,0x5c + +# GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 neg_lo:[1,0,0] ; encoding: [0x08,0x40,0x37,0xcc,0x01,0x03,0x10,0x3c] +0x08,0x40,0x37,0xcc,0x01,0x03,0x10,0x3c + +# GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 neg_lo:[1,1,1] ; encoding: [0x08,0x40,0x37,0xcc,0x01,0x03,0x10,0xfc] +0x08,0x40,0x37,0xcc,0x01,0x03,0x10,0xfc + +# GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 neg_lo:[1,1,1] neg_hi:[1,1,1] ; encoding: [0x08,0x47,0x37,0xcc,0x01,0x03,0x10,0xfc] +0x08,0x47,0x37,0xcc,0x01,0x03,0x10,0xfc + +# GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 op_sel:[0,0,1] op_sel_hi:[0,0,1] ; encoding: [0x08,0x60,0x37,0xcc,0x01,0x03,0x10,0x04] +0x08,0x60,0x37,0xcc,0x01,0x03,0x10,0x04 + +# GFX1250: v_pk_maximum3_f16 v8, v1, s1, v4 op_sel_hi:[0,0,0] ; encoding: [0x08,0x00,0x37,0xcc,0x01,0x03,0x10,0x04] +0x08,0x00,0x37,0xcc,0x01,0x03,0x10,0x04