Skip to content

[SPIRV] Addition of spe-constant-length-array.ll, bit_reverse_small_type.ll test files #151645

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 3 commits into from
Aug 3, 2025
Merged

[SPIRV] Addition of spe-constant-length-array.ll, bit_reverse_small_type.ll test files #151645

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
3 commits
Select commit Hold shift + click to select a range
9021af6
--Test for bitreverse intrinsic with small types
aadeshps-mcw Jul 30, 2025
ba8d17c
Merge branch 'main' into part1
aadeshps-mcw Aug 1, 2025
0cf91e9
Merge branch 'main' into part1
aadeshps-mcw Aug 1, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
56 changes: 56 additions & 0 deletions llvm/test/CodeGen/SPIRV/SpecConstants/spec-constant-length-array.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,56 @@
; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_INTEL_variable_length_array %s -o - | FileCheck %s
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_INTEL_variable_length_array %s -o - -filetype=obj | spirv-val %}

; CHECK: OpCapability VariableLengthArrayINTEL
; CHECK: OpExtension "SPV_INTEL_variable_length_array"

; CHECK-DAG: OpDecorate %[[#]] SpecId 0
; CHECK-DAG: OpDecorate %[[#]] SpecId 1
; CHECK-DAG: OpDecorate %[[#]] SpecId 2
; CHECK-DAG: OpDecorate %[[#A0:]] Alignment 4
; CHECK-DAG: OpDecorate %[[#A1:]] Alignment 2
; CHECK-DAG: OpDecorate %[[#A2:]] Alignment 16

; CHECK: %[[#VOID_TY:]] = OpTypeVoid
; CHECK: %[[#FUNC_TY:]] = OpTypeFunction %[[#VOID_TY]]
; CHECK-DAG: %[[#I64:]] = OpTypeInt 64 0
; CHECK-DAG: %[[#I32:]] = OpTypeInt 32 0
; CHECK-DAG: %[[#I8:]] = OpTypeInt 8 0
; CHECK-DAG: %[[#F64:]] = OpTypeFloat 64
; CHECK-DAG: %[[#STRUCT_TY:]] = OpTypeStruct %[[#F64]] %[[#F64]]
; CHECK-DAG: %[[#PTR_STRUCT:]] = OpTypePointer Function %[[#STRUCT_TY]]
; CHECK-DAG: %[[#PTR_I8:]] = OpTypePointer Function %[[#I8]]
; CHECK-DAG: %[[#F32:]] = OpTypeFloat 32
; CHECK-DAG: %[[#PTR_F32:]] = OpTypePointer Function %[[#F32]]

; CHECK-DAG: %[[#SC0:]] = OpSpecConstant %[[#I64]] 1
; CHECK-DAG: %[[#SC1:]] = OpSpecConstant %[[#I32]] 2
; CHECK-DAG: %[[#SC2:]] = OpSpecConstant %[[#I8]] 4

; CHECK: %[[#]] = OpFunction %[[#VOID_TY]] None %[[#FUNC_TY]]
; CHECK: %[[#LABEL:]] = OpLabel

; CHECK: %[[#A0]] = OpVariableLengthArrayINTEL %[[#PTR_F32]] %[[#SC0]]
; CHECK: %[[#A1]] = OpVariableLengthArrayINTEL %[[#PTR_I8]] %[[#SC1]]
; CHECK: %[[#A2]] = OpVariableLengthArrayINTEL %[[#PTR_STRUCT]] %[[#SC2]]

%struct_type = type { double, double }

define spir_kernel void @test() {
entry:
%length0 = call i64 @_Z20__spirv_SpecConstantix(i32 0, i64 1), !SYCL_SPEC_CONST_SYM_ID !0
%length1 = call i32 @_Z20__spirv_SpecConstantii(i32 1, i32 2), !SYCL_SPEC_CONST_SYM_ID !1
%length2 = call i8 @_Z20__spirv_SpecConstantic(i32 2, i8 4), !SYCL_SPEC_CONST_SYM_ID !2
%scla0 = alloca float, i64 %length0, align 4
%scla1 = alloca i8, i32 %length1, align 2
%scla2 = alloca %struct_type, i8 %length2, align 16
ret void
}

declare i8 @_Z20__spirv_SpecConstantic(i32, i8)
declare i32 @_Z20__spirv_SpecConstantii(i32, i32)
declare i64 @_Z20__spirv_SpecConstantix(i32, i64)

!0 = !{!"i64_spec_const", i32 0}
!1 = !{!"i32_spec_const", i32 1}
!2 = !{!"i8_spec_const", i32 2}
92 changes: 92 additions & 0 deletions llvm/test/CodeGen/SPIRV/llvm-intrinsics/bitreverse_small_type.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,92 @@
;; Check that llvm.bitreverse.* intrinsics are lowered for
;; 2/4-bit scalar and vector types.

; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_INTEL_arbitrary_precision_integers %s -o - | FileCheck %s
; TODO: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_INTEL_arbitrary_precision_integers %s -o - -filetype=obj | spirv-val %}

; CHECK: OpCapability ArbitraryPrecisionIntegersINTEL
; CHECK: OpExtension "SPV_INTEL_arbitrary_precision_integers"

; CHECK: %[[#I4:]] = OpTypeInt 4 0
; CHECK: %[[#I2:]] = OpTypeInt 2 0
; CHECK: %[[#Z4:]] = OpConstantNull %[[#I4]]
; CHECK: %[[#Z2:]] = OpConstantNull %[[#I2]]
; CHECK: %[[#V2I2:]] = OpTypeVector %[[#I2]] 2
; CHECK: %[[#V2I4:]] = OpTypeVector %[[#I4]] 2
; CHECK: %[[#V3I2:]] = OpTypeVector %[[#I2]] 3
; CHECK: %[[#V3I4:]] = OpTypeVector %[[#I4]] 3
; CHECK: %[[#V4I2:]] = OpTypeVector %[[#I2]] 4
; CHECK: %[[#V4I4:]] = OpTypeVector %[[#I4]] 4
; CHECK: %[[#V8I2:]] = OpTypeVector %[[#I2]] 8
; CHECK: %[[#V8I4:]] = OpTypeVector %[[#I4]] 8
; CHECK: %[[#V16I2:]] = OpTypeVector %[[#I2]] 16
; CHECK: %[[#V16I4:]] = OpTypeVector %[[#I4]] 16


; CHECK: %[[#]] = OpBitReverse %[[#I2]] %[[#Z2]]
; CHECK: %[[#]] = OpBitReverse %[[#I4]] %[[#Z4]]
; CHECK: %[[#]] = OpBitReverse %[[#V2I2]] %[[#]]
; CHECK: %[[#]] = OpBitReverse %[[#V2I4]] %[[#]]
; CHECK: %[[#]] = OpBitReverse %[[#V3I2]] %[[#]]
; CHECK: %[[#]] = OpBitReverse %[[#V3I4]] %[[#]]
; CHECK: %[[#]] = OpBitReverse %[[#V4I2]] %[[#]]
; CHECK: %[[#]] = OpBitReverse %[[#V4I4]] %[[#]]
; CHECK: %[[#]] = OpBitReverse %[[#V8I2]] %[[#]]
; CHECK: %[[#]] = OpBitReverse %[[#V8I4]] %[[#]]
; CHECK: %[[#]] = OpBitReverse %[[#V16I2]] %[[#]]
; CHECK: %[[#]] = OpBitReverse %[[#V16I4]] %[[#]]

define spir_kernel void @testBitRev() {
entry:
%call2 = call i2 @llvm.bitreverse.i2(i2 0)
%call4 = call i4 @llvm.bitreverse.i4(i4 0)
ret void
}

define spir_kernel void @testBitRevV2(<2 x i2> %a, <2 x i4> %b) {
entry:
%call2 = call <2 x i2> @llvm.bitreverse.v2i2(<2 x i2> %a)
%call4 = call <2 x i4> @llvm.bitreverse.v2i4(<2 x i4> %b)
ret void
}

define spir_kernel void @testBitRevV3(<3 x i2> %a, <3 x i4> %b) {
entry:
%call2 = call <3 x i2> @llvm.bitreverse.v3i2(<3 x i2> %a)
%call4 = call <3 x i4> @llvm.bitreverse.v3i4(<3 x i4> %b)
ret void
}

define spir_kernel void @testBitRevV4(<4 x i2> %a, <4 x i4> %b) {
entry:
%call2 = call <4 x i2> @llvm.bitreverse.v4i2(<4 x i2> %a)
%call4 = call <4 x i4> @llvm.bitreverse.v4i4(<4 x i4> %b)
ret void
}

define spir_kernel void @testBitRevV8(<8 x i2> %a, <8 x i4> %b) {
entry:
%call2 = call <8 x i2> @llvm.bitreverse.v8i2(<8 x i2> %a)
%call4 = call <8 x i4> @llvm.bitreverse.v8i4(<8 x i4> %b)
ret void
}

define spir_kernel void @testBitRevV16(<16 x i2> %a, <16 x i4> %b) {
entry:
%call2 = call <16 x i2> @llvm.bitreverse.v16i2(<16 x i2> %a)
%call4 = call <16 x i4> @llvm.bitreverse.v16i4(<16 x i4> %b)
ret void
}

declare i2 @llvm.bitreverse.i2(i2)
declare i4 @llvm.bitreverse.i4(i4)
declare <2 x i2> @llvm.bitreverse.v2i2(<2 x i2>)
declare <2 x i4> @llvm.bitreverse.v2i4(<2 x i4>)
declare <3 x i2> @llvm.bitreverse.v3i2(<3 x i2>)
declare <3 x i4> @llvm.bitreverse.v3i4(<3 x i4>)
declare <4 x i2> @llvm.bitreverse.v4i2(<4 x i2>)
declare <4 x i4> @llvm.bitreverse.v4i4(<4 x i4>)
declare <8 x i2> @llvm.bitreverse.v8i2(<8 x i2>)
declare <8 x i4> @llvm.bitreverse.v8i4(<8 x i4>)
declare <16 x i2> @llvm.bitreverse.v16i2(<16 x i2>)
declare <16 x i4> @llvm.bitreverse.v16i4(<16 x i4>)