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[DAG] Fold trunc(avg(x,y)) for avgceil/floor u/s nodes if they have sufficient leading zero/sign bits #152273
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[DAG] Fold trunc(avg(x,y)) for avgceil/floor u/s nodes if they have s…
houngkoungting 24287f7
[DAG] Fold trunc(avg(x,y)) for avgceil/floor u/s nodes if they have s…
houngkoungting c8cc2a9
[DAG] Fold trunc(avg(x,y)) for avgceil/floor u/s nodes if they have s…
houngkoungting 1115256
[DAG] Fold trunc(avg(x,y)) for avgceil/floor u/s nodes if they have s…
houngkoungting 08138a2
[DAG] Fold trunc(avg(x,y)) for avgceil/floor u/s nodes if they have s…
houngkoungting 728b37d
[DAG] Fold trunc(avg(x,y)) for avgceil/floor u/s nodes if they have s…
houngkoungting 44609a3
[DAG] Fold trunc(avg(x,y)) for avgceil/floor u/s nodes if they have s…
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[DAG] Fold trunc(avg(x,y)) for avgceil/floor u/s nodes if they have s…
houngkoungting 32041fb
[DAG] Fold trunc(avg(x,y)) for avgceil/floor u/s nodes if they have s…
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Fold trunc(avg(x,y)) for avgceil/floor u/s nodes if they have suffici…
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[DAG] Fold trunc(avg(x,y)) for avgceil/floor u/s nodes if they have s…
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Merge branch 'main' into main
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| Original file line number | Diff line number | Diff line change |
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@@ -16294,6 +16294,51 @@ SDValue DAGCombiner::visitTRUNCATE(SDNode *N) { | |
| // because targets may prefer a wider type during later combines and invert | ||
| // this transform. | ||
| switch (N0.getOpcode()) { | ||
| case ISD::AVGCEILU: | ||
| case ISD::AVGFLOORU: | ||
| if (!LegalOperations && N0.hasOneUse() && | ||
| TLI.isOperationLegal(N0.getOpcode(), VT)) { | ||
| SDValue X = N0.getOperand(0); | ||
| SDValue Y = N0.getOperand(1); | ||
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| KnownBits KnownX = DAG.computeKnownBits(X); | ||
| KnownBits KnownY = DAG.computeKnownBits(Y); | ||
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| unsigned SrcBits = X.getScalarValueSizeInBits(); | ||
| unsigned DstBits = VT.getScalarSizeInBits(); | ||
| unsigned NeededLeadingZeros = SrcBits - DstBits + 1; | ||
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| if (KnownX.countMinLeadingZeros() >= NeededLeadingZeros && | ||
| KnownY.countMinLeadingZeros() >= NeededLeadingZeros) { | ||
| SDValue Tx = DAG.getNode(ISD::TRUNCATE, DL, VT, X); | ||
| SDValue Ty = DAG.getNode(ISD::TRUNCATE, DL, VT, Y); | ||
| return DAG.getNode(N0.getOpcode(), DL, VT, Tx, Ty); | ||
| } | ||
| } | ||
| break; | ||
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| case ISD::AVGCEILS: | ||
| case ISD::AVGFLOORS: | ||
| if (!LegalOperations && N0.hasOneUse() && | ||
| TLI.isOperationLegal(N0.getOpcode(), VT)) { | ||
| SDValue X = N0.getOperand(0); | ||
| SDValue Y = N0.getOperand(1); | ||
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| unsigned SignBitsX = DAG.ComputeNumSignBits(X); | ||
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| unsigned SignBitsY = DAG.ComputeNumSignBits(Y); | ||
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| unsigned SrcBits = X.getScalarValueSizeInBits(); | ||
| unsigned DstBits = VT.getScalarSizeInBits(); | ||
| unsigned NeededSignBits = SrcBits - DstBits + 1; | ||
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Collaborator
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. You should be able to reuse the ISD::ABD code later in the switch statement now - its has near-identical logic |
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| if (SignBitsX >= NeededSignBits && SignBitsY >= NeededSignBits) { | ||
| SDValue Tx = DAG.getNode(ISD::TRUNCATE, DL, VT, X); | ||
| SDValue Ty = DAG.getNode(ISD::TRUNCATE, DL, VT, Y); | ||
| return DAG.getNode(N0.getOpcode(), DL, VT, Tx, Ty); | ||
| } | ||
| } | ||
| break; | ||
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| case ISD::ADD: | ||
| case ISD::SUB: | ||
| case ISD::MUL: | ||
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,43 @@ | ||
| ; RUN: llc -mtriple=aarch64-- -O2 -mattr=+neon < %s | FileCheck %s | ||
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| ; CHECK-LABEL: test_avgceil_u | ||
| ; CHECK: uhadd v0.8b, v0.8b, v1.8b | ||
| define <8 x i8> @test_avgceil_u(<8 x i16> %a, <8 x i16> %b) { | ||
| %ta = trunc <8 x i16> %a to <8 x i8> | ||
| %tb = trunc <8 x i16> %b to <8 x i8> | ||
| %res = call <8 x i8> @llvm.aarch64.neon.uhadd.v8i8(<8 x i8> %ta, <8 x i8> %tb) | ||
| ret <8 x i8> %res | ||
| } | ||
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| ; CHECK-LABEL: test_avgceil_s | ||
| ; CHECK: shadd v0.8b, v0.8b, v1.8b | ||
| define <8 x i8> @test_avgceil_s(<8 x i16> %a, <8 x i16> %b) { | ||
| %ta = trunc <8 x i16> %a to <8 x i8> | ||
| %tb = trunc <8 x i16> %b to <8 x i8> | ||
| %res = call <8 x i8> @llvm.aarch64.neon.shadd.v8i8(<8 x i8> %ta, <8 x i8> %tb) | ||
| ret <8 x i8> %res | ||
| } | ||
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| ; CHECK-LABEL: test_avgfloor_u | ||
| ; CHECK: urhadd v0.8b, v0.8b, v1.8b | ||
| define <8 x i8> @test_avgfloor_u(<8 x i16> %a, <8 x i16> %b) { | ||
| %ta = trunc <8 x i16> %a to <8 x i8> | ||
| %tb = trunc <8 x i16> %b to <8 x i8> | ||
| %res = call <8 x i8> @llvm.aarch64.neon.urhadd.v8i8(<8 x i8> %ta, <8 x i8> %tb) | ||
| ret <8 x i8> %res | ||
| } | ||
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| ; CHECK-LABEL: test_avgfloor_s | ||
| ; CHECK: srhadd v0.8b, v0.8b, v1.8b | ||
| define <8 x i8> @test_avgfloor_s(<8 x i16> %a, <8 x i16> %b) { | ||
| %ta = trunc <8 x i16> %a to <8 x i8> | ||
| %tb = trunc <8 x i16> %b to <8 x i8> | ||
| %res = call <8 x i8> @llvm.aarch64.neon.srhadd.v8i8(<8 x i8> %ta, <8 x i8> %tb) | ||
| ret <8 x i8> %res | ||
| } | ||
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| declare <8 x i8> @llvm.aarch64.neon.uhadd.v8i8(<8 x i8>, <8 x i8>) | ||
| declare <8 x i8> @llvm.aarch64.neon.shadd.v8i8(<8 x i8>, <8 x i8>) | ||
| declare <8 x i8> @llvm.aarch64.neon.urhadd.v8i8(<8 x i8>, <8 x i8>) | ||
| declare <8 x i8> @llvm.aarch64.neon.srhadd.v8i8(<8 x i8>, <8 x i8>) | ||
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NeededLeadingZeros = SrcBits - DstBits;? (NeededSignBits is correct though you could use ComputeMaxSignificantBits instead if you wish)There was a problem hiding this comment.
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Sorry I think you misunderstood - you need to use
computeKnownBits.countMinLeadingZeros() >= (SrcBits - DstBits)