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[AMDGPU] Add XNACK_STATE_PRIV and _MASK gfx1250 registers #152374

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Merged
merged 2 commits into from
Aug 6, 2025
Merged

[AMDGPU] Add XNACK_STATE_PRIV and _MASK gfx1250 registers #152374

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611c67f
[AMDGPU] Add XNACK_STATE_PRIV and _MASK gfx1250 registers
rampitec Aug 6, 2025
178ca67
Merge branch 'main' into users/rampitec/08-06-_amdgpu_add_xnack_state…
rampitec Aug 6, 2025
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4 changes: 4 additions & 0 deletions llvm/lib/Target/AMDGPU/SIDefines.h
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Original file line number Diff line number Diff line change
Expand Up @@ -536,6 +536,10 @@ enum Id { // HwRegCode, (6) [5:0]
ID_SQ_PERF_SNAPSHOT_DATA1 = 22,
ID_SQ_PERF_SNAPSHOT_PC_LO = 23,
ID_SQ_PERF_SNAPSHOT_PC_HI = 24,

// GFX1250
ID_XNACK_STATE_PRIV = 33,
ID_XNACK_MASK_gfx1250 = 34,
};

enum Offset : unsigned { // Offset, (5) [10:6]
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4 changes: 4 additions & 0 deletions llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
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Expand Up @@ -223,6 +223,10 @@ static constexpr CustomOperand Operands[] = {
{{"HW_REG_SQ_PERF_SNAPSHOT_PC_LO"}, ID_SQ_PERF_SNAPSHOT_PC_LO, isGFX940},
{{"HW_REG_SQ_PERF_SNAPSHOT_PC_HI"}, ID_SQ_PERF_SNAPSHOT_PC_HI, isGFX940},

// GFX1250
{{"HW_REG_XNACK_STATE_PRIV"}, ID_XNACK_STATE_PRIV, isGFX1250},
{{"HW_REG_XNACK_MASK"}, ID_XNACK_MASK_gfx1250, isGFX1250},

// Aliases
{{"HW_REG_HW_ID"}, ID_HW_ID1, isGFX10},
};
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25 changes: 25 additions & 0 deletions llvm/test/MC/AMDGPU/gfx1250_asm_operands.s
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Expand Up @@ -27,3 +27,28 @@ s_mov_b64 s[0:1], src_shared_limit

s_getreg_b32 s1, hwreg(33)
// GFX1250: encoding: [0x21,0xf8,0x81,0xb8]

s_getreg_b32 s1, hwreg(HW_REG_XNACK_STATE_PRIV)
// GFX1200-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid hardware register: not supported on this GPU
// GFX1250: encoding: [0x21,0xf8,0x81,0xb8]

s_getreg_b32 s1, hwreg(34)
// GFX1250: encoding: [0x22,0xf8,0x81,0xb8]

s_getreg_b32 s1, hwreg(HW_REG_XNACK_MASK)
// GFX1200-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid hardware register: not supported on this GPU
// GFX1250: encoding: [0x22,0xf8,0x81,0xb8]

s_setreg_b32 hwreg(33), s1
// GFX1250: encoding: [0x21,0xf8,0x01,0xb9]

s_setreg_b32 hwreg(HW_REG_XNACK_STATE_PRIV), s1
// GFX1200-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid hardware register: not supported on this GPU
// GFX1250: encoding: [0x21,0xf8,0x01,0xb9]

s_setreg_b32 hwreg(34), s1
// GFX1250: encoding: [0x22,0xf8,0x01,0xb9]

s_setreg_b32 hwreg(HW_REG_XNACK_MASK), s1
// GFX1200-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid hardware register: not supported on this GPU
// GFX1250: encoding: [0x22,0xf8,0x01,0xb9]
12 changes: 12 additions & 0 deletions llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_operands.txt
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Expand Up @@ -20,3 +20,15 @@

# GFX1250: s_mov_b64 s[0:1], src_shared_limit ; encoding: [0xec,0x01,0x80,0xbe]
0xec,0x01,0x80,0xbe

# GFX1250: s_getreg_b32 s1, hwreg(HW_REG_XNACK_STATE_PRIV) ; encoding: [0x21,0xf8,0x81,0xb8]
0x21,0xf8,0x81,0xb8

# GFX1250: s_getreg_b32 s1, hwreg(HW_REG_XNACK_MASK) ; encoding: [0x22,0xf8,0x81,0xb8]
0x22,0xf8,0x81,0xb8

# GFX1250: s_setreg_b32 hwreg(HW_REG_XNACK_STATE_PRIV), s1 ; encoding: [0x21,0xf8,0x01,0xb9]
0x21,0xf8,0x01,0xb9

# GFX1250: s_setreg_b32 hwreg(HW_REG_XNACK_MASK), s1 ; encoding: [0x22,0xf8,0x01,0xb9]
0x22,0xf8,0x01,0xb9