diff --git a/llvm/lib/TargetParser/Host.cpp b/llvm/lib/TargetParser/Host.cpp index 79c40c34a9dae..22192e1facac7 100644 --- a/llvm/lib/TargetParser/Host.cpp +++ b/llvm/lib/TargetParser/Host.cpp @@ -11,6 +11,7 @@ //===----------------------------------------------------------------------===// #include "llvm/TargetParser/Host.h" +#include "llvm/ADT/Bitfields.h" #include "llvm/ADT/STLFunctionalExtras.h" #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/StringExtras.h" @@ -434,22 +435,14 @@ StringRef sys::detail::getHostCPUNameForARM(StringRef ProcCpuinfoContent) { StringRef sys::detail::getHostCPUNameForARM(uint64_t PrimaryCpuInfo, ArrayRef UniqueCpuInfos) { // On Windows, the registry provides cached copied of the MIDR_EL1 register. - union MIDR_EL1 { - uint64_t Raw; - struct _Components { - uint64_t Revision : 4; - uint64_t Partnum : 12; - uint64_t Architecture : 4; - uint64_t Variant : 4; - uint64_t Implementer : 8; - uint64_t Reserved : 32; - } Components; - }; + using PartNum = Bitfield::Element; + using Implementer = Bitfield::Element; + using Variant = Bitfield::Element; SmallVector PartsHolder; PartsHolder.reserve(UniqueCpuInfos.size()); for (auto Info : UniqueCpuInfos) - PartsHolder.push_back("0x" + utohexstr(MIDR_EL1{Info}.Components.Partnum, + PartsHolder.push_back("0x" + utohexstr(Bitfield::get(Info), /*LowerCase*/ true, /*Width*/ 3)); @@ -459,14 +452,14 @@ StringRef sys::detail::getHostCPUNameForARM(uint64_t PrimaryCpuInfo, Parts.push_back(Part); return getHostCPUNameForARMFromComponents( - "0x" + utohexstr(MIDR_EL1{PrimaryCpuInfo}.Components.Implementer, + "0x" + utohexstr(Bitfield::get(PrimaryCpuInfo), /*LowerCase*/ true, /*Width*/ 2), /*Hardware*/ "", - "0x" + utohexstr(MIDR_EL1{PrimaryCpuInfo}.Components.Partnum, + "0x" + utohexstr(Bitfield::get(PrimaryCpuInfo), /*LowerCase*/ true, /*Width*/ 3), - Parts, [=]() { return MIDR_EL1{PrimaryCpuInfo}.Components.Variant; }); + Parts, [=]() { return Bitfield::get(PrimaryCpuInfo); }); } namespace {