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@lukel97 lukel97 commented Aug 11, 2025

RISC-V is the only target that implements this, and the loop vectorizer is the only user of this. In any case, the loop vectorizer only checks it when the target requests EVL tail folding, and RISC-V is also the only target to do so. So it doesn't seem to affect anything.

This removes it to simplify the TTI interface.

As for the IsEVLLegal check, if a target doesn't support the EVL argument to VP intrinsics it should avoid selecting the DataWithEVL tail folding style anyway.

RISC-V is the only target that implements this, and the loop vectorizer is the only user of this. In any case, the loop vectorizer only checks it when the target requests EVL tail folding, and RISC-V is also the only target to do so. So it doesn't seem to affect anything.

This removes it to simplify the TTI interface.

As for the IsEVLLegal check, if a target doesn't support the EVL argument to VP intrinsics it should avoid selecting the DataWithEVL tail folding style anyway.
@llvmbot llvmbot added backend:RISC-V vectorizers llvm:ir llvm:analysis Includes value tracking, cost tables and constant folding llvm:transforms labels Aug 11, 2025
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llvmbot commented Aug 11, 2025

@llvm/pr-subscribers-vectorizers
@llvm/pr-subscribers-llvm-transforms

@llvm/pr-subscribers-llvm-analysis

Author: Luke Lau (lukel97)

Changes

RISC-V is the only target that implements this, and the loop vectorizer is the only user of this. In any case, the loop vectorizer only checks it when the target requests EVL tail folding, and RISC-V is also the only target to do so. So it doesn't seem to affect anything.

This removes it to simplify the TTI interface.

As for the IsEVLLegal check, if a target doesn't support the EVL argument to VP intrinsics it should avoid selecting the DataWithEVL tail folding style anyway.


Full diff: https://github.com/llvm/llvm-project/pull/152977.diff

7 Files Affected:

  • (modified) llvm/docs/LangRef.rst (-8)
  • (modified) llvm/include/llvm/Analysis/TargetTransformInfo.h (-8)
  • (modified) llvm/include/llvm/Analysis/TargetTransformInfoImpl.h (-2)
  • (modified) llvm/lib/Analysis/TargetTransformInfo.cpp (-4)
  • (modified) llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp (-4)
  • (modified) llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h (-9)
  • (modified) llvm/lib/Transforms/Vectorize/LoopVectorize.cpp (+1-2)
diff --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst
index 6ba3759080cc3..49e6ad77d6594 100644
--- a/llvm/docs/LangRef.rst
+++ b/llvm/docs/LangRef.rst
@@ -21387,14 +21387,6 @@ A vector operation ``<opcode>`` on vectors ``A`` and ``B`` calculates:
        A <opcode> B =  {  A[i] <opcode> B[i]   M[i] = True, and
                        {  undef otherwise
 
-Optimization Hint
-^^^^^^^^^^^^^^^^^
-
-Some targets, such as AVX512, do not support the %evl parameter in hardware.
-The use of an effective %evl is discouraged for those targets.  The function
-``TargetTransformInfo::hasActiveVectorLength()`` returns true when the target
-has native support for %evl.
-
 .. _int_vp_select:
 
 '``llvm.vp.select.*``' Intrinsics
diff --git a/llvm/include/llvm/Analysis/TargetTransformInfo.h b/llvm/include/llvm/Analysis/TargetTransformInfo.h
index aa4550de455e0..6d3818e84be91 100644
--- a/llvm/include/llvm/Analysis/TargetTransformInfo.h
+++ b/llvm/include/llvm/Analysis/TargetTransformInfo.h
@@ -1860,13 +1860,6 @@ class TargetTransformInfo {
   /// \return true when scalable vectorization is preferred.
   LLVM_ABI bool enableScalableVectorization() const;
 
-  /// \name Vector Predication Information
-  /// @{
-  /// Whether the target supports the %evl parameter of VP intrinsic efficiently
-  /// in hardware. (see LLVM Language Reference - "Vector Predication
-  /// Intrinsics"). Use of %evl is discouraged when that is not the case.
-  LLVM_ABI bool hasActiveVectorLength() const;
-
   /// Return true if sinking I's operands to the same basic block as I is
   /// profitable, e.g. because the operands can be folded into a target
   /// instruction during instruction selection. After calling the function
@@ -1915,7 +1908,6 @@ class TargetTransformInfo {
   /// transformed.
   LLVM_ABI VPLegalization
   getVPLegalizationStrategy(const VPIntrinsic &PI) const;
-  /// @}
 
   /// \returns Whether a 32-bit branch instruction is available in Arm or Thumb
   /// state.
diff --git a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
index 7683ec124ce71..db078e72b1cac 100644
--- a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
+++ b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
@@ -1112,8 +1112,6 @@ class TargetTransformInfoImplBase {
 
   virtual bool enableScalableVectorization() const { return false; }
 
-  virtual bool hasActiveVectorLength() const { return false; }
-
   virtual bool isProfitableToSinkOperands(Instruction *I,
                                           SmallVectorImpl<Use *> &Ops) const {
     return false;
diff --git a/llvm/lib/Analysis/TargetTransformInfo.cpp b/llvm/lib/Analysis/TargetTransformInfo.cpp
index c7eb2ec18c679..57083cfdc896d 100644
--- a/llvm/lib/Analysis/TargetTransformInfo.cpp
+++ b/llvm/lib/Analysis/TargetTransformInfo.cpp
@@ -1461,10 +1461,6 @@ bool TargetTransformInfo::enableScalableVectorization() const {
   return TTIImpl->enableScalableVectorization();
 }
 
-bool TargetTransformInfo::hasActiveVectorLength() const {
-  return TTIImpl->hasActiveVectorLength();
-}
-
 bool TargetTransformInfo::isProfitableToSinkOperands(
     Instruction *I, SmallVectorImpl<Use *> &OpsToSink) const {
   return TTIImpl->isProfitableToSinkOperands(I, OpsToSink);
diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index 67f924aadc8c0..f212f52bb0977 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -282,10 +282,6 @@ RISCVTTIImpl::getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
   return TTI::TCC_Free;
 }
 
-bool RISCVTTIImpl::hasActiveVectorLength() const {
-  return ST->hasVInstructions();
-}
-
 TargetTransformInfo::PopcntSupportKind
 RISCVTTIImpl::getPopcntSupport(unsigned TyWidth) const {
   assert(isPowerOf2_32(TyWidth) && "Ty width must be power of 2");
diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
index 6a1f4b3e3bedf..827d5a47dcf64 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
@@ -88,15 +88,6 @@ class RISCVTTIImpl final : public BasicTTIImplBase<RISCVTTIImpl> {
   getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
                       Type *Ty, TTI::TargetCostKind CostKind) const override;
 
-  /// \name EVL Support for predicated vectorization.
-  /// Whether the target supports the %evl parameter of VP intrinsic efficiently
-  /// in hardware. (see LLVM Language Reference - "Vector Predication
-  /// Intrinsics",
-  /// https://llvm.org/docs/LangRef.html#vector-predication-intrinsics and
-  /// "IR-level VP intrinsics",
-  /// https://llvm.org/docs/Proposals/VectorPredication.html#ir-level-vp-intrinsics).
-  bool hasActiveVectorLength() const override;
-
   TargetTransformInfo::PopcntSupportKind
   getPopcntSupport(unsigned TyWidth) const override;
 
diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
index d25add7c4be1f..f58a4de71d207 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -1368,8 +1368,7 @@ class LoopVectorizationCostModel {
       return;
     // Override EVL styles if needed.
     // FIXME: Investigate opportunity for fixed vector factor.
-    bool EVLIsLegal = UserIC <= 1 && IsScalableVF &&
-                      TTI.hasActiveVectorLength() && !EnableVPlanNativePath;
+    bool EVLIsLegal = UserIC <= 1 && IsScalableVF && !EnableVPlanNativePath;
     if (EVLIsLegal)
       return;
     // If for some reason EVL mode is unsupported, fallback to a scalar epilogue

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llvmbot commented Aug 11, 2025

@llvm/pr-subscribers-backend-risc-v

Author: Luke Lau (lukel97)

Changes

RISC-V is the only target that implements this, and the loop vectorizer is the only user of this. In any case, the loop vectorizer only checks it when the target requests EVL tail folding, and RISC-V is also the only target to do so. So it doesn't seem to affect anything.

This removes it to simplify the TTI interface.

As for the IsEVLLegal check, if a target doesn't support the EVL argument to VP intrinsics it should avoid selecting the DataWithEVL tail folding style anyway.


Full diff: https://github.com/llvm/llvm-project/pull/152977.diff

7 Files Affected:

  • (modified) llvm/docs/LangRef.rst (-8)
  • (modified) llvm/include/llvm/Analysis/TargetTransformInfo.h (-8)
  • (modified) llvm/include/llvm/Analysis/TargetTransformInfoImpl.h (-2)
  • (modified) llvm/lib/Analysis/TargetTransformInfo.cpp (-4)
  • (modified) llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp (-4)
  • (modified) llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h (-9)
  • (modified) llvm/lib/Transforms/Vectorize/LoopVectorize.cpp (+1-2)
diff --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst
index 6ba3759080cc3..49e6ad77d6594 100644
--- a/llvm/docs/LangRef.rst
+++ b/llvm/docs/LangRef.rst
@@ -21387,14 +21387,6 @@ A vector operation ``<opcode>`` on vectors ``A`` and ``B`` calculates:
        A <opcode> B =  {  A[i] <opcode> B[i]   M[i] = True, and
                        {  undef otherwise
 
-Optimization Hint
-^^^^^^^^^^^^^^^^^
-
-Some targets, such as AVX512, do not support the %evl parameter in hardware.
-The use of an effective %evl is discouraged for those targets.  The function
-``TargetTransformInfo::hasActiveVectorLength()`` returns true when the target
-has native support for %evl.
-
 .. _int_vp_select:
 
 '``llvm.vp.select.*``' Intrinsics
diff --git a/llvm/include/llvm/Analysis/TargetTransformInfo.h b/llvm/include/llvm/Analysis/TargetTransformInfo.h
index aa4550de455e0..6d3818e84be91 100644
--- a/llvm/include/llvm/Analysis/TargetTransformInfo.h
+++ b/llvm/include/llvm/Analysis/TargetTransformInfo.h
@@ -1860,13 +1860,6 @@ class TargetTransformInfo {
   /// \return true when scalable vectorization is preferred.
   LLVM_ABI bool enableScalableVectorization() const;
 
-  /// \name Vector Predication Information
-  /// @{
-  /// Whether the target supports the %evl parameter of VP intrinsic efficiently
-  /// in hardware. (see LLVM Language Reference - "Vector Predication
-  /// Intrinsics"). Use of %evl is discouraged when that is not the case.
-  LLVM_ABI bool hasActiveVectorLength() const;
-
   /// Return true if sinking I's operands to the same basic block as I is
   /// profitable, e.g. because the operands can be folded into a target
   /// instruction during instruction selection. After calling the function
@@ -1915,7 +1908,6 @@ class TargetTransformInfo {
   /// transformed.
   LLVM_ABI VPLegalization
   getVPLegalizationStrategy(const VPIntrinsic &PI) const;
-  /// @}
 
   /// \returns Whether a 32-bit branch instruction is available in Arm or Thumb
   /// state.
diff --git a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
index 7683ec124ce71..db078e72b1cac 100644
--- a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
+++ b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
@@ -1112,8 +1112,6 @@ class TargetTransformInfoImplBase {
 
   virtual bool enableScalableVectorization() const { return false; }
 
-  virtual bool hasActiveVectorLength() const { return false; }
-
   virtual bool isProfitableToSinkOperands(Instruction *I,
                                           SmallVectorImpl<Use *> &Ops) const {
     return false;
diff --git a/llvm/lib/Analysis/TargetTransformInfo.cpp b/llvm/lib/Analysis/TargetTransformInfo.cpp
index c7eb2ec18c679..57083cfdc896d 100644
--- a/llvm/lib/Analysis/TargetTransformInfo.cpp
+++ b/llvm/lib/Analysis/TargetTransformInfo.cpp
@@ -1461,10 +1461,6 @@ bool TargetTransformInfo::enableScalableVectorization() const {
   return TTIImpl->enableScalableVectorization();
 }
 
-bool TargetTransformInfo::hasActiveVectorLength() const {
-  return TTIImpl->hasActiveVectorLength();
-}
-
 bool TargetTransformInfo::isProfitableToSinkOperands(
     Instruction *I, SmallVectorImpl<Use *> &OpsToSink) const {
   return TTIImpl->isProfitableToSinkOperands(I, OpsToSink);
diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index 67f924aadc8c0..f212f52bb0977 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -282,10 +282,6 @@ RISCVTTIImpl::getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
   return TTI::TCC_Free;
 }
 
-bool RISCVTTIImpl::hasActiveVectorLength() const {
-  return ST->hasVInstructions();
-}
-
 TargetTransformInfo::PopcntSupportKind
 RISCVTTIImpl::getPopcntSupport(unsigned TyWidth) const {
   assert(isPowerOf2_32(TyWidth) && "Ty width must be power of 2");
diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
index 6a1f4b3e3bedf..827d5a47dcf64 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
@@ -88,15 +88,6 @@ class RISCVTTIImpl final : public BasicTTIImplBase<RISCVTTIImpl> {
   getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
                       Type *Ty, TTI::TargetCostKind CostKind) const override;
 
-  /// \name EVL Support for predicated vectorization.
-  /// Whether the target supports the %evl parameter of VP intrinsic efficiently
-  /// in hardware. (see LLVM Language Reference - "Vector Predication
-  /// Intrinsics",
-  /// https://llvm.org/docs/LangRef.html#vector-predication-intrinsics and
-  /// "IR-level VP intrinsics",
-  /// https://llvm.org/docs/Proposals/VectorPredication.html#ir-level-vp-intrinsics).
-  bool hasActiveVectorLength() const override;
-
   TargetTransformInfo::PopcntSupportKind
   getPopcntSupport(unsigned TyWidth) const override;
 
diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
index d25add7c4be1f..f58a4de71d207 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -1368,8 +1368,7 @@ class LoopVectorizationCostModel {
       return;
     // Override EVL styles if needed.
     // FIXME: Investigate opportunity for fixed vector factor.
-    bool EVLIsLegal = UserIC <= 1 && IsScalableVF &&
-                      TTI.hasActiveVectorLength() && !EnableVPlanNativePath;
+    bool EVLIsLegal = UserIC <= 1 && IsScalableVF && !EnableVPlanNativePath;
     if (EVLIsLegal)
       return;
     // If for some reason EVL mode is unsupported, fallback to a scalar epilogue

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llvmbot commented Aug 11, 2025

@llvm/pr-subscribers-llvm-ir

Author: Luke Lau (lukel97)

Changes

RISC-V is the only target that implements this, and the loop vectorizer is the only user of this. In any case, the loop vectorizer only checks it when the target requests EVL tail folding, and RISC-V is also the only target to do so. So it doesn't seem to affect anything.

This removes it to simplify the TTI interface.

As for the IsEVLLegal check, if a target doesn't support the EVL argument to VP intrinsics it should avoid selecting the DataWithEVL tail folding style anyway.


Full diff: https://github.com/llvm/llvm-project/pull/152977.diff

7 Files Affected:

  • (modified) llvm/docs/LangRef.rst (-8)
  • (modified) llvm/include/llvm/Analysis/TargetTransformInfo.h (-8)
  • (modified) llvm/include/llvm/Analysis/TargetTransformInfoImpl.h (-2)
  • (modified) llvm/lib/Analysis/TargetTransformInfo.cpp (-4)
  • (modified) llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp (-4)
  • (modified) llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h (-9)
  • (modified) llvm/lib/Transforms/Vectorize/LoopVectorize.cpp (+1-2)
diff --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst
index 6ba3759080cc3..49e6ad77d6594 100644
--- a/llvm/docs/LangRef.rst
+++ b/llvm/docs/LangRef.rst
@@ -21387,14 +21387,6 @@ A vector operation ``<opcode>`` on vectors ``A`` and ``B`` calculates:
        A <opcode> B =  {  A[i] <opcode> B[i]   M[i] = True, and
                        {  undef otherwise
 
-Optimization Hint
-^^^^^^^^^^^^^^^^^
-
-Some targets, such as AVX512, do not support the %evl parameter in hardware.
-The use of an effective %evl is discouraged for those targets.  The function
-``TargetTransformInfo::hasActiveVectorLength()`` returns true when the target
-has native support for %evl.
-
 .. _int_vp_select:
 
 '``llvm.vp.select.*``' Intrinsics
diff --git a/llvm/include/llvm/Analysis/TargetTransformInfo.h b/llvm/include/llvm/Analysis/TargetTransformInfo.h
index aa4550de455e0..6d3818e84be91 100644
--- a/llvm/include/llvm/Analysis/TargetTransformInfo.h
+++ b/llvm/include/llvm/Analysis/TargetTransformInfo.h
@@ -1860,13 +1860,6 @@ class TargetTransformInfo {
   /// \return true when scalable vectorization is preferred.
   LLVM_ABI bool enableScalableVectorization() const;
 
-  /// \name Vector Predication Information
-  /// @{
-  /// Whether the target supports the %evl parameter of VP intrinsic efficiently
-  /// in hardware. (see LLVM Language Reference - "Vector Predication
-  /// Intrinsics"). Use of %evl is discouraged when that is not the case.
-  LLVM_ABI bool hasActiveVectorLength() const;
-
   /// Return true if sinking I's operands to the same basic block as I is
   /// profitable, e.g. because the operands can be folded into a target
   /// instruction during instruction selection. After calling the function
@@ -1915,7 +1908,6 @@ class TargetTransformInfo {
   /// transformed.
   LLVM_ABI VPLegalization
   getVPLegalizationStrategy(const VPIntrinsic &PI) const;
-  /// @}
 
   /// \returns Whether a 32-bit branch instruction is available in Arm or Thumb
   /// state.
diff --git a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
index 7683ec124ce71..db078e72b1cac 100644
--- a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
+++ b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
@@ -1112,8 +1112,6 @@ class TargetTransformInfoImplBase {
 
   virtual bool enableScalableVectorization() const { return false; }
 
-  virtual bool hasActiveVectorLength() const { return false; }
-
   virtual bool isProfitableToSinkOperands(Instruction *I,
                                           SmallVectorImpl<Use *> &Ops) const {
     return false;
diff --git a/llvm/lib/Analysis/TargetTransformInfo.cpp b/llvm/lib/Analysis/TargetTransformInfo.cpp
index c7eb2ec18c679..57083cfdc896d 100644
--- a/llvm/lib/Analysis/TargetTransformInfo.cpp
+++ b/llvm/lib/Analysis/TargetTransformInfo.cpp
@@ -1461,10 +1461,6 @@ bool TargetTransformInfo::enableScalableVectorization() const {
   return TTIImpl->enableScalableVectorization();
 }
 
-bool TargetTransformInfo::hasActiveVectorLength() const {
-  return TTIImpl->hasActiveVectorLength();
-}
-
 bool TargetTransformInfo::isProfitableToSinkOperands(
     Instruction *I, SmallVectorImpl<Use *> &OpsToSink) const {
   return TTIImpl->isProfitableToSinkOperands(I, OpsToSink);
diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index 67f924aadc8c0..f212f52bb0977 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -282,10 +282,6 @@ RISCVTTIImpl::getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
   return TTI::TCC_Free;
 }
 
-bool RISCVTTIImpl::hasActiveVectorLength() const {
-  return ST->hasVInstructions();
-}
-
 TargetTransformInfo::PopcntSupportKind
 RISCVTTIImpl::getPopcntSupport(unsigned TyWidth) const {
   assert(isPowerOf2_32(TyWidth) && "Ty width must be power of 2");
diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
index 6a1f4b3e3bedf..827d5a47dcf64 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
@@ -88,15 +88,6 @@ class RISCVTTIImpl final : public BasicTTIImplBase<RISCVTTIImpl> {
   getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
                       Type *Ty, TTI::TargetCostKind CostKind) const override;
 
-  /// \name EVL Support for predicated vectorization.
-  /// Whether the target supports the %evl parameter of VP intrinsic efficiently
-  /// in hardware. (see LLVM Language Reference - "Vector Predication
-  /// Intrinsics",
-  /// https://llvm.org/docs/LangRef.html#vector-predication-intrinsics and
-  /// "IR-level VP intrinsics",
-  /// https://llvm.org/docs/Proposals/VectorPredication.html#ir-level-vp-intrinsics).
-  bool hasActiveVectorLength() const override;
-
   TargetTransformInfo::PopcntSupportKind
   getPopcntSupport(unsigned TyWidth) const override;
 
diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
index d25add7c4be1f..f58a4de71d207 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -1368,8 +1368,7 @@ class LoopVectorizationCostModel {
       return;
     // Override EVL styles if needed.
     // FIXME: Investigate opportunity for fixed vector factor.
-    bool EVLIsLegal = UserIC <= 1 && IsScalableVF &&
-                      TTI.hasActiveVectorLength() && !EnableVPlanNativePath;
+    bool EVLIsLegal = UserIC <= 1 && IsScalableVF && !EnableVPlanNativePath;
     if (EVLIsLegal)
       return;
     // If for some reason EVL mode is unsupported, fallback to a scalar epilogue

@lukel97 lukel97 requested review from Mel-Chen and arcbbb August 11, 2025 09:59
@alexey-bataev
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This is required for other analysis, like early loop access analysis to check for support of some non-power-of-2 properties, like store-load dep distance

@lukel97
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lukel97 commented Aug 11, 2025

This is required for other analysis, like early loop access analysis to check for support of some non-power-of-2 properties, like store-load dep distance

Oh for #137873? I see, maybe there's a better name for this hook though. I feel like it's not strictly related to VP intrinsics?

@RKSimon RKSimon removed their request for review October 22, 2025 11:35
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