diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h index ed7495694cc70..272d7dd5f45e8 100644 --- a/llvm/include/llvm/CodeGen/TargetLowering.h +++ b/llvm/include/llvm/CodeGen/TargetLowering.h @@ -299,9 +299,9 @@ class LLVM_ABI TargetLoweringBase { class ArgListEntry { public: - Value *Val = nullptr; - SDValue Node = SDValue(); - Type *Ty = nullptr; + Value *Val; + SDValue Node; + Type *Ty; bool IsSExt : 1; bool IsZExt : 1; bool IsNoExt : 1; @@ -320,12 +320,17 @@ class LLVM_ABI TargetLoweringBase { MaybeAlign Alignment = std::nullopt; Type *IndirectType = nullptr; - ArgListEntry() - : IsSExt(false), IsZExt(false), IsNoExt(false), IsInReg(false), - IsSRet(false), IsNest(false), IsByVal(false), IsByRef(false), - IsInAlloca(false), IsPreallocated(false), IsReturned(false), - IsSwiftSelf(false), IsSwiftAsync(false), IsSwiftError(false), - IsCFGuardTarget(false) {} + ArgListEntry(Value *Val, SDValue Node, Type *Ty) + : Val(Val), Node(Node), Ty(Ty), IsSExt(false), IsZExt(false), + IsNoExt(false), IsInReg(false), IsSRet(false), IsNest(false), + IsByVal(false), IsByRef(false), IsInAlloca(false), + IsPreallocated(false), IsReturned(false), IsSwiftSelf(false), + IsSwiftAsync(false), IsSwiftError(false), IsCFGuardTarget(false) {} + + explicit ArgListEntry(Value *Val, SDValue Node = SDValue()) + : ArgListEntry(Val, Node, Val->getType()) {} + + ArgListEntry(SDValue Node, Type *Ty) : ArgListEntry(nullptr, Node, Ty) {} LLVM_ABI void setAttributes(const CallBase *Call, unsigned ArgIdx); }; diff --git a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp index ac1913b4ba5b2..9467ba14cf895 100644 --- a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp @@ -729,9 +729,7 @@ bool FastISel::lowerCallOperands(const CallInst *CI, unsigned ArgIdx, assert(!V->getType()->isEmptyTy() && "Empty type passed to intrinsic."); - ArgListEntry Entry; - Entry.Val = V; - Entry.Ty = V->getType(); + ArgListEntry Entry(V); Entry.setAttributes(CI, ArgI); Args.push_back(Entry); } @@ -978,9 +976,7 @@ bool FastISel::lowerCallTo(const CallInst *CI, MCSymbol *Symbol, assert(!V->getType()->isEmptyTy() && "Empty type passed to intrinsic."); - ArgListEntry Entry; - Entry.Val = V; - Entry.Ty = V->getType(); + ArgListEntry Entry(V); Entry.setAttributes(CI, ArgI); Args.push_back(Entry); } @@ -1116,7 +1112,6 @@ bool FastISel::lowerCall(const CallInst *CI) { Type *RetTy = CI->getType(); ArgListTy Args; - ArgListEntry Entry; Args.reserve(CI->arg_size()); for (auto i = CI->arg_begin(), e = CI->arg_end(); i != e; ++i) { @@ -1126,9 +1121,7 @@ bool FastISel::lowerCall(const CallInst *CI) { if (V->getType()->isEmptyTy()) continue; - Entry.Val = V; - Entry.Ty = V->getType(); - + ArgListEntry Entry(V); // Skip the first return-type Attribute to get to params. Entry.setAttributes(CI, i - CI->arg_begin()); Args.push_back(Entry); diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index ba0ab2383d87a..bcfc2c5dc9f83 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -2181,12 +2181,10 @@ SelectionDAGLegalize::ExpandLibCall(RTLIB::Libcall LC, SDNode *Node, std::pair SelectionDAGLegalize::ExpandLibCall(RTLIB::Libcall LC, SDNode *Node, bool isSigned) { TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; for (const SDValue &Op : Node->op_values()) { EVT ArgVT = Op.getValueType(); Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext()); - Entry.Node = Op; - Entry.Ty = ArgTy; + TargetLowering::ArgListEntry Entry(Op, ArgTy); Entry.IsSExt = TLI.shouldSignExtendTypeInLibCall(ArgTy, isSigned); Entry.IsZExt = !Entry.IsSExt; Args.push_back(Entry); @@ -2325,11 +2323,9 @@ SDValue SelectionDAGLegalize::ExpandBitCountingLibCall( EVT IntVT = EVT::getIntegerVT(*DAG.getContext(), DAG.getLibInfo().getIntSize()); - TargetLowering::ArgListEntry Arg; EVT ArgVT = Op.getValueType(); Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext()); - Arg.Node = Op; - Arg.Ty = ArgTy; + TargetLowering::ArgListEntry Arg(Op, ArgTy); Arg.IsSExt = TLI.shouldSignExtendTypeInLibCall(ArgTy, /*IsSigned=*/false); Arg.IsZExt = !Arg.IsSExt; @@ -2370,12 +2366,10 @@ SelectionDAGLegalize::ExpandDivRemLibCall(SDNode *Node, Type *RetTy = RetVT.getTypeForEVT(*DAG.getContext()); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; for (const SDValue &Op : Node->op_values()) { EVT ArgVT = Op.getValueType(); Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext()); - Entry.Node = Op; - Entry.Ty = ArgTy; + TargetLowering::ArgListEntry Entry(Op, ArgTy); Entry.IsSExt = isSigned; Entry.IsZExt = !isSigned; Args.push_back(Entry); @@ -2383,8 +2377,8 @@ SelectionDAGLegalize::ExpandDivRemLibCall(SDNode *Node, // Also pass the return address of the remainder. SDValue FIPtr = DAG.CreateStackTemporary(RetVT); - Entry.Node = FIPtr; - Entry.Ty = PointerType::getUnqual(RetTy->getContext()); + TargetLowering::ArgListEntry Entry( + FIPtr, PointerType::getUnqual(RetTy->getContext())); Entry.IsSExt = isSigned; Entry.IsZExt = !isSigned; Args.push_back(Entry); diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp index a5bd97ace169e..90d62e6da8e94 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp @@ -5260,20 +5260,18 @@ void DAGTypeLegalizer::ExpandIntRes_XMULO(SDNode *N, MachinePointerInfo()); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; for (const SDValue &Op : N->op_values()) { EVT ArgVT = Op.getValueType(); Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext()); - Entry.Node = Op; - Entry.Ty = ArgTy; + TargetLowering::ArgListEntry Entry(Op, ArgTy); Entry.IsSExt = true; Entry.IsZExt = false; Args.push_back(Entry); } // Also pass the address of the overflow check. - Entry.Node = Temp; - Entry.Ty = PointerType::getUnqual(PtrTy->getContext()); + TargetLowering::ArgListEntry Entry( + Temp, PointerType::getUnqual(PtrTy->getContext())); Entry.IsSExt = true; Entry.IsZExt = false; Args.push_back(Entry); diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp index d2ecc13331e02..2ca98958fde0d 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp @@ -2223,17 +2223,13 @@ bool VectorLegalizer::tryExpandVecMathCall(SDNode *Node, RTLIB::Libcall LC, SDLoc DL(Node); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.IsSExt = false; - Entry.IsZExt = false; unsigned OpNum = 0; for (auto &VFParam : OptVFInfo->Shape.Parameters) { if (VFParam.ParamKind == VFParamKind::GlobalPredicate) { EVT MaskVT = TLI.getSetCCResultType(DAG.getDataLayout(), *Ctx, VT); - Entry.Node = DAG.getBoolConstant(true, DL, MaskVT, VT); - Entry.Ty = MaskVT.getTypeForEVT(*Ctx); - Args.push_back(Entry); + Args.emplace_back(DAG.getBoolConstant(true, DL, MaskVT, VT), + MaskVT.getTypeForEVT(*Ctx)); continue; } @@ -2241,9 +2237,7 @@ bool VectorLegalizer::tryExpandVecMathCall(SDNode *Node, RTLIB::Libcall LC, if (VFParam.ParamKind != VFParamKind::Vector) return false; - Entry.Node = Node->getOperand(OpNum++); - Entry.Ty = Ty; - Args.push_back(Entry); + Args.emplace_back(Node->getOperand(OpNum++), Ty); } // Emit a call to the vector function. diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 4b7fc45908119..84282d8a1c37b 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -2576,18 +2576,12 @@ bool SelectionDAG::expandMultipleResultFPLibCall( } TargetLowering::ArgListTy Args; - auto AddArgListEntry = [&](SDValue Node, Type *Ty) { - TargetLowering::ArgListEntry Entry{}; - Entry.Ty = Ty; - Entry.Node = Node; - Args.push_back(Entry); - }; // Pass the arguments. for (const SDValue &Op : Node->op_values()) { EVT ArgVT = Op.getValueType(); Type *ArgTy = ArgVT.getTypeForEVT(Ctx); - AddArgListEntry(Op, ArgTy); + Args.emplace_back(Op, ArgTy); } // Pass the output pointers. @@ -2599,7 +2593,7 @@ bool SelectionDAG::expandMultipleResultFPLibCall( EVT ResVT = Node->getValueType(ResNo); SDValue ResultPtr = ST ? ST->getBasePtr() : CreateStackTemporary(ResVT); ResultPtrs[ResNo] = ResultPtr; - AddArgListEntry(ResultPtr, PointerTy); + Args.emplace_back(ResultPtr, PointerTy); } SDLoc DL(Node); @@ -2608,7 +2602,7 @@ bool SelectionDAG::expandMultipleResultFPLibCall( if (VD && VD->isMasked()) { EVT MaskVT = TLI->getSetCCResultType(getDataLayout(), Ctx, VT); SDValue Mask = getBoolConstant(true, DL, MaskVT, VT); - AddArgListEntry(Mask, MaskVT.getTypeForEVT(Ctx)); + Args.emplace_back(Mask, MaskVT.getTypeForEVT(Ctx)); } Type *RetType = CallRetResNo.has_value() @@ -9019,18 +9013,11 @@ SelectionDAG::getMemcmp(SDValue Chain, const SDLoc &dl, SDValue Mem0, if (!LibCallName) return {}; - // Emit a library call. - auto GetEntry = [](Type *Ty, SDValue &SDV) { - TargetLowering::ArgListEntry E; - E.Ty = Ty; - E.Node = SDV; - return E; - }; - PointerType *PT = PointerType::getUnqual(*getContext()); TargetLowering::ArgListTy Args = { - GetEntry(PT, Mem0), GetEntry(PT, Mem1), - GetEntry(getDataLayout().getIntPtrType(*getContext()), Size)}; + {Mem0, PT}, + {Mem1, PT}, + {Size, getDataLayout().getIntPtrType(*getContext())}}; TargetLowering::CallLoweringInfo CLI(*this); bool IsTailCall = false; @@ -9101,13 +9088,10 @@ SDValue SelectionDAG::getMemcpy( // Emit a library call. TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Ty = PointerType::getUnqual(*getContext()); - Entry.Node = Dst; Args.push_back(Entry); - Entry.Node = Src; Args.push_back(Entry); - - Entry.Ty = getDataLayout().getIntPtrType(*getContext()); - Entry.Node = Size; Args.push_back(Entry); + Type *PtrTy = PointerType::getUnqual(*getContext()); + Args.emplace_back(Dst, PtrTy); + Args.emplace_back(Src, PtrTy); + Args.emplace_back(Size, getDataLayout().getIntPtrType(*getContext())); // FIXME: pass in SDLoc TargetLowering::CallLoweringInfo CLI(*this); bool IsTailCall = false; @@ -9145,17 +9129,10 @@ SDValue SelectionDAG::getAtomicMemcpy(SDValue Chain, const SDLoc &dl, MachinePointerInfo SrcPtrInfo) { // Emit a library call. TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Ty = getDataLayout().getIntPtrType(*getContext()); - Entry.Node = Dst; - Args.push_back(Entry); - - Entry.Node = Src; - Args.push_back(Entry); - - Entry.Ty = SizeTy; - Entry.Node = Size; - Args.push_back(Entry); + Type *ArgTy = getDataLayout().getIntPtrType(*getContext()); + Args.emplace_back(Dst, ArgTy); + Args.emplace_back(Src, ArgTy); + Args.emplace_back(Size, SizeTy); RTLIB::Libcall LibraryCall = RTLIB::getMEMCPY_ELEMENT_UNORDERED_ATOMIC(ElemSz); @@ -9218,13 +9195,10 @@ SDValue SelectionDAG::getMemmove(SDValue Chain, const SDLoc &dl, SDValue Dst, // Emit a library call. TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Ty = PointerType::getUnqual(*getContext()); - Entry.Node = Dst; Args.push_back(Entry); - Entry.Node = Src; Args.push_back(Entry); - - Entry.Ty = getDataLayout().getIntPtrType(*getContext()); - Entry.Node = Size; Args.push_back(Entry); + Type *PtrTy = PointerType::getUnqual(*getContext()); + Args.emplace_back(Dst, PtrTy); + Args.emplace_back(Src, PtrTy); + Args.emplace_back(Size, getDataLayout().getIntPtrType(*getContext())); // FIXME: pass in SDLoc TargetLowering::CallLoweringInfo CLI(*this); @@ -9262,17 +9236,10 @@ SDValue SelectionDAG::getAtomicMemmove(SDValue Chain, const SDLoc &dl, MachinePointerInfo SrcPtrInfo) { // Emit a library call. TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Ty = getDataLayout().getIntPtrType(*getContext()); - Entry.Node = Dst; - Args.push_back(Entry); - - Entry.Node = Src; - Args.push_back(Entry); - - Entry.Ty = SizeTy; - Entry.Node = Size; - Args.push_back(Entry); + Type *IntPtrTy = getDataLayout().getIntPtrType(*getContext()); + Args.emplace_back(Dst, IntPtrTy); + Args.emplace_back(Src, IntPtrTy); + Args.emplace_back(Size, SizeTy); RTLIB::Libcall LibraryCall = RTLIB::getMEMMOVE_ELEMENT_UNORDERED_ATOMIC(ElemSz); @@ -9349,28 +9316,20 @@ SDValue SelectionDAG::getMemset(SDValue Chain, const SDLoc &dl, SDValue Dst, const char *BzeroName = getTargetLoweringInfo().getLibcallName(RTLIB::BZERO); - // Helper function to create an Entry from Node and Type. - const auto CreateEntry = [](SDValue Node, Type *Ty) { - TargetLowering::ArgListEntry Entry; - Entry.Node = Node; - Entry.Ty = Ty; - return Entry; - }; - bool UseBZero = isNullConstant(Src) && BzeroName; // If zeroing out and bzero is present, use it. if (UseBZero) { TargetLowering::ArgListTy Args; - Args.push_back(CreateEntry(Dst, PointerType::getUnqual(Ctx))); - Args.push_back(CreateEntry(Size, DL.getIntPtrType(Ctx))); + Args.emplace_back(Dst, PointerType::getUnqual(Ctx)); + Args.emplace_back(Size, DL.getIntPtrType(Ctx)); CLI.setLibCallee( TLI->getLibcallCallingConv(RTLIB::BZERO), Type::getVoidTy(Ctx), getExternalSymbol(BzeroName, TLI->getPointerTy(DL)), std::move(Args)); } else { TargetLowering::ArgListTy Args; - Args.push_back(CreateEntry(Dst, PointerType::getUnqual(Ctx))); - Args.push_back(CreateEntry(Src, Src.getValueType().getTypeForEVT(Ctx))); - Args.push_back(CreateEntry(Size, DL.getIntPtrType(Ctx))); + Args.emplace_back(Dst, PointerType::getUnqual(Ctx)); + Args.emplace_back(Src, Src.getValueType().getTypeForEVT(Ctx)); + Args.emplace_back(Size, DL.getIntPtrType(Ctx)); CLI.setLibCallee(TLI->getLibcallCallingConv(RTLIB::MEMSET), Dst.getValueType().getTypeForEVT(Ctx), getExternalSymbol(TLI->getLibcallName(RTLIB::MEMSET), @@ -9399,18 +9358,9 @@ SDValue SelectionDAG::getAtomicMemset(SDValue Chain, const SDLoc &dl, MachinePointerInfo DstPtrInfo) { // Emit a library call. TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Ty = getDataLayout().getIntPtrType(*getContext()); - Entry.Node = Dst; - Args.push_back(Entry); - - Entry.Ty = Type::getInt8Ty(*getContext()); - Entry.Node = Value; - Args.push_back(Entry); - - Entry.Ty = SizeTy; - Entry.Node = Size; - Args.push_back(Entry); + Args.emplace_back(Dst, getDataLayout().getIntPtrType(*getContext())); + Args.emplace_back(Value, Type::getInt8Ty(*getContext())); + Args.emplace_back(Size, SizeTy); RTLIB::Libcall LibraryCall = RTLIB::getMEMSET_ELEMENT_UNORDERED_ATOMIC(ElemSz); @@ -14065,10 +14015,7 @@ SDValue SelectionDAG::makeStateFunctionCall(unsigned LibFunc, SDValue Ptr, const SDLoc &DLoc) { assert(InChain.getValueType() == MVT::Other && "Expected token chain"); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Node = Ptr; - Entry.Ty = Ptr.getValueType().getTypeForEVT(*getContext()); - Args.push_back(Entry); + Args.emplace_back(Ptr, Ptr.getValueType().getTypeForEVT(*getContext())); RTLIB::Libcall LC = static_cast(LibFunc); SDValue Callee = getExternalSymbol(TLI->getLibcallName(LC), TLI->getPointerTy(getDataLayout())); diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 2eaab02130699..15731b827ece3 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -3109,9 +3109,7 @@ void SelectionDAGBuilder::visitSPDescriptorParent(StackProtectorDescriptor &SPD, assert(FnTy->getNumParams() == 1 && "Invalid function signature"); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Node = GuardVal; - Entry.Ty = FnTy->getParamType(0); + TargetLowering::ArgListEntry Entry(GuardVal, FnTy->getParamType(0)); if (GuardCheckFn->hasParamAttribute(0, Attribute::AttrKind::InReg)) Entry.IsInReg = true; Args.push_back(Entry); @@ -3208,9 +3206,7 @@ void SelectionDAGBuilder::visitSPDescriptorFailure( assert(FnTy->getNumParams() == 1 && "Invalid function signature"); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Node = GuardVal; - Entry.Ty = FnTy->getParamType(0); + TargetLowering::ArgListEntry Entry(GuardVal, FnTy->getParamType(0)); if (GuardCheckFn->hasParamAttribute(0, Attribute::AttrKind::InReg)) Entry.IsInReg = true; Args.push_back(Entry); @@ -7521,10 +7517,8 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, } TargetLowering::ArgListTy Args; if (Intrinsic == Intrinsic::ubsantrap) { - Args.push_back(TargetLoweringBase::ArgListEntry()); - Args[0].Val = I.getArgOperand(0); - Args[0].Node = getValue(Args[0].Val); - Args[0].Ty = Args[0].Val->getType(); + Value *Arg = I.getArgOperand(0); + Args.emplace_back(Arg, getValue(Arg)); } TargetLowering::CallLoweringInfo CLI(DAG); @@ -7953,9 +7947,8 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, Args.reserve(3); for (unsigned Idx : {2, 3, 1}) { - TargetLowering::ArgListEntry Arg; - Arg.Node = getValue(I.getOperand(Idx)); - Arg.Ty = I.getOperand(Idx)->getType(); + TargetLowering::ArgListEntry Arg(getValue(I.getOperand(Idx)), + I.getOperand(Idx)->getType()); Arg.setAttributes(&I, Idx); Args.push_back(Arg); } @@ -7966,9 +7959,8 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, // Forward the flags and any additional arguments. for (unsigned Idx = 4; Idx < I.arg_size(); ++Idx) { - TargetLowering::ArgListEntry Arg; - Arg.Node = getValue(I.getOperand(Idx)); - Arg.Ty = I.getOperand(Idx)->getType(); + TargetLowering::ArgListEntry Arg(getValue(I.getOperand(Idx)), + I.getOperand(Idx)->getType()); Arg.setAttributes(&I, Idx); Args.push_back(Arg); } @@ -7994,10 +7986,9 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, TargetLowering::ArgListTy Args; // The first argument is the callee. Skip it when assembling the call args. - TargetLowering::ArgListEntry Arg; for (unsigned Idx = 1; Idx < I.arg_size(); ++Idx) { - Arg.Node = getValue(I.getArgOperand(Idx)); - Arg.Ty = I.getArgOperand(Idx)->getType(); + TargetLowering::ArgListEntry Arg(getValue(I.getArgOperand(Idx)), + I.getArgOperand(Idx)->getType()); Arg.setAttributes(&I, Idx); Args.push_back(Arg); } @@ -8956,7 +8947,6 @@ void SelectionDAGBuilder::LowerCallTo(const CallBase &CB, SDValue Callee, } for (auto I = CB.arg_begin(), E = CB.arg_end(); I != E; ++I) { - TargetLowering::ArgListEntry Entry; const Value *V = *I; // Skip empty types @@ -8964,8 +8954,7 @@ void SelectionDAGBuilder::LowerCallTo(const CallBase &CB, SDValue Callee, continue; SDValue ArgNode = getValue(V); - Entry.Node = ArgNode; Entry.Ty = V->getType(); - + TargetLowering::ArgListEntry Entry(ArgNode, V->getType()); Entry.setAttributes(&CB, I - CB.arg_begin()); // Use swifterror virtual register as input to the call. @@ -8989,11 +8978,8 @@ void SelectionDAGBuilder::LowerCallTo(const CallBase &CB, SDValue Callee, // If call site has a cfguardtarget operand bundle, create and add an // additional ArgListEntry. if (auto Bundle = CB.getOperandBundle(LLVMContext::OB_cfguardtarget)) { - TargetLowering::ArgListEntry Entry; Value *V = Bundle->Inputs[0]; - SDValue ArgNode = getValue(V); - Entry.Node = ArgNode; - Entry.Ty = V->getType(); + TargetLowering::ArgListEntry Entry(V, getValue(V)); Entry.IsCFGuardTarget = true; Args.push_back(Entry); } @@ -10656,9 +10642,7 @@ void SelectionDAGBuilder::populateCallLoweringInfo( assert(!V->getType()->isEmptyTy() && "Empty type passed to intrinsic."); - TargetLowering::ArgListEntry Entry; - Entry.Node = getValue(V); - Entry.Ty = V->getType(); + TargetLowering::ArgListEntry Entry(getValue(V), V->getType()); Entry.setAttributes(Call, ArgI); Args.push_back(Entry); } @@ -11074,21 +11058,8 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const { Type *StackSlotPtrType = PointerType::get(Context, DL.getAllocaAddrSpace()); DemoteStackSlot = CLI.DAG.getFrameIndex(DemoteStackIdx, getFrameIndexTy(DL)); - ArgListEntry Entry; - Entry.Node = DemoteStackSlot; - Entry.Ty = StackSlotPtrType; - Entry.IsSExt = false; - Entry.IsZExt = false; - Entry.IsInReg = false; + ArgListEntry Entry(DemoteStackSlot, StackSlotPtrType); Entry.IsSRet = true; - Entry.IsNest = false; - Entry.IsByVal = false; - Entry.IsByRef = false; - Entry.IsReturned = false; - Entry.IsSwiftSelf = false; - Entry.IsSwiftAsync = false; - Entry.IsSwiftError = false; - Entry.IsCFGuardTarget = false; Entry.Alignment = Alignment; CLI.getArgs().insert(CLI.getArgs().begin(), Entry); CLI.NumFixedArgs += 1; diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 911bbabc42aa3..ca10a6ecb456d 100644 --- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -162,14 +162,13 @@ TargetLowering::makeLibCall(SelectionDAG &DAG, RTLIB::Libcall LC, EVT RetVT, TargetLowering::ArgListTy Args; Args.reserve(Ops.size()); - TargetLowering::ArgListEntry Entry; ArrayRef OpsTypeOverrides = CallOptions.OpsTypeOverrides; for (unsigned i = 0; i < Ops.size(); ++i) { SDValue NewOp = Ops[i]; - Entry.Node = NewOp; - Entry.Ty = i < OpsTypeOverrides.size() && OpsTypeOverrides[i] + Type *Ty = i < OpsTypeOverrides.size() && OpsTypeOverrides[i] ? OpsTypeOverrides[i] - : Entry.Node.getValueType().getTypeForEVT(*DAG.getContext()); + : NewOp.getValueType().getTypeForEVT(*DAG.getContext()); + TargetLowering::ArgListEntry Entry(NewOp, Ty); Entry.IsSExt = shouldSignExtendTypeInLibCall(Entry.Ty, CallOptions.IsSigned); Entry.IsZExt = !Entry.IsSExt; @@ -10713,7 +10712,6 @@ SDValue TargetLowering::LowerToTLSEmulatedModel(const GlobalAddressSDNode *GA, SDLoc dl(GA); ArgListTy Args; - ArgListEntry Entry; const GlobalValue *GV = cast(GA->getGlobal()->stripPointerCastsAndAliases()); SmallString<32> NameString("__emutls_v."); @@ -10722,9 +10720,7 @@ SDValue TargetLowering::LowerToTLSEmulatedModel(const GlobalAddressSDNode *GA, const GlobalVariable *EmuTlsVar = GV->getParent()->getNamedGlobal(EmuTlsVarName); assert(EmuTlsVar && "Cannot find EmuTlsVar "); - Entry.Node = DAG.getGlobalAddress(EmuTlsVar, dl, PtrVT); - Entry.Ty = VoidPtrType; - Args.push_back(Entry); + Args.emplace_back(DAG.getGlobalAddress(EmuTlsVar, dl, PtrVT), VoidPtrType); SDValue EmuTlsGetAddr = DAG.getExternalSymbol("__emutls_get_address", PtrVT); diff --git a/llvm/lib/Target/AArch64/AArch64FastISel.cpp b/llvm/lib/Target/AArch64/AArch64FastISel.cpp index 41ff169891e87..cf344980cbaae 100644 --- a/llvm/lib/Target/AArch64/AArch64FastISel.cpp +++ b/llvm/lib/Target/AArch64/AArch64FastISel.cpp @@ -3578,12 +3578,8 @@ bool AArch64FastISel::fastLowerIntrinsicCall(const IntrinsicInst *II) { Args.reserve(II->arg_size()); // Populate the argument list. - for (auto &Arg : II->args()) { - ArgListEntry Entry; - Entry.Val = Arg; - Entry.Ty = Arg->getType(); - Args.push_back(Entry); - } + for (auto &Arg : II->args()) + Args.emplace_back(Arg); CallLoweringInfo CLI; MCContext &Ctx = MF->getContext(); @@ -4874,12 +4870,8 @@ bool AArch64FastISel::selectFRem(const Instruction *I) { Args.reserve(I->getNumOperands()); // Populate the argument list. - for (auto &Arg : I->operands()) { - ArgListEntry Entry; - Entry.Val = Arg; - Entry.Ty = Arg->getType(); - Args.push_back(Entry); - } + for (auto &Arg : I->operands()) + Args.emplace_back(Arg); CallLoweringInfo CLI; MCContext &Ctx = MF->getContext(); diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index 2072e48914ae6..aefbbe2534be2 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -5202,13 +5202,7 @@ SDValue AArch64TargetLowering::LowerFSINCOS(SDValue Op, Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext()); ArgListTy Args; - ArgListEntry Entry; - - Entry.Node = Arg; - Entry.Ty = ArgTy; - Entry.IsSExt = false; - Entry.IsZExt = false; - Args.push_back(Entry); + Args.emplace_back(Arg, ArgTy); RTLIB::Libcall LC = ArgVT == MVT::f64 ? RTLIB::SINCOS_STRET_F64 : RTLIB::SINCOS_STRET_F32; @@ -8915,11 +8909,9 @@ static SDValue emitSMEStateSaveRestore(const AArch64TargetLowering &TLI, FuncInfo->setSMESaveBufferUsed(); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Ty = PointerType::getUnqual(*DAG.getContext()); - Entry.Node = - DAG.getCopyFromReg(Chain, DL, Info->getSMESaveBufferAddr(), MVT::i64); - Args.push_back(Entry); + Args.emplace_back( + DAG.getCopyFromReg(Chain, DL, Info->getSMESaveBufferAddr(), MVT::i64), + PointerType::getUnqual(*DAG.getContext())); SDValue Callee = DAG.getExternalSymbol(IsSave ? "__arm_sme_save" : "__arm_sme_restore", diff --git a/llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp b/llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp index 8a5b5ba09f3aa..d3b1aa621b61a 100644 --- a/llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp +++ b/llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp @@ -182,37 +182,25 @@ SDValue AArch64SelectionDAGInfo::EmitStreamingCompatibleMemLibCall( const AArch64Subtarget &STI = DAG.getMachineFunction().getSubtarget(); const AArch64TargetLowering *TLI = STI.getTargetLowering(); - TargetLowering::ArgListEntry DstEntry; - DstEntry.Ty = PointerType::getUnqual(*DAG.getContext()); - DstEntry.Node = Dst; TargetLowering::ArgListTy Args; - Args.push_back(DstEntry); + Args.emplace_back(Dst, PointerType::getUnqual(*DAG.getContext())); RTLIB::Libcall NewLC; switch (LC) { case RTLIB::MEMCPY: { NewLC = RTLIB::SC_MEMCPY; - TargetLowering::ArgListEntry Entry; - Entry.Ty = PointerType::getUnqual(*DAG.getContext()); - Entry.Node = Src; - Args.push_back(Entry); + Args.emplace_back(Src, PointerType::getUnqual(*DAG.getContext())); break; } case RTLIB::MEMMOVE: { NewLC = RTLIB::SC_MEMMOVE; - TargetLowering::ArgListEntry Entry; - Entry.Ty = PointerType::getUnqual(*DAG.getContext()); - Entry.Node = Src; - Args.push_back(Entry); + Args.emplace_back(Src, PointerType::getUnqual(*DAG.getContext())); break; } case RTLIB::MEMSET: { NewLC = RTLIB::SC_MEMSET; - TargetLowering::ArgListEntry Entry; - Entry.Ty = Type::getInt32Ty(*DAG.getContext()); - Src = DAG.getZExtOrTrunc(Src, DL, MVT::i32); - Entry.Node = Src; - Args.push_back(Entry); + Args.emplace_back(DAG.getZExtOrTrunc(Src, DL, MVT::i32), + Type::getInt32Ty(*DAG.getContext())); break; } default: @@ -221,10 +209,7 @@ SDValue AArch64SelectionDAGInfo::EmitStreamingCompatibleMemLibCall( EVT PointerVT = TLI->getPointerTy(DAG.getDataLayout()); SDValue Symbol = DAG.getExternalSymbol(TLI->getLibcallName(NewLC), PointerVT); - TargetLowering::ArgListEntry SizeEntry; - SizeEntry.Node = Size; - SizeEntry.Ty = DAG.getDataLayout().getIntPtrType(*DAG.getContext()); - Args.push_back(SizeEntry); + Args.emplace_back(Size, DAG.getDataLayout().getIntPtrType(*DAG.getContext())); TargetLowering::CallLoweringInfo CLI(DAG); PointerType *RetTy = PointerType::getUnqual(*DAG.getContext()); diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index 8ea567cfb9d31..830156359e9e8 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -3618,10 +3618,7 @@ ARMTargetLowering::LowerToTLSGeneralDynamicModel(GlobalAddressSDNode *GA, // call __tls_get_addr. ArgListTy Args; - ArgListEntry Entry; - Entry.Node = Argument; - Entry.Ty = (Type *) Type::getInt32Ty(*DAG.getContext()); - Args.push_back(Entry); + Args.emplace_back(Argument, Type::getInt32Ty(*DAG.getContext())); // FIXME: is there useful debug info available here? TargetLowering::CallLoweringInfo CLI(DAG); @@ -9840,9 +9837,7 @@ SDValue ARMTargetLowering::LowerFSINCOS(SDValue Op, SelectionDAG &DAG) const { int FrameIdx = MFI.CreateStackObject(ByteSize, StackAlign, false); SRet = DAG.getFrameIndex(FrameIdx, getPointerTy(DL)); - ArgListEntry Entry; - Entry.Node = SRet; - Entry.Ty = PointerType::getUnqual(RetTy->getContext()); + ArgListEntry Entry(SRet, PointerType::getUnqual(RetTy->getContext())); Entry.IsSExt = false; Entry.IsZExt = false; Entry.IsSRet = true; @@ -9850,12 +9845,7 @@ SDValue ARMTargetLowering::LowerFSINCOS(SDValue Op, SelectionDAG &DAG) const { RetTy = Type::getVoidTy(*DAG.getContext()); } - ArgListEntry Entry; - Entry.Node = Arg; - Entry.Ty = ArgTy; - Entry.IsSExt = false; - Entry.IsZExt = false; - Args.push_back(Entry); + Args.emplace_back(Arg, ArgTy); RTLIB::Libcall LC = (ArgVT == MVT::f64) ? RTLIB::SINCOS_STRET_F64 : RTLIB::SINCOS_STRET_F32; @@ -9908,10 +9898,9 @@ SDValue ARMTargetLowering::LowerWindowsDIVLibCall(SDValue Op, SelectionDAG &DAG, ARMTargetLowering::ArgListTy Args; for (auto AI : {1, 0}) { - ArgListEntry Arg; - Arg.Node = Op.getOperand(AI); - Arg.Ty = Arg.Node.getValueType().getTypeForEVT(*DAG.getContext()); - Args.push_back(Arg); + SDValue Operand = Op.getOperand(AI); + Args.emplace_back(Operand, + Operand.getValueType().getTypeForEVT(*DAG.getContext())); } CallLoweringInfo CLI(DAG); @@ -20606,12 +20595,10 @@ static TargetLowering::ArgListTy getDivRemArgList( bool isSigned = N->getOpcode() == ISD::SDIVREM || N->getOpcode() == ISD::SREM; TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { EVT ArgVT = N->getOperand(i).getValueType(); Type *ArgTy = ArgVT.getTypeForEVT(*Context); - Entry.Node = N->getOperand(i); - Entry.Ty = ArgTy; + TargetLowering::ArgListEntry Entry(N->getOperand(i), ArgTy); Entry.IsSExt = isSigned; Entry.IsZExt = !isSigned; Args.push_back(Entry); diff --git a/llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp b/llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp index b4677a8bfb035..ebfa593fbe9e6 100644 --- a/llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp +++ b/llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp @@ -89,19 +89,15 @@ SDValue ARMSelectionDAGInfo::EmitSpecializedLibcall( AlignVariant = ALIGN1; TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Ty = DAG.getDataLayout().getIntPtrType(*DAG.getContext()); - Entry.Node = Dst; - Args.push_back(Entry); + Type *IntPtrTy = DAG.getDataLayout().getIntPtrType(*DAG.getContext()); + Args.emplace_back(Dst, IntPtrTy); if (AEABILibcall == AEABI_MEMCLR) { - Entry.Node = Size; - Args.push_back(Entry); + Args.emplace_back(Size, IntPtrTy); } else if (AEABILibcall == AEABI_MEMSET) { // Adjust parameters for memset, EABI uses format (ptr, size, value), // GNU library uses (ptr, value, size) // See RTABI section 4.3.4 - Entry.Node = Size; - Args.push_back(Entry); + Args.emplace_back(Size, IntPtrTy); // Extend or truncate the argument to be an i32 value for the call. if (Src.getValueType().bitsGT(MVT::i32)) @@ -109,16 +105,13 @@ SDValue ARMSelectionDAGInfo::EmitSpecializedLibcall( else if (Src.getValueType().bitsLT(MVT::i32)) Src = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); - Entry.Node = Src; - Entry.Ty = Type::getInt32Ty(*DAG.getContext()); + TargetLowering::ArgListEntry Entry(Src, + Type::getInt32Ty(*DAG.getContext())); Entry.IsSExt = false; Args.push_back(Entry); } else { - Entry.Node = Src; - Args.push_back(Entry); - - Entry.Node = Size; - Args.push_back(Entry); + Args.emplace_back(Src, IntPtrTy); + Args.emplace_back(Size, IntPtrTy); } static const RTLIB::Libcall FunctionImpls[4][3] = { diff --git a/llvm/lib/Target/AVR/AVRISelLowering.cpp b/llvm/lib/Target/AVR/AVRISelLowering.cpp index 25ad9eccbce5d..545bc3af05383 100644 --- a/llvm/lib/Target/AVR/AVRISelLowering.cpp +++ b/llvm/lib/Target/AVR/AVRISelLowering.cpp @@ -505,10 +505,9 @@ SDValue AVRTargetLowering::LowerDivRem(SDValue Op, SelectionDAG &DAG) const { SDValue InChain = DAG.getEntryNode(); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; for (SDValue const &Value : Op->op_values()) { - Entry.Node = Value; - Entry.Ty = Value.getValueType().getTypeForEVT(*DAG.getContext()); + TargetLowering::ArgListEntry Entry( + Value, Value.getValueType().getTypeForEVT(*DAG.getContext())); Entry.IsSExt = IsSigned; Entry.IsZExt = !IsSigned; Args.push_back(Entry); diff --git a/llvm/lib/Target/CSKY/CSKYISelLowering.cpp b/llvm/lib/Target/CSKY/CSKYISelLowering.cpp index 707017106e61d..e5b4f6eeb7b73 100644 --- a/llvm/lib/Target/CSKY/CSKYISelLowering.cpp +++ b/llvm/lib/Target/CSKY/CSKYISelLowering.cpp @@ -1329,10 +1329,7 @@ SDValue CSKYTargetLowering::getDynamicTLSAddr(GlobalAddressSDNode *N, // Prepare argument list to generate call. ArgListTy Args; - ArgListEntry Entry; - Entry.Node = Load; - Entry.Ty = CallTy; - Args.push_back(Entry); + Args.emplace_back(Load, CallTy); // Setup call to __tls_get_addr. TargetLowering::CallLoweringInfo CLI(DAG); diff --git a/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.cpp b/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.cpp index 610a81fe45c2f..33aa6e4a26145 100644 --- a/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.cpp +++ b/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.cpp @@ -32,14 +32,10 @@ SDValue HexagonSelectionDAGInfo::EmitTargetCodeForMemcpy( // const TargetLowering &TLI = *DAG.getSubtarget().getTargetLowering(); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Ty = DAG.getDataLayout().getIntPtrType(*DAG.getContext()); - Entry.Node = Dst; - Args.push_back(Entry); - Entry.Node = Src; - Args.push_back(Entry); - Entry.Node = Size; - Args.push_back(Entry); + Type *ArgTy = DAG.getDataLayout().getIntPtrType(*DAG.getContext()); + Args.emplace_back(Dst, ArgTy); + Args.emplace_back(Src, ArgTy); + Args.emplace_back(Size, ArgTy); const char *SpecialMemcpyName = TLI.getLibcallName( RTLIB::HEXAGON_MEMCPY_LIKELY_ALIGNED_MIN32BYTES_MULT8BYTES); diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp index a2a41d0062ff8..39315f05b8388 100644 --- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp +++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp @@ -3037,10 +3037,7 @@ SDValue LoongArchTargetLowering::getDynamicTLSAddr(GlobalAddressSDNode *N, // Prepare argument list to generate call. ArgListTy Args; - ArgListEntry Entry; - Entry.Node = Load; - Entry.Ty = CallTy; - Args.push_back(Entry); + Args.emplace_back(Load, CallTy); // Setup call to __tls_get_addr. TargetLowering::CallLoweringInfo CLI(DAG); diff --git a/llvm/lib/Target/M68k/M68kISelLowering.cpp b/llvm/lib/Target/M68k/M68kISelLowering.cpp index c1a88bd796bee..12c6e1e826ae4 100644 --- a/llvm/lib/Target/M68k/M68kISelLowering.cpp +++ b/llvm/lib/Target/M68k/M68kISelLowering.cpp @@ -1456,10 +1456,7 @@ SDValue M68kTargetLowering::getTLSGetAddr(GlobalAddressSDNode *GA, PointerType *PtrTy = PointerType::get(*DAG.getContext(), 0); ArgListTy Args; - ArgListEntry Entry; - Entry.Node = Arg; - Entry.Ty = PtrTy; - Args.push_back(Entry); + Args.emplace_back(Arg, PtrTy); return LowerExternalSymbolCall(DAG, SDLoc(GA), "__tls_get_addr", std::move(Args)); } diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp index 9fbbdb2ecb264..ed626f2d74788 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -2325,10 +2325,7 @@ lowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const SDValue TlsGetAddr = DAG.getExternalSymbol("__tls_get_addr", PtrVT); ArgListTy Args; - ArgListEntry Entry; - Entry.Node = Argument; - Entry.Ty = PtrTy; - Args.push_back(Entry); + Args.emplace_back(Argument, PtrTy); TargetLowering::CallLoweringInfo CLI(DAG); CLI.setDebugLoc(DL) diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index 74ae8502dccea..4ab9461fc0afc 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -4051,18 +4051,13 @@ SDValue PPCTargetLowering::LowerINIT_TRAMPOLINE(SDValue Op, Type *IntPtrTy = DAG.getDataLayout().getIntPtrType(*DAG.getContext()); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - - Entry.Ty = IntPtrTy; - Entry.Node = Trmp; Args.push_back(Entry); - + Args.emplace_back(Trmp, IntPtrTy); // TrampSize == (isPPC64 ? 48 : 40); - Entry.Node = - DAG.getConstant(isPPC64 ? 48 : 40, dl, Subtarget.getScalarIntVT()); - Args.push_back(Entry); - - Entry.Node = FPtr; Args.push_back(Entry); - Entry.Node = Nest; Args.push_back(Entry); + Args.emplace_back( + DAG.getConstant(isPPC64 ? 48 : 40, dl, Subtarget.getScalarIntVT()), + IntPtrTy); + Args.emplace_back(FPtr, IntPtrTy); + Args.emplace_back(Nest, IntPtrTy); // Lower to a call to __trampoline_setup(Trmp, TrampSize, FPtr, ctx_reg) TargetLowering::CallLoweringInfo CLI(DAG); @@ -19553,12 +19548,10 @@ SDValue PPCTargetLowering::lowerToLibCall(const char *LibCallName, SDValue Op, DAG.getExternalSymbol(LibCallName, TLI.getPointerTy(DAG.getDataLayout())); bool SignExtend = TLI.shouldSignExtendTypeInLibCall(RetTy, false); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; for (const SDValue &N : Op->op_values()) { EVT ArgVT = N.getValueType(); Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext()); - Entry.Node = N; - Entry.Ty = ArgTy; + TargetLowering::ArgListEntry Entry(N, ArgTy); Entry.IsSExt = TLI.shouldSignExtendTypeInLibCall(ArgTy, SignExtend); Entry.IsZExt = !Entry.IsSExt; Args.push_back(Entry); diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp index 4f52f68d35aa2..c5a706ae2b765 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -8942,10 +8942,7 @@ SDValue RISCVTargetLowering::getDynamicTLSAddr(GlobalAddressSDNode *N, // Prepare argument list to generate call. ArgListTy Args; - ArgListEntry Entry; - Entry.Node = Load; - Entry.Ty = CallTy; - Args.push_back(Entry); + Args.emplace_back(Load, CallTy); // Setup call to __tls_get_addr. TargetLowering::CallLoweringInfo CLI(DAG); diff --git a/llvm/lib/Target/Sparc/SparcISelLowering.cpp b/llvm/lib/Target/Sparc/SparcISelLowering.cpp index 226aa89d2834b..dd221327dbdc6 100644 --- a/llvm/lib/Target/Sparc/SparcISelLowering.cpp +++ b/llvm/lib/Target/Sparc/SparcISelLowering.cpp @@ -2280,21 +2280,15 @@ SDValue SparcTargetLowering::LowerF128_LibCallArg(SDValue Chain, EVT ArgVT = Arg.getValueType(); Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext()); - ArgListEntry Entry; - Entry.Node = Arg; - Entry.Ty = ArgTy; - if (ArgTy->isFP128Ty()) { // Create a stack object and pass the pointer to the library function. int FI = MFI.CreateStackObject(16, Align(8), false); SDValue FIPtr = DAG.getFrameIndex(FI, getPointerTy(DAG.getDataLayout())); - Chain = DAG.getStore(Chain, DL, Entry.Node, FIPtr, MachinePointerInfo(), - Align(8)); - - Entry.Node = FIPtr; - Entry.Ty = PointerType::getUnqual(ArgTy->getContext()); + Chain = DAG.getStore(Chain, DL, Arg, FIPtr, MachinePointerInfo(), Align(8)); + Args.emplace_back(FIPtr, PointerType::getUnqual(ArgTy->getContext())); + } else { + Args.emplace_back(Arg, ArgTy); } - Args.push_back(Entry); return Chain; } @@ -2316,11 +2310,9 @@ SparcTargetLowering::LowerF128Op(SDValue Op, SelectionDAG &DAG, if (RetTy->isFP128Ty()) { // Create a Stack Object to receive the return value of type f128. - ArgListEntry Entry; int RetFI = MFI.CreateStackObject(16, Align(8), false); RetPtr = DAG.getFrameIndex(RetFI, PtrVT); - Entry.Node = RetPtr; - Entry.Ty = PointerType::getUnqual(RetTy->getContext()); + ArgListEntry Entry(RetPtr, PointerType::getUnqual(RetTy->getContext())); if (!Subtarget->is64Bit()) { Entry.IsSRet = true; Entry.IndirectType = RetTy; diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp index fb0a47dc9dc47..2f8637642d5c6 100644 --- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp +++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp @@ -2460,10 +2460,9 @@ std::pair SystemZTargetLowering::makeExternalCall( TargetLowering::ArgListTy Args; Args.reserve(Ops.size()); - TargetLowering::ArgListEntry Entry; for (SDValue Op : Ops) { - Entry.Node = Op; - Entry.Ty = Entry.Node.getValueType().getTypeForEVT(*DAG.getContext()); + TargetLowering::ArgListEntry Entry( + Op, Op.getValueType().getTypeForEVT(*DAG.getContext())); Entry.IsSExt = shouldSignExtendTypeInLibCall(Entry.Ty, IsSigned); Entry.IsZExt = !Entry.IsSExt; Args.push_back(Entry); diff --git a/llvm/lib/Target/VE/VEISelLowering.cpp b/llvm/lib/Target/VE/VEISelLowering.cpp index 9e8f400256198..2cfdc751a55e0 100644 --- a/llvm/lib/Target/VE/VEISelLowering.cpp +++ b/llvm/lib/Target/VE/VEISelLowering.cpp @@ -1649,14 +1649,11 @@ SDValue VETargetLowering::lowerDYNAMIC_STACKALLOC(SDValue Op, // Prepare arguments TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Node = Size; - Entry.Ty = Entry.Node.getValueType().getTypeForEVT(*DAG.getContext()); - Args.push_back(Entry); + Args.emplace_back(Size, Size.getValueType().getTypeForEVT(*DAG.getContext())); if (NeedsAlign) { - Entry.Node = DAG.getConstant(~(Alignment->value() - 1ULL), DL, VT); - Entry.Ty = Entry.Node.getValueType().getTypeForEVT(*DAG.getContext()); - Args.push_back(Entry); + SDValue Align = DAG.getConstant(~(Alignment->value() - 1ULL), DL, VT); + Args.emplace_back(Align, + Align.getValueType().getTypeForEVT(*DAG.getContext())); } Type *RetTy = Type::getVoidTy(*DAG.getContext()); diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 97cdf5b784bc0..7a816de53dbd3 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -22219,9 +22219,8 @@ SDValue X86TargetLowering::LowerFP_EXTEND(SDValue Op, SelectionDAG &DAG) const { In = DAG.getBitcast(MVT::i16, In); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Node = In; - Entry.Ty = EVT(MVT::i16).getTypeForEVT(*DAG.getContext()); + TargetLowering::ArgListEntry Entry( + In, EVT(MVT::i16).getTypeForEVT(*DAG.getContext())); Entry.IsSExt = false; Entry.IsZExt = true; Args.push_back(Entry); @@ -22318,9 +22317,8 @@ SDValue X86TargetLowering::LowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const { Chain = IsStrict ? Op.getOperand(0) : DAG.getEntryNode(); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Node = In; - Entry.Ty = EVT(SVT).getTypeForEVT(*DAG.getContext()); + TargetLowering::ArgListEntry Entry( + In, EVT(SVT).getTypeForEVT(*DAG.getContext())); Entry.IsSExt = false; Entry.IsZExt = true; Args.push_back(Entry); @@ -30049,7 +30047,6 @@ SDValue X86TargetLowering::LowerWin64_i128OP(SDValue Op, SelectionDAG &DAG) cons SDValue InChain = DAG.getEntryNode(); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; for (unsigned i = 0, e = Op->getNumOperands(); i != e; ++i) { EVT ArgVT = Op->getOperand(i).getValueType(); assert(ArgVT.isInteger() && ArgVT.getSizeInBits() == 128 && @@ -30058,13 +30055,9 @@ SDValue X86TargetLowering::LowerWin64_i128OP(SDValue Op, SelectionDAG &DAG) cons int SPFI = cast(StackPtr.getNode())->getIndex(); MachinePointerInfo MPI = MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), SPFI); - Entry.Node = StackPtr; InChain = DAG.getStore(InChain, dl, Op->getOperand(i), StackPtr, MPI, Align(16)); - Entry.Ty = PointerType::get(*DAG.getContext(), 0); - Entry.IsSExt = false; - Entry.IsZExt = false; - Args.push_back(Entry); + Args.emplace_back(StackPtr, PointerType::get(*DAG.getContext(), 0)); } SDValue Callee = DAG.getExternalSymbol(getLibcallName(LC), @@ -33087,13 +33080,7 @@ static SDValue LowerFSINCOS(SDValue Op, const X86Subtarget &Subtarget, Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext()); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - - Entry.Node = Arg; - Entry.Ty = ArgTy; - Entry.IsSExt = false; - Entry.IsZExt = false; - Args.push_back(Entry); + Args.emplace_back(Arg, ArgTy); bool isF64 = ArgVT == MVT::f64; // Only optimize x86_64 for now. i386 is a bit messy. For f32, diff --git a/llvm/lib/Target/XCore/XCoreISelLowering.cpp b/llvm/lib/Target/XCore/XCoreISelLowering.cpp index ef4cfcd69415d..0a96ab236c6ad 100644 --- a/llvm/lib/Target/XCore/XCoreISelLowering.cpp +++ b/llvm/lib/Target/XCore/XCoreISelLowering.cpp @@ -429,11 +429,7 @@ SDValue XCoreTargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const { // Lower to a call to __misaligned_load(BasePtr). Type *IntPtrTy = DAG.getDataLayout().getIntPtrType(Context); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - - Entry.Ty = IntPtrTy; - Entry.Node = BasePtr; - Args.push_back(Entry); + Args.emplace_back(BasePtr, IntPtrTy); TargetLowering::CallLoweringInfo CLI(DAG); CLI.setDebugLoc(DL).setChain(Chain).setLibCallee( @@ -480,14 +476,8 @@ SDValue XCoreTargetLowering::LowerSTORE(SDValue Op, SelectionDAG &DAG) const { // Lower to a call to __misaligned_store(BasePtr, Value). Type *IntPtrTy = DAG.getDataLayout().getIntPtrType(Context); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - - Entry.Ty = IntPtrTy; - Entry.Node = BasePtr; - Args.push_back(Entry); - - Entry.Node = Value; - Args.push_back(Entry); + Args.emplace_back(BasePtr, IntPtrTy); + Args.emplace_back(Value, IntPtrTy); TargetLowering::CallLoweringInfo CLI(DAG); CLI.setDebugLoc(dl).setChain(Chain).setCallee( diff --git a/llvm/lib/Target/XCore/XCoreSelectionDAGInfo.cpp b/llvm/lib/Target/XCore/XCoreSelectionDAGInfo.cpp index 1bd92a2b49475..f61115e0139e6 100644 --- a/llvm/lib/Target/XCore/XCoreSelectionDAGInfo.cpp +++ b/llvm/lib/Target/XCore/XCoreSelectionDAGInfo.cpp @@ -33,11 +33,10 @@ SDValue XCoreSelectionDAGInfo::EmitTargetCodeForMemcpy( DAG.MaskedValueIsZero(Size, APInt(SizeBitWidth, 3))) { const TargetLowering &TLI = *DAG.getSubtarget().getTargetLowering(); TargetLowering::ArgListTy Args; - TargetLowering::ArgListEntry Entry; - Entry.Ty = DAG.getDataLayout().getIntPtrType(*DAG.getContext()); - Entry.Node = Dst; Args.push_back(Entry); - Entry.Node = Src; Args.push_back(Entry); - Entry.Node = Size; Args.push_back(Entry); + Type *ArgTy = DAG.getDataLayout().getIntPtrType(*DAG.getContext()); + Args.emplace_back(Dst, ArgTy); + Args.emplace_back(Src, ArgTy); + Args.emplace_back(Size, ArgTy); const char *MemcpyAlign4Name = TLI.getLibcallName(RTLIB::MEMCPY_ALIGN_4); CallingConv::ID CC = TLI.getLibcallCallingConv(RTLIB::MEMCPY_ALIGN_4);