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[ConstantFolding] Fold scalable get_active_lane_masks #156659

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Merged
merged 2 commits into from
Sep 11, 2025
Merged

[ConstantFolding] Fold scalable get_active_lane_masks #156659

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49833a2
[ConstantFolding] Fold scalable get_active_lane_masks
MDevereau Sep 3, 2025
042b029
Remove Op1.isZero() condition
MDevereau Sep 4, 2025
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7 changes: 7 additions & 0 deletions llvm/lib/Analysis/ConstantFolding.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -4238,6 +4238,13 @@ static Constant *ConstantFoldScalableVectorCall(

return ConstantInt::getFalse(SVTy);
}
case Intrinsic::get_active_lane_mask: {
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@david-arm david-arm Sep 3, 2025

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I think we probably want to do this for fixed-width as well.

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@MDevereau MDevereau Sep 3, 2025

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As it stands, ConstantFolding can already handle this for fixed-width. Scalable seems to have been left behind: https://godbolt.org/z/snd7M5oer

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@david-arm david-arm Sep 3, 2025

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I see yeah, and as it stands the code in ConstantFoldFixedVectorCall is broken because it should return poison if Op1 is zero. Once the LangRef is fixed we can always revisit this.

auto Op0 = cast<ConstantInt>(Operands[0])->getValue();
auto Op1 = cast<ConstantInt>(Operands[1])->getValue();
Comment on lines +4242 to +4243
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@fhahn fhahn Sep 11, 2025

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This is currently causing crashes when the operands are constant expressions. I added checks to. make sure the operands are actually ConstantInts in 607a813 to avoid a revert.

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@MDevereau MDevereau Sep 12, 2025

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Thanks for that, much appreciated.

if (Op0.uge(Op1))
return ConstantVector::getNullValue(SVTy);
break;
}
default:
break;
}
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33 changes: 33 additions & 0 deletions llvm/test/Transforms/InstSimplify/ConstProp/active-lane-mask.ll
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Expand Up @@ -307,6 +307,39 @@ entry:
ret <4 x float> %var33
}

define <vscale x 4 x i1> @nxv4i1_12_12() {
; CHECK-LABEL: @nxv4i1_12_12(
; CHECK-NEXT: entry:
; CHECK-NEXT: ret <vscale x 4 x i1> zeroinitializer
;
entry:
%mask = call <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i32(i32 12, i32 12)
ret <vscale x 4 x i1> %mask
}

define <vscale x 4 x i1> @nxv4i1_8_4() {
; CHECK-LABEL: @nxv4i1_8_4(
; CHECK-NEXT: entry:
; CHECK-NEXT: ret <vscale x 4 x i1> zeroinitializer
;
entry:
%mask = call <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i32(i32 8, i32 4)
ret <vscale x 4 x i1> %mask
}

define <vscale x 16 x i1> @nxv16i1_0_0() {
; CHECK-LABEL: @nxv16i1_0_0(
; CHECK-NEXT: entry:
; CHECK-NEXT: ret <vscale x 16 x i1> zeroinitializer
;
entry:
%mask = call <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i64(i64 0, i64 0)
ret <vscale x 16 x i1> %mask
}

declare <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32, i32)
declare <8 x i1> @llvm.get.active.lane.mask.v8i1.i32(i32, i32)
declare <16 x i1> @llvm.get.active.lane.mask.v16i1.i32(i32, i32)

declare <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i32(i32, i32)
declare <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv4i1.i64(i64, i64)