From c611d08c2040c39d8affe86b5533ddb5625d2842 Mon Sep 17 00:00:00 2001 From: Andy Wan Date: Thu, 4 Sep 2025 11:25:26 -0700 Subject: [PATCH 1/2] fix bazel build --- utils/bazel/llvm-project-overlay/llvm/BUILD.bazel | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/utils/bazel/llvm-project-overlay/llvm/BUILD.bazel b/utils/bazel/llvm-project-overlay/llvm/BUILD.bazel index 38bb87a9e071c..3a95e7ca9d2b8 100644 --- a/utils/bazel/llvm-project-overlay/llvm/BUILD.bazel +++ b/utils/bazel/llvm-project-overlay/llvm/BUILD.bazel @@ -2222,6 +2222,8 @@ llvm_target_lib_list = [lib for lib in [ "lib/Target/AArch64/AArch64GenSubtargetInfo.inc": ["-gen-subtarget"], "lib/Target/AArch64/AArch64GenDisassemblerTables.inc": [ "-gen-disassembler", + "-ignore-non-decodable-operands", + "-ignore-fully-defined-operands", ], "lib/Target/AArch64/AArch64GenSystemOperands.inc": ["-gen-searchable-tables"], "lib/Target/AArch64/AArch64GenExegesis.inc": ["-gen-exegesis"], @@ -2244,7 +2246,7 @@ llvm_target_lib_list = [lib for lib in [ "lib/Target/ARM/ARMGenGlobalISel.inc": ["-gen-global-isel"], "lib/Target/ARM/ARMGenCallingConv.inc": ["-gen-callingconv"], "lib/Target/ARM/ARMGenSubtargetInfo.inc": ["-gen-subtarget"], - "lib/Target/ARM/ARMGenDisassemblerTables.inc": ["-gen-disassembler"], + "lib/Target/ARM/ARMGenDisassemblerTables.inc": ["-gen-disassembler", "-ignore-non-decodable-operands"], }, }, { @@ -2264,6 +2266,8 @@ llvm_target_lib_list = [lib for lib in [ "lib/Target/AMDGPU/AMDGPUGenDisassemblerTables.inc": [ "-gen-disassembler", "--specialize-decoders-per-bitwidth", + "-ignore-non-decodable-operands", + "-ignore-fully-defined-operands", ], "lib/Target/AMDGPU/AMDGPUGenSearchableTables.inc": ["-gen-searchable-tables"], }, @@ -2281,7 +2285,7 @@ llvm_target_lib_list = [lib for lib in [ "lib/Target/AVR/AVRGenAsmWriter.inc": ["-gen-asm-writer"], "lib/Target/AVR/AVRGenCallingConv.inc": ["-gen-callingconv"], "lib/Target/AVR/AVRGenDAGISel.inc": ["-gen-dag-isel"], - "lib/Target/AVR/AVRGenDisassemblerTables.inc": ["-gen-disassembler"], + "lib/Target/AVR/AVRGenDisassemblerTables.inc": ["-gen-disassembler", "-ignore-non-decodable-operands"], "lib/Target/AVR/AVRGenMCCodeEmitter.inc": ["-gen-emitter"], "lib/Target/AVR/AVRGenInstrInfo.inc": ["-gen-instr-info"], "lib/Target/AVR/AVRGenRegisterInfo.inc": ["-gen-register-info"], @@ -2299,7 +2303,7 @@ llvm_target_lib_list = [lib for lib in [ "lib/Target/BPF/BPFGenCallingConv.inc": ["-gen-callingconv"], "lib/Target/BPF/BPFGenDAGISel.inc": ["-gen-dag-isel"], "lib/Target/BPF/BPFGenGlobalISel.inc": ["-gen-global-isel"], - "lib/Target/BPF/BPFGenDisassemblerTables.inc": ["-gen-disassembler"], + "lib/Target/BPF/BPFGenDisassemblerTables.inc": ["-gen-disassembler", "-ignore-non-decodable-operands"], "lib/Target/BPF/BPFGenMCCodeEmitter.inc": ["-gen-emitter"], "lib/Target/BPF/BPFGenInstrInfo.inc": ["-gen-instr-info"], "lib/Target/BPF/BPFGenRegisterInfo.inc": ["-gen-register-info"], @@ -2315,7 +2319,7 @@ llvm_target_lib_list = [lib for lib in [ "lib/Target/Hexagon/HexagonGenCallingConv.inc": ["-gen-callingconv"], "lib/Target/Hexagon/HexagonGenDAGISel.inc": ["-gen-dag-isel"], "lib/Target/Hexagon/HexagonGenDFAPacketizer.inc": ["-gen-dfa-packetizer"], - "lib/Target/Hexagon/HexagonGenDisassemblerTables.inc": ["-gen-disassembler"], + "lib/Target/Hexagon/HexagonGenDisassemblerTables.inc": ["-gen-disassembler", "-ignore-non-decodable-operands"], "lib/Target/Hexagon/HexagonGenInstrInfo.inc": ["-gen-instr-info"], "lib/Target/Hexagon/HexagonGenMCCodeEmitter.inc": ["-gen-emitter"], "lib/Target/Hexagon/HexagonGenRegisterInfo.inc": ["-gen-register-info"], @@ -2361,7 +2365,7 @@ llvm_target_lib_list = [lib for lib in [ "lib/Target/Mips/MipsGenAsmWriter.inc": ["-gen-asm-writer"], "lib/Target/Mips/MipsGenCallingConv.inc": ["-gen-callingconv"], "lib/Target/Mips/MipsGenDAGISel.inc": ["-gen-dag-isel"], - "lib/Target/Mips/MipsGenDisassemblerTables.inc": ["-gen-disassembler"], + "lib/Target/Mips/MipsGenDisassemblerTables.inc": ["-gen-disassembler", "-ignore-non-decodable-operands"], "lib/Target/Mips/MipsGenMCCodeEmitter.inc": ["-gen-emitter"], "lib/Target/Mips/MipsGenExegesis.inc": ["-gen-exegesis"], "lib/Target/Mips/MipsGenFastISel.inc": ["-gen-fast-isel"], @@ -2434,6 +2438,7 @@ llvm_target_lib_list = [lib for lib in [ "lib/Target/RISCV/RISCVGenDisassemblerTables.inc": [ "-gen-disassembler", "--specialize-decoders-per-bitwidth", + "-ignore-non-decodable-operands", ], "lib/Target/RISCV/RISCVGenInstrInfo.inc": ["-gen-instr-info"], "lib/Target/RISCV/RISCVGenMacroFusion.inc": ["-gen-macro-fusion-pred"], From 41680c193b3508fb0042173c7dffab9adbb71992 Mon Sep 17 00:00:00 2001 From: Andy Wan Date: Thu, 4 Sep 2025 12:02:07 -0700 Subject: [PATCH 2/2] buildify --- .../llvm-project-overlay/llvm/BUILD.bazel | 35 +++++++++++++------ 1 file changed, 25 insertions(+), 10 deletions(-) diff --git a/utils/bazel/llvm-project-overlay/llvm/BUILD.bazel b/utils/bazel/llvm-project-overlay/llvm/BUILD.bazel index 3a95e7ca9d2b8..42629b95cdda2 100644 --- a/utils/bazel/llvm-project-overlay/llvm/BUILD.bazel +++ b/utils/bazel/llvm-project-overlay/llvm/BUILD.bazel @@ -2222,8 +2222,8 @@ llvm_target_lib_list = [lib for lib in [ "lib/Target/AArch64/AArch64GenSubtargetInfo.inc": ["-gen-subtarget"], "lib/Target/AArch64/AArch64GenDisassemblerTables.inc": [ "-gen-disassembler", - "-ignore-non-decodable-operands", - "-ignore-fully-defined-operands", + "-ignore-non-decodable-operands", + "-ignore-fully-defined-operands", ], "lib/Target/AArch64/AArch64GenSystemOperands.inc": ["-gen-searchable-tables"], "lib/Target/AArch64/AArch64GenExegesis.inc": ["-gen-exegesis"], @@ -2246,7 +2246,10 @@ llvm_target_lib_list = [lib for lib in [ "lib/Target/ARM/ARMGenGlobalISel.inc": ["-gen-global-isel"], "lib/Target/ARM/ARMGenCallingConv.inc": ["-gen-callingconv"], "lib/Target/ARM/ARMGenSubtargetInfo.inc": ["-gen-subtarget"], - "lib/Target/ARM/ARMGenDisassemblerTables.inc": ["-gen-disassembler", "-ignore-non-decodable-operands"], + "lib/Target/ARM/ARMGenDisassemblerTables.inc": [ + "-gen-disassembler", + "-ignore-non-decodable-operands", + ], }, }, { @@ -2266,8 +2269,8 @@ llvm_target_lib_list = [lib for lib in [ "lib/Target/AMDGPU/AMDGPUGenDisassemblerTables.inc": [ "-gen-disassembler", "--specialize-decoders-per-bitwidth", - "-ignore-non-decodable-operands", - "-ignore-fully-defined-operands", + "-ignore-non-decodable-operands", + "-ignore-fully-defined-operands", ], "lib/Target/AMDGPU/AMDGPUGenSearchableTables.inc": ["-gen-searchable-tables"], }, @@ -2285,7 +2288,10 @@ llvm_target_lib_list = [lib for lib in [ "lib/Target/AVR/AVRGenAsmWriter.inc": ["-gen-asm-writer"], "lib/Target/AVR/AVRGenCallingConv.inc": ["-gen-callingconv"], "lib/Target/AVR/AVRGenDAGISel.inc": ["-gen-dag-isel"], - "lib/Target/AVR/AVRGenDisassemblerTables.inc": ["-gen-disassembler", "-ignore-non-decodable-operands"], + "lib/Target/AVR/AVRGenDisassemblerTables.inc": [ + "-gen-disassembler", + "-ignore-non-decodable-operands", + ], "lib/Target/AVR/AVRGenMCCodeEmitter.inc": ["-gen-emitter"], "lib/Target/AVR/AVRGenInstrInfo.inc": ["-gen-instr-info"], "lib/Target/AVR/AVRGenRegisterInfo.inc": ["-gen-register-info"], @@ -2303,7 +2309,10 @@ llvm_target_lib_list = [lib for lib in [ "lib/Target/BPF/BPFGenCallingConv.inc": ["-gen-callingconv"], "lib/Target/BPF/BPFGenDAGISel.inc": ["-gen-dag-isel"], "lib/Target/BPF/BPFGenGlobalISel.inc": ["-gen-global-isel"], - "lib/Target/BPF/BPFGenDisassemblerTables.inc": ["-gen-disassembler", "-ignore-non-decodable-operands"], + "lib/Target/BPF/BPFGenDisassemblerTables.inc": [ + "-gen-disassembler", + "-ignore-non-decodable-operands", + ], "lib/Target/BPF/BPFGenMCCodeEmitter.inc": ["-gen-emitter"], "lib/Target/BPF/BPFGenInstrInfo.inc": ["-gen-instr-info"], "lib/Target/BPF/BPFGenRegisterInfo.inc": ["-gen-register-info"], @@ -2319,7 +2328,10 @@ llvm_target_lib_list = [lib for lib in [ "lib/Target/Hexagon/HexagonGenCallingConv.inc": ["-gen-callingconv"], "lib/Target/Hexagon/HexagonGenDAGISel.inc": ["-gen-dag-isel"], "lib/Target/Hexagon/HexagonGenDFAPacketizer.inc": ["-gen-dfa-packetizer"], - "lib/Target/Hexagon/HexagonGenDisassemblerTables.inc": ["-gen-disassembler", "-ignore-non-decodable-operands"], + "lib/Target/Hexagon/HexagonGenDisassemblerTables.inc": [ + "-gen-disassembler", + "-ignore-non-decodable-operands", + ], "lib/Target/Hexagon/HexagonGenInstrInfo.inc": ["-gen-instr-info"], "lib/Target/Hexagon/HexagonGenMCCodeEmitter.inc": ["-gen-emitter"], "lib/Target/Hexagon/HexagonGenRegisterInfo.inc": ["-gen-register-info"], @@ -2365,7 +2377,10 @@ llvm_target_lib_list = [lib for lib in [ "lib/Target/Mips/MipsGenAsmWriter.inc": ["-gen-asm-writer"], "lib/Target/Mips/MipsGenCallingConv.inc": ["-gen-callingconv"], "lib/Target/Mips/MipsGenDAGISel.inc": ["-gen-dag-isel"], - "lib/Target/Mips/MipsGenDisassemblerTables.inc": ["-gen-disassembler", "-ignore-non-decodable-operands"], + "lib/Target/Mips/MipsGenDisassemblerTables.inc": [ + "-gen-disassembler", + "-ignore-non-decodable-operands", + ], "lib/Target/Mips/MipsGenMCCodeEmitter.inc": ["-gen-emitter"], "lib/Target/Mips/MipsGenExegesis.inc": ["-gen-exegesis"], "lib/Target/Mips/MipsGenFastISel.inc": ["-gen-fast-isel"], @@ -2438,7 +2453,7 @@ llvm_target_lib_list = [lib for lib in [ "lib/Target/RISCV/RISCVGenDisassemblerTables.inc": [ "-gen-disassembler", "--specialize-decoders-per-bitwidth", - "-ignore-non-decodable-operands", + "-ignore-non-decodable-operands", ], "lib/Target/RISCV/RISCVGenInstrInfo.inc": ["-gen-instr-info"], "lib/Target/RISCV/RISCVGenMacroFusion.inc": ["-gen-macro-fusion-pred"],