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[RISCV] Exclude LPAD in machine outliner #157220

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Merged
jaidTw merged 8 commits into from
Sep 9, 2025
Merged

[RISCV] Exclude LPAD in machine outliner #157220

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92afeb7
[RISCV] Add lit test for testing machine outliner with LPAD
jaidTw Sep 6, 2025
8b75b85
[RISCV] Exclude LPAD in machine outliner
jaidTw Sep 4, 2025
936bcca
Regen test
jaidTw Sep 6, 2025
96f1bc0
fixup! clang-format
jaidTw Sep 6, 2025
a2ce049
Update test
jaidTw Sep 8, 2025
ab76d0f
Make the checking of LPAD a predicate in RISCVInstrPredicate.td
jaidTw Sep 8, 2025
1580617
fix test
jaidTw Sep 8, 2025
1e8eb67
Address comments
jaidTw Sep 9, 2025
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3 changes: 3 additions & 0 deletions llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -3511,6 +3511,9 @@ RISCVInstrInfo::getOutliningTypeImpl(const MachineModuleInfo &MMI,
return outliner::InstrType::Illegal;
}

if (isLPAD(MI))
return outliner::InstrType::Illegal;

return outliner::InstrType::Legal;
}

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8 changes: 8 additions & 0 deletions llvm/lib/Target/RISCV/RISCVInstrPredicates.td
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Expand Up @@ -148,6 +148,14 @@ def isNonZeroLoadImmediate
CheckNot<CheckImmOperand<2, 0>>
]>>>;

def isLPAD
: TIIPredicate<"isLPAD",
MCReturnStatement<CheckAll<[
CheckOpcode<[AUIPC]>,
CheckIsRegOperand<0>,
CheckRegOperand<0, X0>,
]>>>;

def ignoresVXRM
: TIIPredicate<"ignoresVXRM",
MCOpcodeSwitchStatement<
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65 changes: 65 additions & 0 deletions llvm/test/CodeGen/RISCV/machine-outliner-lpad.ll
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@@ -0,0 +1,65 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple riscv64 -mattr=+experimental-zicfilp < %s | FileCheck %s
; RUN: llc -mtriple riscv32 -mattr=+experimental-zicfilp < %s | FileCheck %s

define i16 @test1(i16 %x) #0 {
; CHECK-LABEL: test1:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lpad 0
; CHECK-NEXT: tail OUTLINED_FUNCTION_0
entry:
%y = add i16 5, %x
%z = mul i16 4, %y
ret i16 %z
}

define i16 @test2(i16 %x) #0 {
; CHECK-LABEL: test2:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lpad 0
; CHECK-NEXT: tail OUTLINED_FUNCTION_0
entry:
%y = add i16 5, %x
%z = mul i16 4, %y
ret i16 %z
}

define i16 @test3(i16 %x) #0 {
; CHECK-LABEL: test3:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lpad 0
; CHECK-NEXT: tail OUTLINED_FUNCTION_0
entry:
%y = add i16 5, %x
%z = mul i16 4, %y
ret i16 %z
}

define i16 @test4(i16 %x) #0 {
; CHECK-LABEL: test4:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lpad 0
; CHECK-NEXT: tail OUTLINED_FUNCTION_0
entry:
%y = add i16 5, %x
%z = mul i16 4, %y
ret i16 %z
}

define i16 @main(i16 %x) #0 {
; CHECK-LABEL: main:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lpad 0
; CHECK-NEXT: tail OUTLINED_FUNCTION_0
entry:
%y = add i16 5, %x
%z = mul i16 4, %y
ret i16 %z
}

attributes #0 = { minsize }

!llvm.module.flags = !{!0, !1}

!0 = !{i32 8, !"cf-protection-branch", i32 1}
!1 = !{i32 1, !"cf-branch-label-scheme", !"unlabeled"}