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[SPIRV] Added support for the constrained arithmetic intrinsic #157441

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[SPIRV] Added support for the constrained arithmetic intrinsic #157441

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d512507
Added Support for the Constrained fmuladd
SubashBoopathi Aug 20, 2025
61dad88
Removed the legalization of the Opcode and used lower()
SubashBoopathi Oct 13, 2025
082c8aa
Slight changes in the format of legalizerinfo
SubashBoopathi Oct 13, 2025
b9d3905
Modified the legalization conditions to lower the instruction directly
SubashBoopathi Nov 12, 2025
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1 change: 1 addition & 0 deletions llvm/include/llvm/Support/TargetOpcodes.def
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Original file line number Diff line number Diff line change
Expand Up @@ -643,6 +643,7 @@ HANDLE_TARGET_OPCODE(G_FMA)

/// Generic FP multiply and add. Behaves as separate fmul and fadd.
HANDLE_TARGET_OPCODE(G_FMAD)
HANDLE_TARGET_OPCODE(G_STRICT_FMAD)

/// Generic FP division.
HANDLE_TARGET_OPCODE(G_FDIV)
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1 change: 1 addition & 0 deletions llvm/include/llvm/Target/GenericOpcodes.td
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Expand Up @@ -1716,6 +1716,7 @@ def G_STRICT_FREM : ConstrainedInstruction<G_FREM>;
def G_STRICT_FMA : ConstrainedInstruction<G_FMA>;
def G_STRICT_FSQRT : ConstrainedInstruction<G_FSQRT>;
def G_STRICT_FLDEXP : ConstrainedInstruction<G_FLDEXP>;
def G_STRICT_FMAD : ConstrainedInstruction<G_FMAD>;

//------------------------------------------------------------------------------
// Memory intrinsics
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2 changes: 2 additions & 0 deletions llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
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Expand Up @@ -2080,6 +2080,8 @@ static unsigned getConstrainedOpcode(Intrinsic::ID ID) {
return TargetOpcode::G_STRICT_FSQRT;
case Intrinsic::experimental_constrained_ldexp:
return TargetOpcode::G_STRICT_FLDEXP;
case Intrinsic::experimental_constrained_fmuladd:
return TargetOpcode::G_STRICT_FMAD;
default:
return 0;
}
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1 change: 1 addition & 0 deletions llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
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Expand Up @@ -4523,6 +4523,7 @@ LegalizerHelper::lower(MachineInstr &MI, unsigned TypeIdx, LLT LowerHintTy) {
return Legalized;
}
case TargetOpcode::G_FMAD:
case TargetOpcode::G_STRICT_FMAD:
return lowerFMad(MI);
case TargetOpcode::G_FFLOOR:
return lowerFFloor(MI);
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4 changes: 4 additions & 0 deletions llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
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Expand Up @@ -196,6 +196,10 @@ SPIRVLegalizerInfo::SPIRVLegalizerInfo(const SPIRVSubtarget &ST) {
getActionDefinitionsBuilder({G_FMA, G_STRICT_FMA})
.legalFor(allFloatScalarsAndVectors);

getActionDefinitionsBuilder(G_STRICT_FMAD)
.legalFor(allFloatScalarsAndVectors)
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@s-perron s-perron Nov 10, 2025

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If the G_STRICT_FMAD is applied to a float or vector of floats, it will not be lowered. Is that what you want?

If you want it lowered all of the time, remove this line. I expect that is what you want based on earlier PRs.

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@SubashBoopathi SubashBoopathi Nov 12, 2025

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@s-perron I understood and I modified the legalizer info to directly lower the intrinsic as expected.

.lower();

getActionDefinitionsBuilder(G_STRICT_FLDEXP)
.legalForCartesianProduct(allFloatScalarsAndVectors, allIntScalars);

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64 changes: 64 additions & 0 deletions llvm/test/CodeGen/SPIRV/llvm-intrinsics/constrained-fmuladd.ll
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@@ -0,0 +1,64 @@
; RUN: llc -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
; RUN: %if spirv-tools %{ llc -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}

; CHECK-DAG: OpDecorate %[[#]] FPRoundingMode RTE
; CHECK-DAG: OpDecorate %[[#]] FPRoundingMode RTZ
; CHECK-DAG: OpDecorate %[[#]] FPRoundingMode RTP
; CHECK-DAG: OpDecorate %[[#]] FPRoundingMode RTN
; CHECK-DAG: OpDecorate %[[#]] FPRoundingMode RTE

; CHECK: OpFMul %[[#]] %[[#]] %[[#]]
; CHECK: OpFAdd %[[#]] %[[#]] %[[#]]
define spir_kernel void @test_f32(float %a) {
entry:
%r = tail call float @llvm.experimental.constrained.fmuladd.f32(
float %a, float %a, float %a,
metadata !"round.tonearest", metadata !"fpexcept.strict")
ret void
}

; CHECK: OpFMul %[[#]] %[[#]] %[[#]]
; CHECK: OpFAdd %[[#]] %[[#]] %[[#]]
define spir_kernel void @test_f64(double %a) {
entry:
%r = tail call double @llvm.experimental.constrained.fmuladd.f64(
double %a, double %a, double %a,
metadata !"round.towardzero", metadata !"fpexcept.strict")
ret void
}

; CHECK: OpFMul %[[#]] %[[#]] %[[#]]
; CHECK: OpFAdd %[[#]] %[[#]] %[[#]]
define spir_kernel void @test_v2f32(<2 x float> %a) {
entry:
%r = tail call <2 x float> @llvm.experimental.constrained.fmuladd.v2f32(
<2 x float> %a, <2 x float> %a, <2 x float> %a,
metadata !"round.upward", metadata !"fpexcept.strict")
ret void
}

; CHECK: OpFMul %[[#]] %[[#]] %[[#]]
; CHECK: OpFAdd %[[#]] %[[#]] %[[#]]
define spir_kernel void @test_v4f32(<4 x float> %a) {
entry:
%r = tail call <4 x float> @llvm.experimental.constrained.fmuladd.v4f32(
<4 x float> %a, <4 x float> %a, <4 x float> %a,
metadata !"round.downward", metadata !"fpexcept.strict")
ret void
}

; CHECK: OpFMul %[[#]] %[[#]] %[[#]]
; CHECK: OpFAdd %[[#]] %[[#]] %[[#]]
define spir_kernel void @test_v2f64(<2 x double> %a) {
entry:
%r = tail call <2 x double> @llvm.experimental.constrained.fmuladd.v2f64(
<2 x double> %a, <2 x double> %a, <2 x double> %a,
metadata !"round.tonearest", metadata !"fpexcept.strict")
ret void
}

declare float @llvm.experimental.constrained.fmuladd.f32(float, float, float, metadata, metadata)
declare double @llvm.experimental.constrained.fmuladd.f64(double, double, double, metadata, metadata)
declare <2 x float> @llvm.experimental.constrained.fmuladd.v2f32(<2 x float>, <2 x float>, <2 x float>, metadata, metadata)
declare <4 x float> @llvm.experimental.constrained.fmuladd.v4f32(<4 x float>, <4 x float>, <4 x float>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.fmuladd.v2f64(<2 x double>, <2 x double>, <2 x double>, metadata, metadata)
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