From 6adf6d3e321647bee1a809a3c78dbdd0f252f8f7 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Wed, 10 Sep 2025 10:56:07 -0700 Subject: [PATCH 1/2] [RISCV] Add helper method for detecting BEXTI or TH_TST is supported. NFC These instructions both extract single bit to bit 0 and fill the upper bits with 0. There's at least one place where we check for BEXTI but not TH_TST. I wanted to keep this patch NFC so that will be a follow up fix. --- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 2 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 2 +- llvm/lib/Target/RISCV/RISCVSubtarget.h | 4 ++++ 3 files changed, 6 insertions(+), 2 deletions(-) diff --git a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp index 756422dfa29e5..c7f15415ebb91 100644 --- a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp @@ -1052,7 +1052,7 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) { SDLoc DL(Node); MVT VT = Node->getSimpleValueType(0); - bool HasBitTest = Subtarget->hasStdExtZbs() || Subtarget->hasVendorXTHeadBs(); + bool HasBitTest = Subtarget->hasBEXTILike(); switch (Opcode) { case ISD::Constant: { diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp index 409f98b348903..a68a3c14dc41d 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -2173,7 +2173,7 @@ bool RISCVTargetLowering::isMaskAndCmp0FoldingBeneficial( // on the basis that it's possible the sinking+duplication of the AND in // CodeGenPrepare triggered by this hook wouldn't decrease the instruction // count and would increase code size (e.g. ANDI+BNEZ => BEXTI+BNEZ). - if (!Subtarget.hasStdExtZbs() && !Subtarget.hasVendorXTHeadBs()) + if (!Subtarget.hasBEXTILike()) return false; ConstantInt *Mask = dyn_cast(AndI.getOperand(1)); if (!Mask) diff --git a/llvm/lib/Target/RISCV/RISCVSubtarget.h b/llvm/lib/Target/RISCV/RISCVSubtarget.h index 4429d760a6cb0..9baaa9d347ecc 100644 --- a/llvm/lib/Target/RISCV/RISCVSubtarget.h +++ b/llvm/lib/Target/RISCV/RISCVSubtarget.h @@ -186,6 +186,10 @@ class RISCVSubtarget : public RISCVGenSubtargetInfo { return HasStdExtZfhmin || HasStdExtZfbfmin; } + bool hasBEXTILike() const { + return HasStdExtZbs || HasVendorXTHeadBs; + } + bool hasCZEROLike() const { return HasStdExtZicond || HasVendorXVentanaCondOps; } From bd1b6368f40f719f9b59d2b0b071c8e5f22fecb5 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Wed, 10 Sep 2025 11:07:41 -0700 Subject: [PATCH 2/2] fixup! clang-format --- llvm/lib/Target/RISCV/RISCVSubtarget.h | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/llvm/lib/Target/RISCV/RISCVSubtarget.h b/llvm/lib/Target/RISCV/RISCVSubtarget.h index 9baaa9d347ecc..50e76df56e575 100644 --- a/llvm/lib/Target/RISCV/RISCVSubtarget.h +++ b/llvm/lib/Target/RISCV/RISCVSubtarget.h @@ -186,9 +186,7 @@ class RISCVSubtarget : public RISCVGenSubtargetInfo { return HasStdExtZfhmin || HasStdExtZfbfmin; } - bool hasBEXTILike() const { - return HasStdExtZbs || HasVendorXTHeadBs; - } + bool hasBEXTILike() const { return HasStdExtZbs || HasVendorXTHeadBs; } bool hasCZEROLike() const { return HasStdExtZicond || HasVendorXVentanaCondOps;