diff --git a/clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-cooperative-atomics.cl b/clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-cooperative-atomics.cl
index 8768f2f367654..604f986c4aafc 100644
--- a/clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-cooperative-atomics.cl
+++ b/clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-cooperative-atomics.cl
@@ -2,6 +2,7 @@
 
 // REQUIRES: amdgpu-registered-target
 // RUN: %clang_cc1 -cl-std=CL2.0 -triple amdgcn-unknown-unknown -target-cpu gfx1250 -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -cl-std=CL2.0 -triple amdgcn-unknown-unknown -target-cpu gfx1251 -emit-llvm -o - %s | FileCheck %s
 
 typedef int    v2i   __attribute__((ext_vector_type(2)));
 typedef int    v4i   __attribute__((ext_vector_type(4)));
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cooperative.atomic-basic.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cooperative.atomic-basic.ll
index 1a2d2fe3f441c..0cb9f36232cbd 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cooperative.atomic-basic.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cooperative.atomic-basic.ll
@@ -1,49 +1,59 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GFX1250,GFX1250-SDAG %s
-; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GFX1250,GFX1250-GISEL %s
+; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GCN,GFX1250,GFX1250-SDAG %s
+; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 < %s | FileCheck -check-prefixes=GCN,GFX1251,GFX1251-SDAG %s
+
+; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GCN,GFX1250,GFX1250-GISEL %s
+; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 < %s | FileCheck -check-prefixes=GCN,GFX1251,GFX1251-GISEL %s
+
+; this test has both gfx1250/1251 run lines to check availability of the intrinsic on both variants.
 
 ; test behavior with unsupported 'consume' and 'acq_rel' ordering
 
 define i32 @test_load_consume(ptr noundef readonly %addr)  {
-; GFX1250-LABEL: test_load_consume:
-; GFX1250:       ; %bb.0: ; %entry
-; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x0
-; GFX1250-NEXT:    s_wait_kmcnt 0x0
-; GFX1250-NEXT:    flat_load_b32 v0, v[0:1] scope:SCOPE_SYS
-; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x0
-; GFX1250-NEXT:    s_set_pc_i64 s[30:31]
+; GCN-LABEL: test_load_consume:
+; GCN:       ; %bb.0: ; %entry
+; GCN-NEXT:    s_wait_loadcnt_dscnt 0x0
+; GCN-NEXT:    s_wait_kmcnt 0x0
+; GCN-NEXT:    flat_load_b32 v0, v[0:1] scope:SCOPE_SYS
+; GCN-NEXT:    s_wait_loadcnt_dscnt 0x0
+; GCN-NEXT:    s_set_pc_i64 s[30:31]
 entry:
   %0 = tail call i32 @llvm.amdgcn.cooperative.atomic.load.32x4B.p0(ptr %addr, i32 1, metadata !0)
   ret i32 %0
 }
 
 define i32 @test_load_acqrel(ptr noundef readonly %addr)  {
-; GFX1250-LABEL: test_load_acqrel:
-; GFX1250:       ; %bb.0: ; %entry
-; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x0
-; GFX1250-NEXT:    s_wait_kmcnt 0x0
-; GFX1250-NEXT:    flat_load_b32 v0, v[0:1] scope:SCOPE_SYS
-; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x0
-; GFX1250-NEXT:    s_set_pc_i64 s[30:31]
+; GCN-LABEL: test_load_acqrel:
+; GCN:       ; %bb.0: ; %entry
+; GCN-NEXT:    s_wait_loadcnt_dscnt 0x0
+; GCN-NEXT:    s_wait_kmcnt 0x0
+; GCN-NEXT:    flat_load_b32 v0, v[0:1] scope:SCOPE_SYS
+; GCN-NEXT:    s_wait_loadcnt_dscnt 0x0
+; GCN-NEXT:    s_set_pc_i64 s[30:31]
 entry:
   %0 = tail call i32 @llvm.amdgcn.cooperative.atomic.load.32x4B.p0(ptr %addr, i32 4, metadata !0)
   ret i32 %0
 }
 
 define void @test_store_acqrel(ptr noundef %addr, i32 noundef %val)  {
-; GFX1250-LABEL: test_store_acqrel:
-; GFX1250:       ; %bb.0: ; %entry
-; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x0
-; GFX1250-NEXT:    s_wait_kmcnt 0x0
-; GFX1250-NEXT:    flat_store_b32 v[0:1], v2 scope:SCOPE_SYS
-; GFX1250-NEXT:    s_wait_dscnt 0x0
-; GFX1250-NEXT:    s_set_pc_i64 s[30:31]
+; GCN-LABEL: test_store_acqrel:
+; GCN:       ; %bb.0: ; %entry
+; GCN-NEXT:    s_wait_loadcnt_dscnt 0x0
+; GCN-NEXT:    s_wait_kmcnt 0x0
+; GCN-NEXT:    flat_store_b32 v[0:1], v2 scope:SCOPE_SYS
+; GCN-NEXT:    s_wait_dscnt 0x0
+; GCN-NEXT:    s_set_pc_i64 s[30:31]
 entry:
   tail call void @llvm.amdgcn.cooperative.atomic.store.32x4B.p0(ptr %addr, i32 %val, i32 4, metadata !0)
   ret void
 }
 
 !0 = !{ !"" }
+
 ;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; GFX1250: {{.*}}
 ; GFX1250-GISEL: {{.*}}
 ; GFX1250-SDAG: {{.*}}
+; GFX1251: {{.*}}
+; GFX1251-GISEL: {{.*}}
+; GFX1251-SDAG: {{.*}}
diff --git a/llvm/test/Verifier/AMDGPU/llvm.amdgcn.cooperative.atomic.ll b/llvm/test/Verifier/AMDGPU/llvm.amdgcn.cooperative.atomic.ll
index 33c8a59bb2aa4..ca178d28d66c6 100644
--- a/llvm/test/Verifier/AMDGPU/llvm.amdgcn.cooperative.atomic.ll
+++ b/llvm/test/Verifier/AMDGPU/llvm.amdgcn.cooperative.atomic.ll
@@ -1,4 +1,5 @@
 ; RUN: not opt -mtriple=amdgcn -mcpu=gfx1250 -passes=verify  -disable-output <%s 2>&1 | FileCheck %s
+; RUN: not opt -mtriple=amdgcn -mcpu=gfx1251 -passes=verify  -disable-output <%s 2>&1 | FileCheck %s
 
 ; CHECK: cooperative atomic intrinsics require a generic or global pointer
 define i32 @load_local_as(ptr addrspace(3) noundef %addr)  {