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[lld] Add infrastructure for handling RISCV vendor-specific relocations. #159987

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resistor merged 5 commits into from
Oct 24, 2025
Merged

[lld] Add infrastructure for handling RISCV vendor-specific relocations. #159987

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fc46315
[lld] Add infrastructure for handling RISCV vendor-specific relocations.
resistor Oct 14, 2025
6a20ab8
Update for review feedback
resistor Oct 15, 2025
1b6be66
Update for review feedback.
resistor Oct 16, 2025
a269770
Update test for review feedback
resistor Oct 20, 2025
a1bbc93
Update error messages per review feedback.
resistor Oct 22, 2025
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57 changes: 57 additions & 0 deletions lld/ELF/Arch/RISCV.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,7 @@

#include "InputFiles.h"
#include "OutputSections.h"
#include "RelocScan.h"
#include "Symbols.h"
#include "SyntheticSections.h"
#include "Target.h"
Expand Down Expand Up @@ -38,6 +39,10 @@ class RISCV final : public TargetInfo {
void writePltHeader(uint8_t *buf) const override;
void writePlt(uint8_t *buf, const Symbol &sym,
uint64_t pltEntryAddr) const override;
template <class ELFT, class RelTy>
void scanSectionImpl(InputSectionBase &, Relocs<RelTy>);
template <class ELFT> void scanSection1(InputSectionBase &);
void scanSection(InputSectionBase &) override;
RelType getDynRel(RelType type) const override;
RelExpr getRelExpr(RelType type, const Symbol &s,
const uint8_t *loc) const override;
Expand Down Expand Up @@ -278,6 +283,7 @@ RelExpr RISCV::getRelExpr(const RelType type, const Symbol &s,
const uint8_t *loc) const {
switch (type) {
case R_RISCV_NONE:
case R_RISCV_VENDOR:
return R_NONE;
case R_RISCV_32:
case R_RISCV_64:
Expand Down Expand Up @@ -1476,3 +1482,54 @@ void elf::mergeRISCVAttributesSections(Ctx &ctx) {
}

void elf::setRISCVTargetInfo(Ctx &ctx) { ctx.target.reset(new RISCV(ctx)); }

template <class ELFT, class RelTy>
void RISCV::scanSectionImpl(InputSectionBase &sec, Relocs<RelTy> rels) {
RelocScan rs(ctx, &sec);
// Many relocations end up in sec.relocations.
sec.relocations.reserve(rels.size());

StringRef rvVendor;
for (auto it = rels.begin(); it != rels.end(); ++it) {
RelType type = it->getType(false);
uint32_t symIndex = it->getSymbol(false);
Symbol &sym = sec.getFile<ELFT>()->getSymbol(symIndex);
const uint8_t *loc = sec.content().data() + it->r_offset;

if (type == R_RISCV_VENDOR) {
if (!rvVendor.empty())
Err(ctx) << getErrorLoc(ctx, loc)
<< "malformed consecutive R_RISCV_VENDOR relocations";
rvVendor = sym.getName();
continue;
} else if (!rvVendor.empty()) {
Err(ctx) << getErrorLoc(ctx, loc)
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@lenary lenary Oct 16, 2025

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The idea is that, once implemented, we'll override type in here to become a vendor-specific value (i.e. a value that can differentiate QUALCOMM's CUSTOM192 from e.g. CherIoT's CUSTOM192)?

And then those will be mapped back to the conventional RelExpr?

This is not a blocking comment, I'm just trying to understand the next step for someone implementing their relocations.

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@resistor resistor Oct 16, 2025

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That's my general idea, but I have not yet implemented it for CHERIoT. It's possible that there ends up being an issue that requires us to pass the vendor string further down.

<< "unknown vendor-specific relocation (" << type.v
<< ") in vendor namespace \"" << rvVendor << "\" against symbol "
<< &sym;
rvVendor = "";
continue;
}

rs.scan<ELFT, RelTy>(it, type, rs.getAddend<ELFT>(*it, type));
}

// Sort relocations by offset for more efficient searching for
// R_RISCV_PCREL_HI20.
llvm::stable_sort(sec.relocs(),
[](const Relocation &lhs, const Relocation &rhs) {
return lhs.offset < rhs.offset;
});
}

template <class ELFT> void RISCV::scanSection1(InputSectionBase &sec) {
const RelsOrRelas<ELFT> rels = sec.template relsOrRelas<ELFT>();
if (rels.areRelocsCrel())
scanSectionImpl<ELFT>(sec, rels.crels);
else
scanSectionImpl<ELFT>(sec, rels.relas);
}

void RISCV::scanSection(InputSectionBase &sec) {
invokeELFT(scanSection1, sec);
}
18 changes: 18 additions & 0 deletions lld/test/riscv-vendor-relocations.s
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Original file line number Diff line number Diff line change
@@ -0,0 +1,18 @@
# RUN: llvm-mc -triple riscv32 %s -filetype=obj -o %t.o
# RUN: not ld.lld -pie %t.o -o /dev/null 2>&1 | FileCheck %s

.option exact

.global TARGET
TARGET:
nop

.global INVALID_VENDOR
.reloc 1f, R_RISCV_VENDOR, INVALID_VENDOR+0
.reloc 1f, R_RISCV_VENDOR, INVALID_VENDOR+0
.reloc 1f, R_RISCV_CUSTOM255, TARGET
1:
nop

# CHECK: error: {{.*}}:(.text+0x4): malformed consecutive R_RISCV_VENDOR relocations
# CHECK: error: {{.*}}:(.text+0x4): unknown vendor-specific relocation (255) in vendor namespace "INVALID_VENDOR" against symbol TARGET
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