diff --git a/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp b/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp index b2cbdb2ad7375..e8f35fe2aa1ad 100644 --- a/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp @@ -2853,6 +2853,49 @@ static bool generateVectorLoadStoreInst(const SPIRV::IncomingCall *Call, return true; } +static bool generateAFPInst(const SPIRV::IncomingCall *Call, + MachineIRBuilder &MIRBuilder, + SPIRVGlobalRegistry *GR) { + const auto *Builtin = Call->Builtin; + auto *MRI = MIRBuilder.getMRI(); + unsigned Opcode = + SPIRV::lookupNativeBuiltin(Builtin->Name, Builtin->Set)->Opcode; + const Type *RetTy = GR->getTypeForSPIRVType(Call->ReturnType); + bool IsVoid = RetTy->isVoidTy(); + auto MIB = MIRBuilder.buildInstr(Opcode); + Register DestReg; + if (IsVoid) { + LLT PtrTy = MRI->getType(Call->Arguments[0]); + DestReg = MRI->createGenericVirtualRegister(PtrTy); + MRI->setRegClass(DestReg, &SPIRV::pIDRegClass); + SPIRVType *PointeeTy = + GR->getPointeeType(GR->getSPIRVTypeForVReg(Call->Arguments[0])); + MIB.addDef(DestReg); + MIB.addUse(GR->getSPIRVTypeID(PointeeTy)); + } else { + MIB.addDef(Call->ReturnRegister); + MIB.addUse(GR->getSPIRVTypeID(Call->ReturnType)); + } + for (unsigned i = IsVoid ? 1 : 0; i < Call->Arguments.size(); ++i) { + Register Arg = Call->Arguments[i]; + MachineInstr *DefMI = MRI->getUniqueVRegDef(Arg); + if (DefMI->getOpcode() == TargetOpcode::G_CONSTANT && + DefMI->getOperand(1).isCImm()) { + MIB.addImm(getConstFromIntrinsic(Arg, MRI)); + } else { + MIB.addUse(Arg); + } + } + if (IsVoid) { + LLT PtrTy = MRI->getType(Call->Arguments[0]); + MachineMemOperand *MMO = MIRBuilder.getMF().getMachineMemOperand( + MachinePointerInfo(), MachineMemOperand::MOStore, + PtrTy.getSizeInBytes(), Align(4)); + MIRBuilder.buildStore(DestReg, Call->Arguments[0], *MMO); + } + return true; +} + static bool generateLoadStoreInst(const SPIRV::IncomingCall *Call, MachineIRBuilder &MIRBuilder, SPIRVGlobalRegistry *GR) { @@ -3061,6 +3104,8 @@ std::optional lowerBuiltin(const StringRef DemangledCall, return generatePredicatedLoadStoreInst(Call.get(), MIRBuilder, GR); case SPIRV::BlockingPipes: return generateBlockingPipesInst(Call.get(), MIRBuilder, GR); + case SPIRV::ArbitraryFloatingPoint: + return generateAFPInst(Call.get(), MIRBuilder, GR); } return false; } diff --git a/llvm/lib/Target/SPIRV/SPIRVBuiltins.td b/llvm/lib/Target/SPIRV/SPIRVBuiltins.td index 492a98e1995fe..2a19aaa1a8e71 100644 --- a/llvm/lib/Target/SPIRV/SPIRVBuiltins.td +++ b/llvm/lib/Target/SPIRV/SPIRVBuiltins.td @@ -72,6 +72,7 @@ def Block2DLoadStore : BuiltinGroup; def Pipe : BuiltinGroup; def PredicatedLoadStore : BuiltinGroup; def BlockingPipes : BuiltinGroup; +def ArbitraryFloatingPoint: BuiltinGroup; //===----------------------------------------------------------------------===// // Class defining a demangled builtin record. The information in the record @@ -739,6 +740,49 @@ defm : DemangledNativeBuiltin<"__spirv_CooperativeMatrixStoreCheckedINTEL", Open defm : DemangledNativeBuiltin<"__spirv_CooperativeMatrixConstructCheckedINTEL", OpenCL_std, CoopMatr, 5, 5, OpCooperativeMatrixConstructCheckedINTEL>; defm : DemangledNativeBuiltin<"__spirv_CooperativeMatrixGetElementCoordINTEL", OpenCL_std, CoopMatr, 2, 2, OpCooperativeMatrixGetElementCoordINTEL>; +// Arbitrary Precision Floating Point builtin records: +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatGTALTER", OpenCL_std, ArbitraryFloatingPoint, 4, 4, OpArbitraryFloatGTALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatGEALTER", OpenCL_std, ArbitraryFloatingPoint, 4, 4, OpArbitraryFloatGEALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatLTALTER", OpenCL_std, ArbitraryFloatingPoint, 4, 4, OpArbitraryFloatLTALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatLEALTER", OpenCL_std, ArbitraryFloatingPoint, 4, 4, OpArbitraryFloatLEALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatEQALTER", OpenCL_std, ArbitraryFloatingPoint, 4, 4, OpArbitraryFloatEQALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatRecipALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatRecipALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatCbrtALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatCbrtALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatHypotALTER", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatHypotALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatSqrtALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatSqrtALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatLogALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatLogALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatLog2ALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatLog2ALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatLog10ALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatLog10ALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatLog1pALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatLog1pALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatExpALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatExpALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatExp2ALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatExp2ALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatExp10ALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatExp10ALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatExpm1ALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatExpm1ALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatSinALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatSinALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatCosALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatCosALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatSinCosALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatSinCosALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatSinPiALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatSinPiALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatCosPiALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatCosPiALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatSinCosPiALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatSinCosPiALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatAddALTER", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatAddALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatSubALTER", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatSubALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatMulALTER", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatMulALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatDivALTER", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatDivALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatRSqrtALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatRSqrtALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatASinALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatASinALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatASinPiALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatASinPiALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatACosALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatACosALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatACosPiALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatACosPiALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatATanALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatATanALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatATanPiALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatATanPiALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatATan2ALTER", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatATan2ALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatPowALTER", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatPowALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatPowRALTER", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatPowRALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatPowNALTER", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatPowNALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatCastALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatCastALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatCastFromIntALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatCastFromIntALTERA>; +defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatCastToIntALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatCastToIntALTERA>; + // SPV_INTEL_bindless_images builtin records: defm : DemangledNativeBuiltin<"__spirv_ConvertHandleToImageINTEL", OpenCL_std, BindlessINTEL, 1, 1, OpConvertHandleToImageINTEL>; defm : DemangledNativeBuiltin<"__spirv_ConvertHandleToSamplerINTEL", OpenCL_std, BindlessINTEL, 1, 1, OpConvertHandleToSamplerINTEL>; diff --git a/llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp b/llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp index ac09b937a584a..ac91e2badad9b 100644 --- a/llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp @@ -55,6 +55,9 @@ static const std::map> SPIRV::Extension::Extension::SPV_GOOGLE_user_type}, {"SPV_INTEL_arbitrary_precision_integers", SPIRV::Extension::Extension::SPV_INTEL_arbitrary_precision_integers}, + {"SPV_ALTERA_arbitrary_precision_floating_point", + SPIRV::Extension::Extension:: + SPV_ALTERA_arbitrary_precision_floating_point}, {"SPV_INTEL_cache_controls", SPIRV::Extension::Extension::SPV_INTEL_cache_controls}, {"SPV_INTEL_float_controls2", diff --git a/llvm/lib/Target/SPIRV/SPIRVInstrInfo.td b/llvm/lib/Target/SPIRV/SPIRVInstrInfo.td index 03bd61bdf2cf6..c05d71ce2b5e8 100644 --- a/llvm/lib/Target/SPIRV/SPIRVInstrInfo.td +++ b/llvm/lib/Target/SPIRV/SPIRVInstrInfo.td @@ -971,6 +971,109 @@ def OpAliasScopeListDeclINTEL: Op<5913, (outs ID:$res), (ins variable_ops), def OpBitwiseFunctionINTEL: Op<6242, (outs ID:$res), (ins TYPE:$type, ID:$a, ID:$b, ID:$c, ID:$lut_index), "$res = OpBitwiseFunctionINTEL $type $a $b $c $lut_index">; +// SPV_ALTERA_arbitrary_precision_floating_point +def OpArbitraryFloatGTALTERA: Op<5850, (outs ID:$res), (ins TYPE:$type, ID:$A, i32imm:$Ma , ID:$B, i32imm:$Mb), + "$res = OpArbitraryFloatGTALTERA $type $A $Ma $B $Mb">; +def OpArbitraryFloatGEALTERA: Op<5851, (outs ID:$res), (ins TYPE:$type, ID:$A, i32imm:$Ma , ID:$B, i32imm:$Mb), + "$res = OpArbitraryFloatGEALTERA $type $A $Ma $B $Mb">; +def OpArbitraryFloatLTALTERA: Op<5852, (outs ID:$res), (ins TYPE:$type, ID:$A, i32imm:$Ma , ID:$B, i32imm:$Mb), + "$res = OpArbitraryFloatLTALTERA $type $A $Ma $B $Mb">; +def OpArbitraryFloatLEALTERA: Op<5853, (outs ID:$res), (ins TYPE:$type, ID:$A, i32imm:$Ma , ID:$B, i32imm:$Mb), + "$res = OpArbitraryFloatLEALTERA $type $A $Ma $B $Mb">; +def OpArbitraryFloatEQALTERA: Op<5854, (outs ID:$res), (ins TYPE:$type, ID:$A, i32imm:$Ma , ID:$B, i32imm:$Mb), + "$res = OpArbitraryFloatEQALTERA $type $A $Ma $B $Mb">; +def OpArbitraryFloatRecipALTERA: Op<5855, (outs ID:$res), + (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy), + "$res = OpArbitraryFloatRecipALTERA $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">; +def OpArbitraryFloatCbrtALTERA: Op<5857, (outs ID:$res), + (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy), + "$res = OpArbitraryFloatCbrtALTERA $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">; +def OpArbitraryFloatHypotALTERA: Op<5858, (outs ID:$res), + (ins TYPE:$type, ID:$A, i32imm:$Ma, ID:$B, i32imm:$Mb, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy), + "$res = OpArbitraryFloatHypotALTERA $type $A $Ma $B $Mb $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">; +def OpArbitraryFloatSqrtALTERA: Op<5859, (outs ID:$res), + (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy), + "$res = OpArbitraryFloatSqrtALTERA $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">; +def OpArbitraryFloatLogALTERA: Op<5860, (outs ID:$res), + (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy), + "$res = OpArbitraryFloatLogALTERA $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">; +def OpArbitraryFloatLog2ALTERA: Op<5861, (outs ID:$res), + (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy), + "$res = OpArbitraryFloatLog2ALTERA $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">; +def OpArbitraryFloatLog10ALTERA: Op<5862, (outs ID:$res), + (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy), + "$res = OpArbitraryFloatLog10ALTERA $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">; +def OpArbitraryFloatLog1pALTERA: Op<5863, (outs ID:$res), + (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy), + "$res = OpArbitraryFloatLog1pALTERA $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">; +def OpArbitraryFloatExpALTERA: Op<5864, (outs ID:$res), + (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy), + "$res = OpArbitraryFloatExpALTERA $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">; +def OpArbitraryFloatExp2ALTERA: Op<5865, (outs ID:$res), + (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy), + "$res = OpArbitraryFloatExp2ALTERA $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">; +def OpArbitraryFloatExp10ALTERA: Op<5866, (outs ID:$res), + (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy), + "$res = OpArbitraryFloatExp10ALTERA $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">; +def OpArbitraryFloatExpm1ALTERA: Op<5867, (outs ID:$res), + (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy), + "$res = OpArbitraryFloatExpm1ALTERA $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">; +def OpArbitraryFloatSinALTERA: Op<5868, (outs ID:$res), + (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy), + "$res = OpArbitraryFloatSinALTERA $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">; +def OpArbitraryFloatCosALTERA: Op<5869, (outs ID:$res), + (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy), + "$res = OpArbitraryFloatCosALTERA $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">; +def OpArbitraryFloatSinCosALTERA: Op<5870, (outs ID:$res), + (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy), + "$res = OpArbitraryFloatSinCosALTERA $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">; +def OpArbitraryFloatSinPiALTERA: Op<5871, (outs ID:$res), + (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy), + "$res = OpArbitraryFloatSinPiALTERA $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">; +def OpArbitraryFloatCosPiALTERA: Op<5872, (outs ID:$res), + (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy), + "$res = OpArbitraryFloatCosPiALTERA $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">; +def OpArbitraryFloatSinCosPiALTERA: Op<5840, (outs ID:$res), + (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy), + "$res = OpArbitraryFloatSinCosPiALTERA $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">; +def OpArbitraryFloatAddALTERA: Op<5846, (outs ID:$res), + (ins TYPE:$type, ID:$src, i32imm:$src_mwidth, ID:$src2, i32imm:$src2_mwidth, i32imm:$res_mwidth, i32imm:$subnorm, i32imm:$fproundingmode, i32imm:$roundaccuracymode), + "$res = OpArbitraryFloatAddALTERA $type $src $src_mwidth $src2 $src2_mwidth $res_mwidth $subnorm $fproundingmode $roundaccuracymode">; +def OpArbitraryFloatSubALTERA: Op<5847, (outs ID:$res), (ins TYPE:$type, ID:$src, i32imm:$src_mwidth, ID:$src2, i32imm:$src2_mwidth, i32imm:$res_mwidth, i32imm:$subnorm, i32imm:$fproundingmode, i32imm:$roundaccuracymode), + "$res = OpArbitraryFloatSubALTERA $type $src $src_mwidth $src2 $src2_mwidth $res_mwidth $subnorm $fproundingmode $roundaccuracymode">; +def OpArbitraryFloatMulALTERA: Op<5848, (outs ID:$res), (ins TYPE:$type, ID:$src, i32imm:$src_mwidth, ID:$src2, i32imm:$src2_mwidth, i32imm:$res_mwidth, i32imm:$subnorm, i32imm:$fproundingmode, i32imm:$roundaccuracymode), + "$res = OpArbitraryFloatMulALTERA $type $src $src_mwidth $src2 $src2_mwidth $res_mwidth $subnorm $fproundingmode $roundaccuracymode">; +def OpArbitraryFloatDivALTERA: Op<5849, (outs ID:$res), (ins TYPE:$type, ID:$src, i32imm:$src_mwidth, ID:$src2, i32imm:$src2_mwidth, i32imm:$res_mwidth, i32imm:$subnorm, i32imm:$fproundingmode, i32imm:$roundaccuracymode), + "$res = OpArbitraryFloatDivALTERA $type $src $src_mwidth $src2 $src2_mwidth $res_mwidth $subnorm $fproundingmode $roundaccuracymode">; +def OpArbitraryFloatRSqrtALTERA: Op<5856, (outs ID:$res), (ins TYPE:$type, ID:$src, i32imm:$src_mwidth, i32imm:$res_mwidth, i32imm:$subnorm, i32imm:$fproundingmode, i32imm:$roundaccuracymode), + "$res = OpArbitraryFloatRSqrtALTERA $type $src $src_mwidth $res_mwidth $subnorm $fproundingmode $roundaccuracymode">; +def OpArbitraryFloatASinALTERA: Op<5873, (outs ID:$res), (ins TYPE:$type, ID:$src, i32imm:$src_mwidth, i32imm:$res_mwidth, i32imm:$subnorm, i32imm:$fproundingmode, i32imm:$roundaccuracymode), + "$res = OpArbitraryFloatASinALTERA $type $src $src_mwidth $res_mwidth $subnorm $fproundingmode $roundaccuracymode">; +def OpArbitraryFloatASinPiALTERA: Op<5874, (outs ID:$res), (ins TYPE:$type, ID:$src, i32imm:$src_mwidth, i32imm:$res_mwidth, i32imm:$subnorm, i32imm:$fproundingmode, i32imm:$roundaccuracymode), + "$res = OpArbitraryFloatASinPiALTERA $type $src $src_mwidth $res_mwidth $subnorm $fproundingmode $roundaccuracymode">; +def OpArbitraryFloatACosALTERA : Op<5875, (outs ID:$res), (ins TYPE:$type, ID:$src, i32imm:$src_mwidth, i32imm:$res_mwidth, i32imm:$subnorm, i32imm:$fproundingmode, i32imm:$roundaccuracymode), + "$res = OpArbitraryFloatACosALTERA $type $src $src_mwidth $res_mwidth $subnorm $fproundingmode $roundaccuracymode">; +def OpArbitraryFloatACosPiALTERA: Op<5876, (outs ID:$res), (ins TYPE:$type, ID:$src, i32imm:$src_mwidth, i32imm:$res_mwidth, i32imm:$subnorm, i32imm:$fproundingmode, i32imm:$roundaccuracymode), + "$res = OpArbitraryFloatACosPiALTERA $type $src $src_mwidth $res_mwidth $subnorm $fproundingmode $roundaccuracymode">; +def OpArbitraryFloatATanALTERA: Op<5877, (outs ID:$res), (ins TYPE:$type, ID:$src, i32imm:$src_mwidth, i32imm:$res_mwidth, i32imm:$subnorm, i32imm:$fproundingmode, i32imm:$roundaccuracymode), + "$res = OpArbitraryFloatATanALTERA $type $src $src_mwidth $res_mwidth $subnorm $fproundingmode $roundaccuracymode">; +def OpArbitraryFloatATanPiALTERA: Op<5878, (outs ID:$res), (ins TYPE:$type, ID:$src, i32imm:$src_mwidth, i32imm:$res_mwidth, i32imm:$subnorm, i32imm:$fproundingmode, i32imm:$roundaccuracymode), + "$res = OpArbitraryFloatATanPiALTERA $type $src $src_mwidth $res_mwidth $subnorm $fproundingmode $roundaccuracymode">; +def OpArbitraryFloatATan2ALTERA: Op<5879, (outs ID:$res), (ins TYPE:$type, ID:$src, i32imm:$src_mwidth, ID:$src2, i32imm:$src2_mwidth, i32imm:$res_mwidth, i32imm:$subnorm, i32imm:$fproundingmode, i32imm:$roundaccuracymode), + "$res = OpArbitraryFloatATan2ALTERA $type $src $src_mwidth $src2 $src2_mwidth $res_mwidth $subnorm $fproundingmode $roundaccuracymode">; +def OpArbitraryFloatPowALTERA: Op<5880, (outs ID:$res), (ins TYPE:$type, ID:$src, i32imm:$src_mwidth, ID:$src2, i32imm:$src2_mwidth, i32imm:$res_mwidth, i32imm:$subnorm, i32imm:$fproundingmode, i32imm:$roundaccuracymode), + "$res = OpArbitraryFloatPowALTERA $type $src $src_mwidth $src2 $src2_mwidth $res_mwidth $subnorm $fproundingmode $roundaccuracymode">; +def OpArbitraryFloatPowRALTERA: Op<5881, (outs ID:$res), (ins TYPE:$type, ID:$src, i32imm:$src_mwidth, ID:$src2, i1imm:$src2_sign, i32imm:$res_mwidth, i32imm:$subnorm, i32imm:$fproundingmode, i32imm:$roundaccuracymode), + "$res = OpArbitraryFloatPowRALTERA $type $src $src_mwidth $src2 $src2_sign $res_mwidth $subnorm $fproundingmode $roundaccuracymode">; +def OpArbitraryFloatPowNALTERA: Op<5882, (outs ID:$res), (ins TYPE:$type, ID:$src, i32imm:$src_mwidth, ID:$src2, i1imm:$src2_sign, i32imm:$res_mwidth, i32imm:$subnorm, i32imm:$fproundingmode, i32imm:$roundaccuracymode), + "$res = OpArbitraryFloatPowNALTERA $type $src $src_mwidth $src2 $src2_sign $res_mwidth $subnorm $fproundingmode $roundaccuracymode">; +def OpArbitraryFloatCastALTERA: Op<5841, (outs ID:$res), (ins TYPE:$type, ID:$src, i32imm:$src_mwidth, i32imm:$res_mwidth, i32imm:$subnorm, i32imm:$fproundingmode, i32imm:$roundignAccuracy), + "$res = OpArbitraryFloatCastALTERA $type $src $src_mwidth $res_mwidth $subnorm $fproundingmode $roundignAccuracy">; +def OpArbitraryFloatCastFromIntALTERA: Op<5842, (outs ID:$res), (ins TYPE:$type, ID:$src, i32imm:$res_mwidth, i32imm:$fromsign, i32imm:$subnormalmode, i32imm:$fproundingmode, i32imm:$roundignAccuracy), + "$res = OpArbitraryFloatCastFromIntALTERA $type $src $res_mwidth $fromsign $subnormalmode $fproundingmode $roundignAccuracy">; +def OpArbitraryFloatCastToIntALTERA: Op<5838, (outs ID:$res), (ins TYPE:$type, ID:$src, i32imm:$res_mwidth, i32imm:$tosign, i32imm:$subnormalmode, i32imm:$fproundingmode, i32imm:$roundignAccuracy), + "$res = OpArbitraryFloatCastToIntALTERA $type $src $res_mwidth $tosign $subnormalmode $fproundingmode $roundignAccuracy">; + // SPV_INTEL_2d_block_io def OpSubgroup2DBlockLoadINTEL: Op<6231, (outs), (ins ID:$element_size, ID:$block_width, ID:$block_height, ID:$block_count, ID:$src_base_ptr, ID:$memory_width, ID:$memory_height, ID:$memory_pitch, ID:$coord, ID:$dst_ptr), diff --git a/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp b/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp index b8cd9c1358f00..53979294c62b4 100644 --- a/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp @@ -2049,6 +2049,59 @@ void addInstrRequirements(const MachineInstr &MI, Reqs.addCapability(SPIRV::Capability::LongCompositesINTEL); break; } + case SPIRV::OpArbitraryFloatEQALTERA: + case SPIRV::OpArbitraryFloatGEALTERA: + case SPIRV::OpArbitraryFloatGTALTERA: + case SPIRV::OpArbitraryFloatLEALTERA: + case SPIRV::OpArbitraryFloatLTALTERA: + case SPIRV::OpArbitraryFloatCbrtALTERA: + case SPIRV::OpArbitraryFloatCosALTERA: + case SPIRV::OpArbitraryFloatCosPiALTERA: + case SPIRV::OpArbitraryFloatExp10ALTERA: + case SPIRV::OpArbitraryFloatExp2ALTERA: + case SPIRV::OpArbitraryFloatExpALTERA: + case SPIRV::OpArbitraryFloatExpm1ALTERA: + case SPIRV::OpArbitraryFloatHypotALTERA: + case SPIRV::OpArbitraryFloatLog10ALTERA: + case SPIRV::OpArbitraryFloatLog1pALTERA: + case SPIRV::OpArbitraryFloatLog2ALTERA: + case SPIRV::OpArbitraryFloatLogALTERA: + case SPIRV::OpArbitraryFloatRecipALTERA: + case SPIRV::OpArbitraryFloatSinCosALTERA: + case SPIRV::OpArbitraryFloatSinCosPiALTERA: + case SPIRV::OpArbitraryFloatSinALTERA: + case SPIRV::OpArbitraryFloatSinPiALTERA: + case SPIRV::OpArbitraryFloatSqrtALTERA: + case SPIRV::OpArbitraryFloatACosALTERA: + case SPIRV::OpArbitraryFloatACosPiALTERA: + case SPIRV::OpArbitraryFloatAddALTERA: + case SPIRV::OpArbitraryFloatASinALTERA: + case SPIRV::OpArbitraryFloatASinPiALTERA: + case SPIRV::OpArbitraryFloatATan2ALTERA: + case SPIRV::OpArbitraryFloatATanALTERA: + case SPIRV::OpArbitraryFloatATanPiALTERA: + case SPIRV::OpArbitraryFloatCastFromIntALTERA: + case SPIRV::OpArbitraryFloatCastALTERA: + case SPIRV::OpArbitraryFloatCastToIntALTERA: + case SPIRV::OpArbitraryFloatDivALTERA: + case SPIRV::OpArbitraryFloatMulALTERA: + case SPIRV::OpArbitraryFloatPowALTERA: + case SPIRV::OpArbitraryFloatPowNALTERA: + case SPIRV::OpArbitraryFloatPowRALTERA: + case SPIRV::OpArbitraryFloatRSqrtALTERA: + case SPIRV::OpArbitraryFloatSubALTERA: { + if (!ST.canUseExtension( + SPIRV::Extension::SPV_ALTERA_arbitrary_precision_floating_point)) + report_fatal_error( + "Floating point instructions can't be translated correctly without " + "enabled SPV_ALTERA_arbitrary_precision_floating_point extension!", + false); + Reqs.addExtension( + SPIRV::Extension::SPV_ALTERA_arbitrary_precision_floating_point); + Reqs.addCapability( + SPIRV::Capability::ArbitraryPrecisionFloatingPointALTERA); + break; + } case SPIRV::OpSubgroupMatrixMultiplyAccumulateINTEL: { if (!ST.canUseExtension( SPIRV::Extension::SPV_INTEL_subgroup_matrix_multiply_accumulate)) diff --git a/llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td b/llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td index f02a587013856..efefda6fead5d 100644 --- a/llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td +++ b/llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td @@ -389,6 +389,7 @@ defm SPV_INTEL_predicated_io : ExtensionOperand<127, [EnvOpenCL]>; defm SPV_KHR_maximal_reconvergence : ExtensionOperand<128, [EnvVulkan]>; defm SPV_INTEL_bfloat16_arithmetic : ExtensionOperand<129, [EnvVulkan, EnvOpenCL]>; +defm SPV_ALTERA_arbitrary_precision_floating_point: ExtensionOperand<131, [EnvOpenCL]>; defm SPV_INTEL_16bit_atomics : ExtensionOperand<130, [EnvVulkan, EnvOpenCL]>; //===----------------------------------------------------------------------===// @@ -615,6 +616,7 @@ defm BFloat16TypeKHR : CapabilityOperand<5116, 0, 0, [SPV_KHR_bfloat16], []>; defm BFloat16DotProductKHR : CapabilityOperand<5117, 0, 0, [SPV_KHR_bfloat16], [BFloat16TypeKHR]>; defm BFloat16CooperativeMatrixKHR : CapabilityOperand<5118, 0, 0, [SPV_KHR_bfloat16], [BFloat16TypeKHR, CooperativeMatrixKHR]>; defm BlockingPipesALTERA : CapabilityOperand<5945, 0, 0, [SPV_ALTERA_blocking_pipes], []>; +defm ArbitraryPrecisionFloatingPointALTERA : CapabilityOperand<5845, 0, 0,[SPV_ALTERA_arbitrary_precision_floating_point], []>; //===----------------------------------------------------------------------===// // Multiclass used to define SourceLanguage enum values and at the same time diff --git a/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_arbitrary_precision_floating_point/arbitrary_precision_floating_point_test.ll b/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_arbitrary_precision_floating_point/arbitrary_precision_floating_point_test.ll new file mode 100644 index 0000000000000..9c6afd3e74d42 --- /dev/null +++ b/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_arbitrary_precision_floating_point/arbitrary_precision_floating_point_test.ll @@ -0,0 +1,127 @@ +; RUN: llc -mtriple=spirv32-unknown-unknown --spirv-ext=+SPV_ALTERA_arbitrary_precision_floating_point,+SPV_INTEL_arbitrary_precision_integers %s -o - | FileCheck %s +; TODO: %if spirv-tools %{ llc -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_ALTERA_arbitrary_precision_floating_point,+SPV_INTEL_arbitrary_precision_integers %s -o - -filetype=obj | spirv-val %} + +; CHECK: OpCapability Kernel +; CHECK: OpCapability ArbitraryPrecisionFloatingPointALTERA +; CHECK: OpCapability ArbitraryPrecisionIntegersINTEL +; CHECK: OpExtension "SPV_ALTERA_arbitrary_precision_floating_point" +; CHECK: OpExtension "SPV_INTEL_arbitrary_precision_integers" + +; CHECK-DAG: OpTypeInt 4 0 +; CHECK-DAG: OpTypeInt 50 0 +; CHECK-DAG: OpTypeInt 56 0 +; CHECK-DAG: OpTypeInt 59 0 +; CHECK-DAG: OpTypeInt 5 0 +; CHECK-DAG: OpTypeInt 8 0 +; CHECK-DAG: OpTypeInt 10 0 +; CHECK-DAG: OpTypeInt 11 0 +; CHECK-DAG: OpTypeInt 13 0 +; CHECK-DAG: OpTypeInt 14 0 +; CHECK-DAG: OpTypeInt 15 0 +; CHECK-DAG: OpTypeInt 21 0 +; CHECK-DAG: OpTypeInt 25 0 +; CHECK-DAG: OpTypeInt 27 0 +; CHECK-DAG: OpTypeInt 34 0 +; CHECK-DAG: OpTypeInt 35 0 +; CHECK-DAG: OpTypeInt 38 0 +; CHECK-DAG: OpTypeInt 42 0 +; CHECK-DAG: OpTypeInt 44 0 +; CHECK-DAG: OpTypeInt 49 0 +; CHECK-DAG: OpTypeInt 62 0 +; CHECK-DAG: OpTypeInt 64 0 +; CHECK-DAG: OpTypeBool + +; CHECK: OpLabel +; CHECK: OpArbitraryFloatLogALTERA +; CHECK: OpArbitraryFloatLog2ALTERA +; CHECK: OpArbitraryFloatLog10ALTERA +; CHECK: OpArbitraryFloatLog1pALTERA +; CHECK: OpArbitraryFloatExpALTERA +; CHECK: OpArbitraryFloatExp2ALTERA +; CHECK: OpArbitraryFloatExp10ALTERA +; CHECK: OpArbitraryFloatExpm1ALTERA +; CHECK: OpArbitraryFloatSinALTERA +; CHECK: OpArbitraryFloatCosALTERA +; CHECK: OpArbitraryFloatSinCosALTERA +; CHECK: OpArbitraryFloatSinPiALTERA +; CHECK: OpArbitraryFloatCosPiALTERA +; CHECK: OpArbitraryFloatSinCosPiALTERA +; CHECK: OpArbitraryFloatASinALTERA +; CHECK: OpArbitraryFloatASinPiALTERA +; CHECK: OpArbitraryFloatACosALTERA +; CHECK: OpArbitraryFloatACosPiALTERA +; CHECK: OpArbitraryFloatATanALTERA +; CHECK: OpArbitraryFloatATanPiALTERA +; CHECK: OpArbitraryFloatATan2ALTERA +; CHECK: OpArbitraryFloatPowALTERA +; CHECK: OpArbitraryFloatPowRALTERA +; CHECK: OpArbitraryFloatPowNALTERA +; CHECK: OpArbitraryFloatPowNALTERA + +define dso_local spir_kernel void @_ZTSZ4mainE15kernel_function() { +entry: + %0 = alloca i64, align 8 + %1 = alloca i64, align 8 + %2 = alloca i8, align 1 + call spir_func void @ap_float_ops(i64* %0, i64* %1, i8* %2) + ret void +} + +define internal spir_func void @ap_float_ops(i64* %in1, i64* %in2, i8* %out) { +entry: + %0 = load i64, ptr %in1, align 8 + %1 = load i64, ptr %in2, align 8 + %log = call spir_func i50 @_Z30__spirv_ArbitraryFloatLogALTERAILi50ELi50EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i64 %0, i32 19, i32 30, i32 0, i32 2, i32 1) + %log2 = call spir_func i38 @_Z31__spirv_ArbitraryFloatLog2ALTERAILi38ELi38EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i50 %log, i32 20, i32 19, i32 0, i32 2, i32 1) + %log10 = call spir_func signext i10 @_Z32__spirv_ArbitraryFloatLog10ALTERAILi8ELi10EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i38 %log2, i32 3, i32 5, i32 0, i32 2, i32 1) + %log1p = call spir_func i49 @_Z32__spirv_ArbitraryFloatLog1pALTERAILi48ELi49EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i50 %log, i32 30, i32 30, i32 0, i32 2, i32 1) + %exp = call spir_func i42 @_Z30__spirv_ArbitraryFloatExpALTERAILi42ELi42EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i49 %log1p, i32 25, i32 25, i32 0, i32 2, i32 1) + %exp2 = call spir_func signext i5 @_Z31__spirv_ArbitraryFloatExp2ALTERAILi3ELi5EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i10 %log10, i32 1, i32 2, i32 0, i32 2, i32 1) + %exp10 = call spir_func signext i25 @_Z32__spirv_ArbitraryFloatExp10ALTERAILi25ELi25EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i42 %exp, i32 16, i32 16, i32 0, i32 2, i32 1) + %expm1 = call spir_func i62 @_Z32__spirv_ArbitraryFloatExpm1ALTERAILi64ELi62EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i64 %0, i32 42, i32 41, i32 0, i32 2, i32 1) + %sin = call spir_func i34 @_Z30__spirv_ArbitraryFloatSinALTERAILi30ELi34EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i25 %exp10, i32 15, i32 17, i32 0, i32 2, i32 1) + %cos = call spir_func signext i4 @_Z30__spirv_ArbitraryFloatCosALTERAILi4ELi4EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i5 %exp2, i32 2, i32 1, i32 0, i32 2, i32 1) + %sincos = call spir_func i62 @_Z33__spirv_ArbitraryFloatSinCosALTERAILi27ELi31EEU7_ExtIntIXmlLi2ET0_EEiU7_ExtIntIXT_EEiiiiii(i34 %sin, i32 18, i32 20, i32 0, i32 2, i32 1) + %sinpi = call spir_func signext i13 @_Z32__spirv_ArbitraryFloatSinPiALTERAILi10ELi13EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i10 %log10, i32 6, i32 6, i32 0, i32 2, i32 1) + %cospi = call spir_func i59 @_Z32__spirv_ArbitraryFloatCosPiALTERAILi59ELi59EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i62 %expm1, i32 40, i32 40, i32 0, i32 2, i32 1) + %sincospi = call spir_func i64 @_Z35__spirv_ArbitraryFloatSinCosPiALTERAILi30ELi32EEU7_ExtIntIXmlLi2ET0_EEiU7_ExtIntIXT_EEiiiiii(i34 %sin, i32 20, i32 20, i32 0, i32 2, i32 1) + %asin = call spir_func signext i11 @_Z31__spirv_ArbitraryFloatASinALTERAILi7ELi11EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i4 %cos, i32 4, i32 8, i32 0, i32 2, i32 1) + %asinpi = call spir_func i35 @_Z33__spirv_ArbitraryFloatASinPiALTERAILi35ELi35EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i49 %log1p, i32 23, i32 23, i32 0, i32 2, i32 1) + %acos = call spir_func signext i14 @_Z31__spirv_ArbitraryFloatACosALTERAILi14ELi14EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i13 %sinpi, i32 9, i32 10, i32 0, i32 2, i32 1) + %acospi = call spir_func signext i8 @_Z33__spirv_ArbitraryFloatACosPiALTERAILi8ELi8EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i38 %log2, i32 5, i32 4, i32 0, i32 2, i32 1) + %atan = call spir_func i44 @_Z31__spirv_ArbitraryFloatATanALTERAILi44ELi44EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i59 %cospi, i32 31, i32 31, i32 0, i32 2, i32 1) + %atanpi = call spir_func i34 @_Z33__spirv_ArbitraryFloatATanPiALTERAILi40ELi34EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i50 %log, i32 38, i32 32, i32 0, i32 2, i32 1) + %atan2 = call spir_func signext i27 @_Z32__spirv_ArbitraryFloatATan2ALTERAILi24ELi25ELi27EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i25 %exp10, i32 16, i42 %exp, i32 17, i32 18, i32 0, i32 2, i32 1) + %pow = call spir_func signext i21 @_Z30__spirv_ArbitraryFloatPowALTERAILi17ELi19ELi21EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i34 %sin, i32 8, i38 %log2, i32 9, i32 10, i32 0, i32 2, i32 1) + %powr = call spir_func i56 @_Z31__spirv_ArbitraryFloatPowRALTERAILi54ELi55ELi56EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i59 %cospi, i32 35, i49 %log1p, i32 35, i32 35, i32 0, i32 2, i32 1) + %pown = call spir_func signext i15 @_Z31__spirv_ArbitraryFloatPowNALTERAILi12ELi10ELi15EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiii(i14 %acos, i32 7, i10 %log10, i1 zeroext false, i32 9, i32 0, i32 2, i32 1) + %pown2 = call spir_func signext i15 @_Z31__spirv_ArbitraryFloatPowNALTERAILi64ELi10ELi15EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiii(i64 %0, i32 7, i10 %log10, i1 zeroext true, i32 9, i32 0, i32 2, i32 1) + %final = trunc i15 %pown2 to i8 + store i8 %final, ptr %out, align 1 + ret void +} +declare dso_local spir_func i50 @_Z30__spirv_ArbitraryFloatLogALTERAILi50ELi50EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i50, i32, i32, i32, i32, i32) +declare dso_local spir_func i38 @_Z31__spirv_ArbitraryFloatLog2ALTERAILi38ELi38EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i50, i32, i32, i32, i32, i32) +declare dso_local spir_func signext i10 @_Z32__spirv_ArbitraryFloatLog10ALTERAILi8ELi10EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i38 signext, i32, i32, i32, i32, i32) +declare dso_local spir_func i49 @_Z32__spirv_ArbitraryFloatLog1pALTERAILi48ELi49EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i50, i32, i32, i32, i32, i32) +declare dso_local spir_func i42 @_Z30__spirv_ArbitraryFloatExpALTERAILi42ELi42EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i42, i32, i32, i32, i32, i32) +declare dso_local spir_func signext i5 @_Z31__spirv_ArbitraryFloatExp2ALTERAILi3ELi5EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i10 signext, i32, i32, i32, i32, i32) +declare dso_local spir_func signext i25 @_Z32__spirv_ArbitraryFloatExp10ALTERAILi25ELi25EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i42 signext, i32, i32, i32, i32, i32) +declare dso_local spir_func i62 @_Z32__spirv_ArbitraryFloatExpm1ALTERAILi64ELi62EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i64, i32, i32, i32, i32, i32) +declare dso_local spir_func i34 @_Z30__spirv_ArbitraryFloatSinALTERAILi30ELi34EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i25 signext, i32, i32, i32, i32, i32) +declare dso_local spir_func signext i4 @_Z30__spirv_ArbitraryFloatCosALTERAILi4ELi4EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i5 signext, i32, i32, i32, i32, i32) +declare dso_local spir_func i62 @_Z33__spirv_ArbitraryFloatSinCosALTERAILi27ELi31EEU7_ExtIntIXmlLi2ET0_EEiU7_ExtIntIXT_EEiiiiii(i34 signext, i32, i32, i32, i32, i32) +declare dso_local spir_func signext i13 @_Z32__spirv_ArbitraryFloatSinPiALTERAILi10ELi13EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i10 signext, i32, i32, i32, i32, i32) +declare dso_local spir_func i59 @_Z32__spirv_ArbitraryFloatCosPiALTERAILi59ELi59EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i62, i32, i32, i32, i32, i32) +declare dso_local spir_func i64 @_Z35__spirv_ArbitraryFloatSinCosPiALTERAILi30ELi32EEU7_ExtIntIXmlLi2ET0_EEiU7_ExtIntIXT_EEiiiiii(i34 signext, i32, i32, i32, i32, i32) +declare dso_local spir_func signext i11 @_Z31__spirv_ArbitraryFloatASinALTERAILi7ELi11EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i4 signext, i32, i32, i32, i32, i32) +declare dso_local spir_func i35 @_Z33__spirv_ArbitraryFloatASinPiALTERAILi35ELi35EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i49, i32, i32, i32, i32, i32) +declare dso_local spir_func signext i14 @_Z31__spirv_ArbitraryFloatACosALTERAILi14ELi14EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i13 signext, i32, i32, i32, i32, i32) +declare dso_local spir_func signext i8 @_Z33__spirv_ArbitraryFloatACosPiALTERAILi8ELi8EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i38 signext, i32, i32, i32, i32, i32) +declare dso_local spir_func i44 @_Z31__spirv_ArbitraryFloatATanALTERAILi44ELi44EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i59, i32, i32, i32, i32, i32) +declare dso_local spir_func i34 @_Z33__spirv_ArbitraryFloatATanPiALTERAILi40ELi34EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i25, i32, i32, i32, i32, i32) +declare dso_local spir_func signext i27 @_Z32__spirv_ArbitraryFloatATan2ALTERAILi24ELi25ELi27EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i25 signext, i32, i25 signext, i32, i32, i32, i32, i32) +declare dso_local spir_func signext i21 @_Z30__spirv_ArbitraryFloatPowALTERAILi17ELi19ELi21EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i17 signext, i32, i19 signext, i32, i32, i32, i32, i32) +declare dso_local spir_func i56 @_Z31__spirv_ArbitraryFloatPowRALTERAILi54ELi55ELi56EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i59, i32, i55, i32, i32, i32, i32, i32) +declare dso_local spir_func signext i15 @_Z31__spirv_ArbitraryFloatPowNALTERAILi12ELi10ELi15EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiii(i14 signext, i32, i10 signext, i1 zeroext, i32, i32, i32, i32) +declare dso_local spir_func signext i15 @_Z31__spirv_ArbitraryFloatPowNALTERAILi64ELi10ELi15EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiii(i64, i32, i10 signext, i1 zeroext, i32, i32, i32, i32) diff --git a/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_arbitrary_precision_floating_point/arbitrary_precision_floating_point_test_extended.ll b/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_arbitrary_precision_floating_point/arbitrary_precision_floating_point_test_extended.ll new file mode 100644 index 0000000000000..607e360378f0a --- /dev/null +++ b/llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_arbitrary_precision_floating_point/arbitrary_precision_floating_point_test_extended.ll @@ -0,0 +1,96 @@ +; RUN: llc -mtriple=spirv32-unknown-unknown --spirv-ext=+SPV_ALTERA_arbitrary_precision_floating_point,+SPV_INTEL_arbitrary_precision_integers %s -o - | FileCheck %s +; TODO: %if spirv-tools %{ llc -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_ALTERA_arbitrary_precision_floating_point,+SPV_INTEL_arbitrary_precision_integers %s -o - -filetype=obj | spirv-val %} + +; CHECK: OpCapability Kernel +; CHECK: OpCapability ArbitraryPrecisionFloatingPointALTERA +; CHECK: OpCapability ArbitraryPrecisionIntegersINTEL +; CHECK: OpExtension "SPV_ALTERA_arbitrary_precision_floating_point" +; CHECK: OpExtension "SPV_INTEL_arbitrary_precision_integers" + +; CHECK-DAG: OpTypeInt 2 0 +; CHECK-DAG: OpTypeInt 13 0 +; CHECK-DAG: OpTypeInt 14 0 +; CHECK-DAG: OpTypeInt 17 0 +; CHECK-DAG: OpTypeInt 18 0 +; CHECK-DAG: OpTypeInt 25 0 +; CHECK-DAG: OpTypeInt 30 0 +; CHECK-DAG: OpTypeInt 34 0 +; CHECK-DAG: OpTypeInt 39 0 +; CHECK-DAG: OpTypeInt 40 0 +; CHECK-DAG: OpTypeInt 42 0 +; CHECK-DAG: OpTypeInt 51 0 +; CHECK-DAG: OpTypeBool + +; CHECK: OpFunction +; CHECK: OpLabel +; CHECK: OpArbitraryFloatCastALTERA +; CHECK: OpArbitraryFloatCastFromIntALTERA +; CHECK: OpArbitraryFloatCastToIntALTERA +; CHECK: OpArbitraryFloatAddALTERA +; CHECK: OpArbitraryFloatSubALTERA +; CHECK: OpArbitraryFloatMulALTERA +; CHECK: OpArbitraryFloatDivALTERA +; CHECK: OpArbitraryFloatGTALTERA +; CHECK: OpArbitraryFloatGEALTERA +; CHECK: OpArbitraryFloatLTALTERA +; CHECK: OpArbitraryFloatLEALTERA +; CHECK: OpArbitraryFloatEQALTERA +; CHECK: OpArbitraryFloatRecipALTERA +; CHECK: OpArbitraryFloatRSqrtALTERA +; CHECK: OpArbitraryFloatCbrtALTERA +; CHECK: OpArbitraryFloatHypotALTERA +; CHECK: OpArbitraryFloatSqrtALTERA + +define dso_local spir_kernel void @test() { +entry: + %0 = alloca i63, align 8 + %1 = alloca i63, align 8 + %2 = alloca i8, align 1 + call spir_func void @ap_float_ops(i63* %0, i63* %1, i8* %2) + ret void +} + +define internal spir_func void @ap_float_ops(i63* %in1, i63* %in2, i8* %out) { +entry: + %0 = load i63, ptr %in1, align 8 + %1 = load i63, ptr %in2, align 8 + %cast = call spir_func i40 @_Z31__spirv_ArbitraryFloatCastALTERAILi63ELi40EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i63 %0, i32 28, i32 30, i32 0, i32 2, i32 1) + %cast_from_int = call spir_func signext i25 @_Z38__spirv_ArbitraryFloatCastFromIntALTERAILi40ELi25EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiibiii(i40 %cast, i32 16, i1 zeroext false, i32 0, i32 2, i32 1) + %cast_to_int = call spir_func signext i30 @_Z36__spirv_ArbitraryFloatCastToIntALTERAILi25ELi30EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiibiii(i25 signext %cast_from_int, i32 15, i1 zeroext true, i32 0, i32 2, i32 1) + %add = call spir_func signext i14 @_Z30__spirv_ArbitraryFloatAddALTERAILi30ELi40ELi14EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i30 signext %cast_to_int, i32 7, i40 %cast, i32 8, i32 9, i32 0, i32 2, i32 1) + %sub = call spir_func signext i13 @_Z30__spirv_ArbitraryFloatSubALTERAILi14ELi30ELi13EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i14 signext %add, i32 4, i30 signext %cast_to_int, i32 5, i32 6, i32 0, i32 2, i32 1) + %mul = call spir_func i51 @_Z30__spirv_ArbitraryFloatMulALTERAILi63ELi63ELi51EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i63 %0, i32 34, i63 %1, i32 34, i32 34, i32 0, i32 2, i32 1) + %div = call spir_func signext i18 @_Z30__spirv_ArbitraryFloatDivALTERAILi51ELi40ELi18EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i51 signext %mul, i32 11, i40 signext %cast, i32 11, i32 12, i32 0, i32 2, i32 1) + %gt = call spir_func zeroext i1 @_Z29__spirv_ArbitraryFloatGTALTERAILi63ELi63EEbU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEii(i63 %0, i32 42, i63 %1, i32 41) + %ge = call spir_func zeroext i1 @_Z29__spirv_ArbitraryFloatGEALTERAILi51ELi40EEbU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEii(i51 %mul, i32 27, i40 %cast, i32 27) + %lt = call spir_func zeroext i1 @_Z29__spirv_ArbitraryFloatLTALTERAILi14ELi30EEbU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEii(i14 signext %add, i32 2, i30 signext %cast_to_int, i32 3) + %le = call spir_func zeroext i1 @_Z29__spirv_ArbitraryFloatLEALTERAILi51ELi40EEbU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEii(i51 %mul, i32 27, i40 %cast, i32 28) + %eq = call spir_func zeroext i1 @_Z29__spirv_ArbitraryFloatEQALTERAILi18ELi14EEbU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEii(i18 signext %div, i32 12, i14 signext %add, i32 7) + %recip = call spir_func i39 @_Z32__spirv_ArbitraryFloatRecipALTERAILi40ELi39EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i40 %cast, i32 29, i32 29, i32 0, i32 2, i32 1) + %rsqrt = call spir_func i34 @_Z32__spirv_ArbitraryFloatRSqrtALTERAILi39ELi34EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i39 %recip, i32 19, i32 20, i32 0, i32 2, i32 1) + %cbrt = call spir_func signext i2 @_Z31__spirv_ArbitraryFloatCbrtALTERAILi13ELi2EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i13 signext %sub, i32 1, i32 1, i32 0, i32 2, i32 1) + %hypot = call spir_func i42 @_Z32__spirv_ArbitraryFloatHypotALTERAILi40ELi40ELi42EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i40 %cast, i32 20, i40 %cast, i32 21, i32 22, i32 0, i32 2, i32 1) + %sqrt = call spir_func signext i17 @_Z31__spirv_ArbitraryFloatSqrtALTERAILi14ELi17EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i14 signext %add, i32 7, i32 8, i32 0, i32 2, i32 1) + %sin = call spir_func signext i17 @_Z31__spirv_ArbitraryFloatSinALTERAILi17ELi17EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i17 signext %sqrt, i32 7, i32 8, i32 0, i32 2, i32 1) + %final = zext i1 %gt to i8 + store i8 %final, ptr %out, align 1 + ret void +} +declare dso_local spir_func i40 @_Z31__spirv_ArbitraryFloatCastALTERAILi63ELi40EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i63, i32, i32, i32, i32, i32) +declare dso_local spir_func signext i25 @_Z38__spirv_ArbitraryFloatCastFromIntALTERAILi40ELi25EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiibiii(i40, i32, i1 zeroext, i32, i32, i32) +declare dso_local spir_func signext i30 @_Z36__spirv_ArbitraryFloatCastToIntALTERAILi25ELi30EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiibiii(i25 signext, i32, i1 zeroext, i32, i32, i32) +declare dso_local spir_func signext i14 @_Z30__spirv_ArbitraryFloatAddALTERAILi30ELi40ELi14EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i30 signext, i32, i40, i32, i32, i32, i32, i32) +declare dso_local spir_func signext i13 @_Z30__spirv_ArbitraryFloatSubALTERAILi14ELi30ELi13EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i14 signext, i32, i30 signext, i32, i32, i32, i32, i32) +declare dso_local spir_func i51 @_Z30__spirv_ArbitraryFloatMulALTERAILi63ELi63ELi51EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i63, i32, i63, i32, i32, i32, i32, i32) +declare dso_local spir_func signext i18 @_Z30__spirv_ArbitraryFloatDivALTERAILi51ELi40ELi18EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i51 signext, i32, i40 signext, i32, i32, i32, i32, i32) +declare dso_local spir_func zeroext i1 @_Z29__spirv_ArbitraryFloatGTALTERAILi63ELi63EEbU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEii(i63, i32, i63, i32) +declare dso_local spir_func zeroext i1 @_Z29__spirv_ArbitraryFloatGEALTERAILi51ELi40EEbU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEii(i51, i32, i40, i32) +declare dso_local spir_func zeroext i1 @_Z29__spirv_ArbitraryFloatLTALTERAILi14ELi30EEbU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEii(i14 signext, i32, i30 signext, i32) +declare dso_local spir_func zeroext i1 @_Z29__spirv_ArbitraryFloatLEALTERAILi51ELi40EEbU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEii(i51, i32, i40, i32) +declare dso_local spir_func zeroext i1 @_Z29__spirv_ArbitraryFloatEQALTERAILi18ELi14EEbU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEii(i18 signext, i32, i14 signext, i32) +declare dso_local spir_func i39 @_Z32__spirv_ArbitraryFloatRecipALTERAILi40ELi39EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i40, i32, i32, i32, i32, i32) +declare dso_local spir_func i34 @_Z32__spirv_ArbitraryFloatRSqrtALTERAILi39ELi34EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i39, i32, i32, i32, i32, i32) +declare dso_local spir_func signext i2 @_Z31__spirv_ArbitraryFloatCbrtALTERAILi13ELi2EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i13 signext, i32, i32, i32, i32, i32) +declare dso_local spir_func i42 @_Z32__spirv_ArbitraryFloatHypotALTERAILi40ELi40ELi42EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i40, i32, i40, i32, i32, i32, i32, i32) +declare dso_local spir_func signext i17 @_Z31__spirv_ArbitraryFloatSqrtALTERAILi14ELi17EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i14 signext, i32, i32, i32, i32, i32) +declare dso_local spir_func signext i17 @_Z31__spirv_ArbitraryFloatSinALTERAILi17ELi17EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i17 signext, i32, i32, i32, i32, i32)