Skip to content

[SPIRV] Added Support for the SPV_INTEL_arbitrary_precesion_floating_point Extension #160054

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
wants to merge 6 commits into
base: main
Choose a base branch
from
Open

[SPIRV] Added Support for the SPV_INTEL_arbitrary_precesion_floating_point Extension #160054

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
6 commits
Select commit Hold shift + click to select a range
a48acd3
[SPIRV] Added Support for the SPV_INTEL_arbitrary_precesion_floating_…
SubashBoopathi Aug 20, 2025
864bb08
Resolved the conflicts in the llvm project
SubashBoopathi Sep 22, 2025
e6f0707
Renamed the intel extensions to Altera for extensions, capabilities a…
SubashBoopathi Nov 6, 2025
50365ff
Renamed intel extension to altera for extensions, capabilities and In…
SubashBoopathi Nov 6, 2025
6a97026
Renamed Intel arbitrary floating point extensions, capaility and inst…
SubashBoopathi Nov 7, 2025
b61983b
Merge branch 'main' into spv_intel_arbitrary_floating_points
SubashBoopathi Nov 11, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
45 changes: 45 additions & 0 deletions llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -2853,6 +2853,49 @@ static bool generateVectorLoadStoreInst(const SPIRV::IncomingCall *Call,
return true;
}

static bool generateAFPInst(const SPIRV::IncomingCall *Call,
MachineIRBuilder &MIRBuilder,
SPIRVGlobalRegistry *GR) {
const auto *Builtin = Call->Builtin;
auto *MRI = MIRBuilder.getMRI();
unsigned Opcode =
SPIRV::lookupNativeBuiltin(Builtin->Name, Builtin->Set)->Opcode;
const Type *RetTy = GR->getTypeForSPIRVType(Call->ReturnType);
bool IsVoid = RetTy->isVoidTy();
auto MIB = MIRBuilder.buildInstr(Opcode);
Register DestReg;
if (IsVoid) {
LLT PtrTy = MRI->getType(Call->Arguments[0]);
DestReg = MRI->createGenericVirtualRegister(PtrTy);
MRI->setRegClass(DestReg, &SPIRV::pIDRegClass);
SPIRVType *PointeeTy =
GR->getPointeeType(GR->getSPIRVTypeForVReg(Call->Arguments[0]));
MIB.addDef(DestReg);
MIB.addUse(GR->getSPIRVTypeID(PointeeTy));
} else {
MIB.addDef(Call->ReturnRegister);
MIB.addUse(GR->getSPIRVTypeID(Call->ReturnType));
}
for (unsigned i = IsVoid ? 1 : 0; i < Call->Arguments.size(); ++i) {
Register Arg = Call->Arguments[i];
MachineInstr *DefMI = MRI->getUniqueVRegDef(Arg);
if (DefMI->getOpcode() == TargetOpcode::G_CONSTANT &&
DefMI->getOperand(1).isCImm()) {
MIB.addImm(getConstFromIntrinsic(Arg, MRI));
} else {
MIB.addUse(Arg);
}
}
if (IsVoid) {
LLT PtrTy = MRI->getType(Call->Arguments[0]);
MachineMemOperand *MMO = MIRBuilder.getMF().getMachineMemOperand(
MachinePointerInfo(), MachineMemOperand::MOStore,
PtrTy.getSizeInBytes(), Align(4));
MIRBuilder.buildStore(DestReg, Call->Arguments[0], *MMO);
}
return true;
}

static bool generateLoadStoreInst(const SPIRV::IncomingCall *Call,
MachineIRBuilder &MIRBuilder,
SPIRVGlobalRegistry *GR) {
Expand Down Expand Up @@ -3061,6 +3104,8 @@ std::optional<bool> lowerBuiltin(const StringRef DemangledCall,
return generatePredicatedLoadStoreInst(Call.get(), MIRBuilder, GR);
case SPIRV::BlockingPipes:
return generateBlockingPipesInst(Call.get(), MIRBuilder, GR);
case SPIRV::ArbitraryFloatingPoint:
return generateAFPInst(Call.get(), MIRBuilder, GR);
}
return false;
}
Expand Down
44 changes: 44 additions & 0 deletions llvm/lib/Target/SPIRV/SPIRVBuiltins.td
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -72,6 +72,7 @@ def Block2DLoadStore : BuiltinGroup;
def Pipe : BuiltinGroup;
def PredicatedLoadStore : BuiltinGroup;
def BlockingPipes : BuiltinGroup;
def ArbitraryFloatingPoint: BuiltinGroup;

//===----------------------------------------------------------------------===//
// Class defining a demangled builtin record. The information in the record
Expand Down Expand Up @@ -739,6 +740,49 @@ defm : DemangledNativeBuiltin<"__spirv_CooperativeMatrixStoreCheckedINTEL", Open
defm : DemangledNativeBuiltin<"__spirv_CooperativeMatrixConstructCheckedINTEL", OpenCL_std, CoopMatr, 5, 5, OpCooperativeMatrixConstructCheckedINTEL>;
defm : DemangledNativeBuiltin<"__spirv_CooperativeMatrixGetElementCoordINTEL", OpenCL_std, CoopMatr, 2, 2, OpCooperativeMatrixGetElementCoordINTEL>;

// Arbitrary Precision Floating Point builtin records:
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatGTALTER", OpenCL_std, ArbitraryFloatingPoint, 4, 4, OpArbitraryFloatGTALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatGEALTER", OpenCL_std, ArbitraryFloatingPoint, 4, 4, OpArbitraryFloatGEALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatLTALTER", OpenCL_std, ArbitraryFloatingPoint, 4, 4, OpArbitraryFloatLTALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatLEALTER", OpenCL_std, ArbitraryFloatingPoint, 4, 4, OpArbitraryFloatLEALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatEQALTER", OpenCL_std, ArbitraryFloatingPoint, 4, 4, OpArbitraryFloatEQALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatRecipALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatRecipALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatCbrtALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatCbrtALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatHypotALTER", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatHypotALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatSqrtALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatSqrtALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatLogALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatLogALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatLog2ALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatLog2ALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatLog10ALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatLog10ALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatLog1pALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatLog1pALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatExpALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatExpALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatExp2ALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatExp2ALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatExp10ALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatExp10ALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatExpm1ALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatExpm1ALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatSinALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatSinALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatCosALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatCosALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatSinCosALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatSinCosALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatSinPiALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatSinPiALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatCosPiALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatCosPiALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatSinCosPiALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatSinCosPiALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatAddALTER", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatAddALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatSubALTER", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatSubALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatMulALTER", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatMulALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatDivALTER", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatDivALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatRSqrtALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatRSqrtALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatASinALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatASinALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatASinPiALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatASinPiALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatACosALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatACosALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatACosPiALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatACosPiALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatATanALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatATanALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatATanPiALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatATanPiALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatATan2ALTER", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatATan2ALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatPowALTER", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatPowALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatPowRALTER", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatPowRALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatPowNALTER", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatPowNALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatCastALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatCastALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatCastFromIntALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatCastFromIntALTERA>;
defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatCastToIntALTER", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatCastToIntALTERA>;

// SPV_INTEL_bindless_images builtin records:
defm : DemangledNativeBuiltin<"__spirv_ConvertHandleToImageINTEL", OpenCL_std, BindlessINTEL, 1, 1, OpConvertHandleToImageINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ConvertHandleToSamplerINTEL", OpenCL_std, BindlessINTEL, 1, 1, OpConvertHandleToSamplerINTEL>;
Expand Down
3 changes: 3 additions & 0 deletions llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -55,6 +55,9 @@ static const std::map<std::string, SPIRV::Extension::Extension, std::less<>>
SPIRV::Extension::Extension::SPV_GOOGLE_user_type},
{"SPV_INTEL_arbitrary_precision_integers",
SPIRV::Extension::Extension::SPV_INTEL_arbitrary_precision_integers},
{"SPV_ALTERA_arbitrary_precision_floating_point",
SPIRV::Extension::Extension::
SPV_ALTERA_arbitrary_precision_floating_point},
{"SPV_INTEL_cache_controls",
SPIRV::Extension::Extension::SPV_INTEL_cache_controls},
{"SPV_INTEL_float_controls2",
Expand Down
Loading
Loading