From ef6132a64f51e74cc6d2710447957e6f3eac9f21 Mon Sep 17 00:00:00 2001 From: Ryan Cowan Date: Mon, 22 Sep 2025 09:06:48 +0000 Subject: [PATCH 1/7] [AArch64][GlobalISel] Add `G_MODF` instruction --- .../llvm/CodeGen/GlobalISel/LegalizerHelper.h | 4 + .../CodeGen/GlobalISel/MachineIRBuilder.h | 7 + llvm/include/llvm/Support/TargetOpcodes.def | 3 + llvm/include/llvm/Target/GenericOpcodes.td | 7 + llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 7 + .../CodeGen/GlobalISel/LegalizerHelper.cpp | 71 ++++++ .../AArch64/GISel/AArch64LegalizerInfo.cpp | 2 +- .../Target/SPIRV/SPIRVInstructionSelector.cpp | 12 +- llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp | 1 + .../AArch64/GlobalISel/irtranslator-modf.ll | 140 ++++++++++++ .../AArch64/GlobalISel/legalize-modf.mir | 206 ++++++++++++++++++ .../GlobalISel/legalizer-info-validation.mir | 4 + .../AArch64/GlobalISel/select-modf.mir | 136 ++++++++++++ llvm/test/CodeGen/AArch64/llvm.modf.ll | 203 +++++++++++++++++ .../GlobalISel/legalizer-info-validation.mir | 7 +- .../match-table-cxx.td | 132 +++++------ 16 files changed, 867 insertions(+), 75 deletions(-) create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-modf.ll create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/legalize-modf.mir create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/select-modf.mir diff --git a/llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h b/llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h index 22569aab236af..c0e426c4a8db3 100644 --- a/llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h +++ b/llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h @@ -300,6 +300,10 @@ class LegalizerHelper { Type *OpType, LostDebugLocObserver &LocObserver); + LegalizeResult emitModfLibcall(MachineInstr &MI, MachineIRBuilder &MIRBuilder, + unsigned Size, Type *OpType, + LostDebugLocObserver &LocObserver); + public: /// Return the alignment to use for a stack temporary object with the given /// type. diff --git a/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h b/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h index 0b6033b4ba60a..40c7792f7e8a2 100644 --- a/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h +++ b/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h @@ -2184,6 +2184,13 @@ class LLVM_ABI MachineIRBuilder { return buildInstr(TargetOpcode::G_FSINCOS, {Sin, Cos}, {Src}, Flags); } + /// Build and insert \p Fract, \p Int = G_FMODF \p Src + MachineInstrBuilder buildModf(const DstOp &Fract, const DstOp &Int, + const SrcOp &Src, + std::optional Flags = std::nullopt) { + return buildInstr(TargetOpcode::G_FMODF, {Fract, Int}, {Src}, Flags); + } + /// Build and insert \p Res = G_FCOPYSIGN \p Op0, \p Op1 MachineInstrBuilder buildFCopysign(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1) { diff --git a/llvm/include/llvm/Support/TargetOpcodes.def b/llvm/include/llvm/Support/TargetOpcodes.def index 7710e2fc2f22b..e55314568d683 100644 --- a/llvm/include/llvm/Support/TargetOpcodes.def +++ b/llvm/include/llvm/Support/TargetOpcodes.def @@ -650,6 +650,9 @@ HANDLE_TARGET_OPCODE(G_FDIV) /// Generic FP remainder. HANDLE_TARGET_OPCODE(G_FREM) +/// Generic FP modf +HANDLE_TARGET_OPCODE(G_FMODF) + /// Generic FP exponentiation. HANDLE_TARGET_OPCODE(G_FPOW) diff --git a/llvm/include/llvm/Target/GenericOpcodes.td b/llvm/include/llvm/Target/GenericOpcodes.td index 733d10b1c5f3c..faf77880e4614 100644 --- a/llvm/include/llvm/Target/GenericOpcodes.td +++ b/llvm/include/llvm/Target/GenericOpcodes.td @@ -981,6 +981,13 @@ def G_FREM : GenericInstruction { let hasSideEffects = false; } +/// Generic FP modf +def G_FMODF : GenericInstruction { + let OutOperandList = (outs type0:$dst1, type0:$dst2); + let InOperandList = (ins type0:$src1); + let hasSideEffects = false; +} + // Floating point exponentiation. def G_FPOW : GenericInstruction { let OutOperandList = (outs type0:$dst); diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp index 56e13f075aaac..884c3f1692e94 100644 --- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp +++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -2362,6 +2362,13 @@ bool IRTranslator::translateKnownIntrinsic(const CallInst &CI, Intrinsic::ID ID, MachineInstr::copyFlagsFromInstruction(CI)); return true; } + case Intrinsic::modf: { + ArrayRef VRegs = getOrCreateVRegs(CI); + MIRBuilder.buildModf(VRegs[0], VRegs[1], + getOrCreateVReg(*CI.getArgOperand(0)), + MachineInstr::copyFlagsFromInstruction(CI)); + return true; + } case Intrinsic::sincos: { ArrayRef VRegs = getOrCreateVRegs(CI); MIRBuilder.buildFSincos(VRegs[0], VRegs[1], diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp index 03dfa6f3f243f..ddeaa52d5fea0 100644 --- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp +++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp @@ -471,6 +471,8 @@ static RTLIB::Libcall getRTLibDesc(unsigned Opcode, unsigned Size) { RTLIBCASE(TANH_F); case TargetOpcode::G_FSINCOS: RTLIBCASE(SINCOS_F); + case TargetOpcode::G_FMODF: + RTLIBCASE(MODF_F); case TargetOpcode::G_FLOG10: RTLIBCASE(LOG10_F); case TargetOpcode::G_FLOG: @@ -702,6 +704,46 @@ LegalizerHelper::LegalizeResult LegalizerHelper::emitSincosLibcall( return LegalizerHelper::Legalized; } +LegalizerHelper::LegalizeResult +LegalizerHelper::emitModfLibcall(MachineInstr &MI, MachineIRBuilder &MIRBuilder, + unsigned Size, Type *OpType, + LostDebugLocObserver &LocObserver) { + MachineFunction &MF = *MI.getMF(); + MachineRegisterInfo &MRI = MF.getRegInfo(); + + Register DstFrac = MI.getOperand(0).getReg(); + Register DstInt = MI.getOperand(1).getReg(); + Register Src = MI.getOperand(2).getReg(); + LLT DstTy = MRI.getType(DstFrac); + + int MemSize = DstTy.getSizeInBytes(); + Align Alignment = getStackTemporaryAlignment(DstTy); + const DataLayout &DL = MIRBuilder.getDataLayout(); + unsigned AddrSpace = DL.getAllocaAddrSpace(); + MachinePointerInfo PtrInfo; + + Register StackPtrInt = + createStackTemporary(TypeSize::getFixed(MemSize), Alignment, PtrInfo) + .getReg(0); + + auto &Ctx = MF.getFunction().getContext(); + auto LibcallResult = createLibcall( + MIRBuilder, getRTLibDesc(MI.getOpcode(), Size), {DstFrac, OpType, 0}, + {{Src, OpType, 0}, {StackPtrInt, PointerType::get(Ctx, AddrSpace), 1}}, + LocObserver, &MI); + + if (LibcallResult != LegalizeResult::Legalized) + return LegalizerHelper::UnableToLegalize; + + MachineMemOperand *LoadMMOInt = MF.getMachineMemOperand( + PtrInfo, MachineMemOperand::MOLoad, MemSize, Alignment); + + MIRBuilder.buildLoad(DstInt, StackPtrInt, *LoadMMOInt); + MI.eraseFromParent(); + + return LegalizerHelper::Legalized; +} + LegalizerHelper::LegalizeResult llvm::createMemLibcall(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, MachineInstr &MI, LostDebugLocObserver &LocObserver) { @@ -1341,6 +1383,16 @@ LegalizerHelper::libcall(MachineInstr &MI, LostDebugLocObserver &LocObserver) { } return emitSincosLibcall(MI, MIRBuilder, Size, HLTy, LocObserver); } + case TargetOpcode::G_FMODF: { + LLT LLTy = MRI.getType(MI.getOperand(0).getReg()); + unsigned Size = LLTy.getSizeInBits(); + Type *HLTy = getFloatTypeForLLT(Ctx, LLTy); + if (!HLTy || (Size != 32 && Size != 64 && Size != 80 && Size != 128)) { + LLVM_DEBUG(dbgs() << "No libcall available for type " << LLTy << ".\n"); + return UnableToLegalize; + } + return emitModfLibcall(MI, MIRBuilder, Size, HLTy, LocObserver); + } case TargetOpcode::G_LROUND: case TargetOpcode::G_LLROUND: case TargetOpcode::G_INTRINSIC_LRINT: @@ -3333,6 +3385,24 @@ LegalizerHelper::widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy) { widenScalarDst(MI, WideTy, 0, TargetOpcode::G_FPTRUNC); Observer.changedInstr(MI); return Legalized; + case TargetOpcode::G_FMODF: { + widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_FPEXT); + + Register DstFrac = MI.getOperand(0).getReg(); + Register DstInt = MI.getOperand(1).getReg(); + + Register DstFracWide = MRI.createGenericVirtualRegister(WideTy); + Register DstIntWide = MRI.createGenericVirtualRegister(WideTy); + Register SrcWide = MI.getOperand(2).getReg(); + + MIRBuilder.buildInstr(TargetOpcode::G_FMODF, {DstFracWide, DstIntWide}, + {SrcWide}); + + MIRBuilder.buildFPTrunc(DstFrac, DstFracWide); + MIRBuilder.buildFPTrunc(DstInt, DstIntWide); + MI.eraseFromParent(); + return Legalized; + } case TargetOpcode::G_FPOWI: case TargetOpcode::G_FLDEXP: case TargetOpcode::G_STRICT_FLDEXP: { @@ -5472,6 +5542,7 @@ LegalizerHelper::fewerElementsVector(MachineInstr &MI, unsigned TypeIdx, case G_LROUND: case G_LLROUND: case G_INTRINSIC_TRUNC: + case G_FMODF: case G_FCOS: case G_FSIN: case G_FTAN: diff --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp index 7ee54c5932b15..c197550ee38c7 100644 --- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp +++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp @@ -438,7 +438,7 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST) getActionDefinitionsBuilder({G_FCOS, G_FSIN, G_FPOW, G_FLOG, G_FLOG2, G_FLOG10, G_FTAN, G_FEXP, G_FEXP2, G_FEXP10, G_FACOS, G_FASIN, G_FATAN, G_FATAN2, G_FCOSH, - G_FSINH, G_FTANH}) + G_FSINH, G_FTANH, G_FMODF}) // We need a call for these, so we always need to scalarize. .scalarize(0) // Regardless of FP16 support, widen 16-bit elements to 32-bits. diff --git a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp index a7b2179a312e1..44cb780565803 100644 --- a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp @@ -749,6 +749,8 @@ bool SPIRVInstructionSelector::spvSelect(Register ResVReg, return selectExtInst(ResVReg, ResType, I, CL::exp, GL::Exp); case TargetOpcode::G_FEXP2: return selectExtInst(ResVReg, ResType, I, CL::exp2, GL::Exp2); + case TargetOpcode::G_FMODF: + return selectModf(ResVReg, ResType, I); case TargetOpcode::G_FLOG: return selectExtInst(ResVReg, ResType, I, CL::log, GL::Log); @@ -4203,6 +4205,7 @@ bool SPIRVInstructionSelector::selectModf(Register ResVReg, PtrTyReg, LLT::pointer(storageClassToAddressSpace(SPIRV::StorageClass::Function), GR.getPointerSize())); + // Assign SPIR-V type of the pointer type of the alloca variable to the // new register. GR.assignSPIRVTypeToVReg(PtrType, PtrTyReg, MIRBuilder.getMF()); @@ -4215,10 +4218,7 @@ bool SPIRVInstructionSelector::selectModf(Register ResVReg, .addUse(GR.getSPIRVTypeID(PtrType)) .addImm(static_cast(SPIRV::StorageClass::Function)); Register Variable = AllocaMIB->getOperand(0).getReg(); - // Modf must have 4 operands, the first two are the 2 parts of the result, - // the third is the operand, and the last one is the floating point value. - assert(I.getNumOperands() == 4 && - "Expected 4 operands for modf instruction"); + MachineBasicBlock &BB = *I.getParent(); // Create the OpenCLLIB::modf instruction. auto MIB = @@ -4228,8 +4228,8 @@ bool SPIRVInstructionSelector::selectModf(Register ResVReg, .addImm(static_cast(SPIRV::InstructionSet::OpenCL_std)) .addImm(CL::modf) .setMIFlags(I.getFlags()) - .add(I.getOperand(3)) // Floating point value. - .addUse(Variable); // Pointer to integral part. + .add(I.getOperand(I.getNumExplicitDefs())) // Floating point value. + .addUse(Variable); // Pointer to integral part. // Assign the integral part stored in the ptr to the second element of the // result. Register IntegralPartReg = I.getOperand(1).getReg(); diff --git a/llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp b/llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp index 27bb54c2d2e31..95a3c541b66a6 100644 --- a/llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp @@ -297,6 +297,7 @@ SPIRVLegalizerInfo::SPIRVLegalizerInfo(const SPIRVSubtarget &ST) { getActionDefinitionsBuilder({G_STRICT_FSQRT, G_FPOW, G_FEXP, + G_FMODF, G_FEXP2, G_FLOG, G_FLOG2, diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-modf.ll b/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-modf.ll new file mode 100644 index 0000000000000..b4ab099e6ac4f --- /dev/null +++ b/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-modf.ll @@ -0,0 +1,140 @@ +; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +; RUN: llc -O0 -mtriple=aarch64-linux-gnu -global-isel -stop-after=irtranslator %s -o - | FileCheck %s + +define { half, half } @test_modf_f16(half %a) { + ; CHECK-LABEL: name: test_modf_f16 + ; CHECK: bb.1 (%ir-block.0): + ; CHECK-NEXT: liveins: $h0 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $h0 + ; CHECK-NEXT: [[FMODF:%[0-9]+]]:_(s16), [[FMODF1:%[0-9]+]]:_ = G_FMODF [[COPY]] + ; CHECK-NEXT: $h0 = COPY [[FMODF]](s16) + ; CHECK-NEXT: $h1 = COPY [[FMODF1]](s16) + ; CHECK-NEXT: RET_ReallyLR implicit $h0, implicit $h1 + %result = call { half, half } @llvm.modf.f16(half %a) + ret { half, half } %result +} + +define { <2 x half>, <2 x half> } @test_modf_v2f16(<2 x half> %a) { + ; CHECK-LABEL: name: test_modf_v2f16 + ; CHECK: bb.1 (%ir-block.0): + ; CHECK-NEXT: liveins: $d0 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0 + ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) + ; CHECK-NEXT: [[FMODF:%[0-9]+]]:_(<2 x s16>), [[FMODF1:%[0-9]+]]:_ = G_FMODF [[UV]] + ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[FMODF]](<2 x s16>) + ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF + ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[UV2]](s16), [[UV3]](s16), [[DEF]](s16), [[DEF]](s16) + ; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s16), [[UV5:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[FMODF1]](<2 x s16>) + ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[UV4]](s16), [[UV5]](s16), [[DEF]](s16), [[DEF]](s16) + ; CHECK-NEXT: $d0 = COPY [[BUILD_VECTOR]](<4 x s16>) + ; CHECK-NEXT: $d1 = COPY [[BUILD_VECTOR1]](<4 x s16>) + ; CHECK-NEXT: RET_ReallyLR implicit $d0, implicit $d1 + %result = call { <2 x half>, <2 x half> } @llvm.modf.v2f16(<2 x half> %a) + ret { <2 x half>, <2 x half> } %result +} + +define { float, float } @test_modf_f32(float %a) { + ; CHECK-LABEL: name: test_modf_f32 + ; CHECK: bb.1 (%ir-block.0): + ; CHECK-NEXT: liveins: $s0 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $s0 + ; CHECK-NEXT: [[FMODF:%[0-9]+]]:_(s32), [[FMODF1:%[0-9]+]]:_ = G_FMODF [[COPY]] + ; CHECK-NEXT: $s0 = COPY [[FMODF]](s32) + ; CHECK-NEXT: $s1 = COPY [[FMODF1]](s32) + ; CHECK-NEXT: RET_ReallyLR implicit $s0, implicit $s1 + %result = call { float, float } @llvm.modf.f32(float %a) + ret { float, float } %result +} + +define { <2 x float>, <2 x float> } @test_modf_v2f32(<2 x float> %a) { + ; CHECK-LABEL: name: test_modf_v2f32 + ; CHECK: bb.1 (%ir-block.0): + ; CHECK-NEXT: liveins: $d0 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0 + ; CHECK-NEXT: [[FMODF:%[0-9]+]]:_(<2 x s32>), [[FMODF1:%[0-9]+]]:_ = G_FMODF [[COPY]] + ; CHECK-NEXT: $d0 = COPY [[FMODF]](<2 x s32>) + ; CHECK-NEXT: $d1 = COPY [[FMODF1]](<2 x s32>) + ; CHECK-NEXT: RET_ReallyLR implicit $d0, implicit $d1 + %result = call { <2 x float>, <2 x float> } @llvm.modf.v2f32(<2 x float> %a) + ret { <2 x float>, <2 x float> } %result +} + +define { double, double } @test_modf_f64(double %a) { + ; CHECK-LABEL: name: test_modf_f64 + ; CHECK: bb.1 (%ir-block.0): + ; CHECK-NEXT: liveins: $d0 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $d0 + ; CHECK-NEXT: [[FMODF:%[0-9]+]]:_(s64), [[FMODF1:%[0-9]+]]:_ = G_FMODF [[COPY]] + ; CHECK-NEXT: $d0 = COPY [[FMODF]](s64) + ; CHECK-NEXT: $d1 = COPY [[FMODF1]](s64) + ; CHECK-NEXT: RET_ReallyLR implicit $d0, implicit $d1 + %result = call { double, double } @llvm.modf.f64(double %a) + ret { double, double } %result +} + +define { <2 x double>, <2 x double> } @test_modf_v2f64(<2 x double> %a) { + ; CHECK-LABEL: name: test_modf_v2f64 + ; CHECK: bb.1 (%ir-block.0): + ; CHECK-NEXT: liveins: $q0 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0 + ; CHECK-NEXT: [[FMODF:%[0-9]+]]:_(<2 x s64>), [[FMODF1:%[0-9]+]]:_ = G_FMODF [[COPY]] + ; CHECK-NEXT: $q0 = COPY [[FMODF]](<2 x s64>) + ; CHECK-NEXT: $q1 = COPY [[FMODF1]](<2 x s64>) + ; CHECK-NEXT: RET_ReallyLR implicit $q0, implicit $q1 + %result = call { <2 x double>, <2 x double> } @llvm.modf.v2f64(<2 x double> %a) + ret { <2 x double>, <2 x double> } %result +} + +define { fp128, fp128 } @test_modf_fp128(fp128 %a) { + ; CHECK-LABEL: name: test_modf_fp128 + ; CHECK: bb.1 (%ir-block.0): + ; CHECK-NEXT: liveins: $q0 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $q0 + ; CHECK-NEXT: [[FMODF:%[0-9]+]]:_(s128), [[FMODF1:%[0-9]+]]:_ = G_FMODF [[COPY]] + ; CHECK-NEXT: $q0 = COPY [[FMODF]](s128) + ; CHECK-NEXT: $q1 = COPY [[FMODF1]](s128) + ; CHECK-NEXT: RET_ReallyLR implicit $q0, implicit $q1 + %result = call { fp128, fp128 } @llvm.modf.fp128(fp128 %a) + ret { fp128, fp128 } %result +} + +define { <2 x fp128>, <2 x fp128> } @test_modf_v2fp128(<2 x fp128> %a) { + ; CHECK-LABEL: name: test_modf_v2fp128 + ; CHECK: bb.1 (%ir-block.0): + ; CHECK-NEXT: liveins: $q0, $q1 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $q0 + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s128) = COPY $q1 + ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s128>) = G_BUILD_VECTOR [[COPY]](s128), [[COPY1]](s128) + ; CHECK-NEXT: [[FMODF:%[0-9]+]]:_(<2 x s128>), [[FMODF1:%[0-9]+]]:_ = G_FMODF [[BUILD_VECTOR]] + ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s128), [[UV1:%[0-9]+]]:_(s128) = G_UNMERGE_VALUES [[FMODF]](<2 x s128>) + ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s128), [[UV3:%[0-9]+]]:_(s128) = G_UNMERGE_VALUES [[FMODF1]](<2 x s128>) + ; CHECK-NEXT: $q0 = COPY [[UV]](s128) + ; CHECK-NEXT: $q1 = COPY [[UV1]](s128) + ; CHECK-NEXT: $q2 = COPY [[UV2]](s128) + ; CHECK-NEXT: $q3 = COPY [[UV3]](s128) + ; CHECK-NEXT: RET_ReallyLR implicit $q0, implicit $q1, implicit $q2, implicit $q3 + %result = call { <2 x fp128>, <2 x fp128> } @llvm.modf.v2fp128(<2 x fp128> %a) + ret { <2 x fp128>, <2 x fp128> } %result +} + +define { float, float } @test_modf_f32_afn(float %a) { + ; CHECK-LABEL: name: test_modf_f32_afn + ; CHECK: bb.1 (%ir-block.0): + ; CHECK-NEXT: liveins: $s0 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $s0 + ; CHECK-NEXT: [[FMODF:%[0-9]+]]:_(s32), [[FMODF1:%[0-9]+]]:_ = afn G_FMODF [[COPY]] + ; CHECK-NEXT: $s0 = COPY [[FMODF]](s32) + ; CHECK-NEXT: $s1 = COPY [[FMODF1]](s32) + ; CHECK-NEXT: RET_ReallyLR implicit $s0, implicit $s1 + %result = call afn { float, float } @llvm.modf.f32(float %a) + ret { float, float } %result +} diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-modf.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-modf.mir new file mode 100644 index 0000000000000..5d0d94ed2a274 --- /dev/null +++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-modf.mir @@ -0,0 +1,206 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6 +# RUN: llc -mtriple=aarch64 -run-pass=legalizer %s -o - | FileCheck %s +--- +name: test_modf_f16 +body: | + bb.0.entry: + ; CHECK-LABEL: name: test_modf_f16 + ; CHECK: [[COPY:%[0-9]+]]:_(s16) = COPY $h0 + ; CHECK-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[COPY]](s16) + ; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0 + ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp + ; CHECK-NEXT: $s0 = COPY [[FPEXT]](s32) + ; CHECK-NEXT: $x0 = COPY [[FRAME_INDEX]](p0) + ; CHECK-NEXT: BL &modff, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $s0, implicit $x0, implicit-def $s0 + ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $s0 + ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %stack.0) + ; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[COPY1]](s32) + ; CHECK-NEXT: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[LOAD]](s32) + ; CHECK-NEXT: $h0 = COPY [[FPTRUNC]](s16) + ; CHECK-NEXT: $h1 = COPY [[FPTRUNC1]](s16) + ; CHECK-NEXT: RET_ReallyLR implicit $h0, implicit $h1 + %0:_(s16) = COPY $h0 + %1:_(s16), %2:_(s16) = G_FMODF %0 + $h0 = COPY %1(s16) + $h1 = COPY %2(s16) + RET_ReallyLR implicit $h0, implicit $h1 +... +--- +name: test_modf_f16_only_use_fractional_part +body: | + bb.0.entry: + ; CHECK-LABEL: name: test_modf_f16_only_use_fractional_part + ; CHECK: [[COPY:%[0-9]+]]:_(s16) = COPY $h0 + ; CHECK-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[COPY]](s16) + ; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0 + ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp + ; CHECK-NEXT: $s0 = COPY [[FPEXT]](s32) + ; CHECK-NEXT: $x0 = COPY [[FRAME_INDEX]](p0) + ; CHECK-NEXT: BL &modff, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $s0, implicit $x0, implicit-def $s0 + ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $s0 + ; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[COPY1]](s32) + ; CHECK-NEXT: $h0 = COPY [[FPTRUNC]](s16) + ; CHECK-NEXT: RET_ReallyLR implicit $h0 + %0:_(s16) = COPY $h0 + %1:_(s16), %2:_(s16) = G_FMODF %0 + $h0 = COPY %1(s16) + RET_ReallyLR implicit $h0 +... +--- +name: test_modf_v2f16 +body: | + bb.0.entry: + ; CHECK-LABEL: name: test_modf_v2f16 + ; CHECK: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0 + ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) + ; CHECK-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[UV]](s16) + ; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.1 + ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp + ; CHECK-NEXT: $s0 = COPY [[FPEXT]](s32) + ; CHECK-NEXT: $x0 = COPY [[FRAME_INDEX]](p0) + ; CHECK-NEXT: BL &modff, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $s0, implicit $x0, implicit-def $s0 + ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $s0 + ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %stack.1) + ; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[COPY1]](s32) + ; CHECK-NEXT: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[LOAD]](s32) + ; CHECK-NEXT: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[UV1]](s16) + ; CHECK-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0 + ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp + ; CHECK-NEXT: $s0 = COPY [[FPEXT1]](s32) + ; CHECK-NEXT: $x0 = COPY [[FRAME_INDEX1]](p0) + ; CHECK-NEXT: BL &modff, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $s0, implicit $x0, implicit-def $s0 + ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp + ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $s0 + ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (s32) from %stack.0) + ; CHECK-NEXT: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC [[COPY2]](s32) + ; CHECK-NEXT: [[FPTRUNC3:%[0-9]+]]:_(s16) = G_FPTRUNC [[LOAD1]](s32) + ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF + ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[FPTRUNC]](s16), [[FPTRUNC2]](s16), [[DEF]](s16), [[DEF]](s16) + ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[FPTRUNC1]](s16), [[FPTRUNC3]](s16), [[DEF]](s16), [[DEF]](s16) + ; CHECK-NEXT: $d0 = COPY [[BUILD_VECTOR]](<4 x s16>) + ; CHECK-NEXT: $d1 = COPY [[BUILD_VECTOR1]](<4 x s16>) + ; CHECK-NEXT: RET_ReallyLR implicit $d0, implicit $d1 + %1:_(<4 x s16>) = COPY $d0 + %0:_(<2 x s16>), %2:_(<2 x s16>) = G_UNMERGE_VALUES %1(<4 x s16>) + %3:_(<2 x s16>), %4:_(<2 x s16>) = G_FMODF %0 + %5:_(s16), %6:_(s16) = G_UNMERGE_VALUES %3(<2 x s16>) + %7:_(s16) = G_IMPLICIT_DEF + %8:_(<4 x s16>) = G_BUILD_VECTOR %5(s16), %6(s16), %7(s16), %7(s16) + %9:_(s16), %10:_(s16) = G_UNMERGE_VALUES %4(<2 x s16>) + %11:_(<4 x s16>) = G_BUILD_VECTOR %9(s16), %10(s16), %7(s16), %7(s16) + $d0 = COPY %8(<4 x s16>) + $d1 = COPY %11(<4 x s16>) + RET_ReallyLR implicit $d0, implicit $d1 +... +--- +name: test_modf_v3f32 +body: | + bb.0.entry: + ; CHECK-LABEL: name: test_modf_v3f32 + ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0 + ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<4 x s32>) = G_BITCAST [[COPY]](<2 x s64>) + ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BITCAST]](<4 x s32>) + ; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.2 + ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp + ; CHECK-NEXT: $s0 = COPY [[UV]](s32) + ; CHECK-NEXT: $x0 = COPY [[FRAME_INDEX]](p0) + ; CHECK-NEXT: BL &modff, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $s0, implicit $x0, implicit-def $s0 + ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $s0 + ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %stack.2) + ; CHECK-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.1 + ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp + ; CHECK-NEXT: $s0 = COPY [[UV1]](s32) + ; CHECK-NEXT: $x0 = COPY [[FRAME_INDEX1]](p0) + ; CHECK-NEXT: BL &modff, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $s0, implicit $x0, implicit-def $s0 + ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp + ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $s0 + ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (s32) from %stack.1) + ; CHECK-NEXT: [[FRAME_INDEX2:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0 + ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp + ; CHECK-NEXT: $s0 = COPY [[UV2]](s32) + ; CHECK-NEXT: $x0 = COPY [[FRAME_INDEX2]](p0) + ; CHECK-NEXT: BL &modff, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $s0, implicit $x0, implicit-def $s0 + ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp + ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $s0 + ; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX2]](p0) :: (load (s32) from %stack.0) + ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF + ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[DEF]](s32) + ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[DEF]](s32) + ; CHECK-NEXT: $q0 = COPY [[BUILD_VECTOR]](<4 x s32>) + ; CHECK-NEXT: $q1 = COPY [[BUILD_VECTOR1]](<4 x s32>) + ; CHECK-NEXT: RET_ReallyLR implicit $q0, implicit $q1 + %1:_(<2 x s64>) = COPY $q0 + %2:_(<4 x s32>) = G_BITCAST %1(<2 x s64>) + %3:_(s32), %4:_(s32), %5:_(s32), %6:_(s32) = G_UNMERGE_VALUES %2(<4 x s32>) + %0:_(<3 x s32>) = G_BUILD_VECTOR %3(s32), %4(s32), %5(s32) + %7:_(<3 x s32>), %8:_(<3 x s32>) = G_FMODF %0 + %9:_(s32), %10:_(s32), %11:_(s32) = G_UNMERGE_VALUES %7(<3 x s32>) + %12:_(s32) = G_IMPLICIT_DEF + %13:_(<4 x s32>) = G_BUILD_VECTOR %9(s32), %10(s32), %11(s32), %12(s32) + %14:_(s32), %15:_(s32), %16:_(s32) = G_UNMERGE_VALUES %8(<3 x s32>) + %17:_(<4 x s32>) = G_BUILD_VECTOR %14(s32), %15(s32), %16(s32), %12(s32) + $q0 = COPY %13(<4 x s32>) + $q1 = COPY %17(<4 x s32>) + RET_ReallyLR implicit $q0, implicit $q1 +... +--- +name: test_modf_v2f64 +body: | + bb.0.entry: + ; CHECK-LABEL: name: test_modf_v2f64 + ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0 + ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>) + ; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.1 + ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp + ; CHECK-NEXT: $d0 = COPY [[UV]](s64) + ; CHECK-NEXT: $x0 = COPY [[FRAME_INDEX]](p0) + ; CHECK-NEXT: BL &modf, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $d0, implicit $x0, implicit-def $d0 + ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $d0 + ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s64) from %stack.1) + ; CHECK-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0 + ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp + ; CHECK-NEXT: $d0 = COPY [[UV1]](s64) + ; CHECK-NEXT: $x0 = COPY [[FRAME_INDEX1]](p0) + ; CHECK-NEXT: BL &modf, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $d0, implicit $x0, implicit-def $d0 + ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp + ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $d0 + ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (s64) from %stack.0) + ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[COPY1]](s64), [[COPY2]](s64) + ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64) + ; CHECK-NEXT: $q0 = COPY [[BUILD_VECTOR]](<2 x s64>) + ; CHECK-NEXT: $q1 = COPY [[BUILD_VECTOR1]](<2 x s64>) + ; CHECK-NEXT: RET_ReallyLR implicit $q0, implicit $q1 + %0:_(<2 x s64>) = COPY $q0 + %1:_(<2 x s64>), %2:_(<2 x s64>) = G_FMODF %0 + $q0 = COPY %1(<2 x s64>) + $q1 = COPY %2(<2 x s64>) + RET_ReallyLR implicit $q0, implicit $q1 +... +--- +name: test_modf_fp128 +body: | + bb.0.entry: + ; CHECK-LABEL: name: test_modf_fp128 + ; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $q0 + ; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0 + ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp + ; CHECK-NEXT: $q0 = COPY [[COPY]](s128) + ; CHECK-NEXT: $x0 = COPY [[FRAME_INDEX]](p0) + ; CHECK-NEXT: BL &modfl, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $q0, implicit $x0, implicit-def $q0 + ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s128) = COPY $q0 + ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s128) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s128) from %stack.0) + ; CHECK-NEXT: $q0 = COPY [[COPY1]](s128) + ; CHECK-NEXT: $q1 = COPY [[LOAD]](s128) + ; CHECK-NEXT: RET_ReallyLR implicit $q0, implicit $q1 + %0:_(s128) = COPY $q0 + %1:_(s128), %2:_(s128) = G_FMODF %0 + $q0 = COPY %1(s128) + $q1 = COPY %2(s128) + RET_ReallyLR implicit $q0, implicit $q1 +... diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir index ba867f4ae0c26..d721b73c2b5ba 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir +++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir @@ -508,6 +508,10 @@ # DEBUG-NEXT: G_FREM (opcode {{[0-9]+}}): 1 type index, 0 imm indices # DEBUG-NEXT: .. the first uncovered type index: 1, OK # DEBUG-NEXT: .. the first uncovered imm index: 0, OK +# DEBUG-NEXT: G_FMODF (opcode {{[0-9]+}}): 1 type index, 0 imm indices +# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}} +# DEBUG-NEXT: .. the first uncovered type index: 1, OK +# DEBUG-NEXT: .. the first uncovered imm index: 0, OK # DEBUG-NEXT: G_FPOW (opcode {{[0-9]+}}): 1 type index, 0 imm indices # DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}} # DEBUG-NEXT: .. the first uncovered type index: 1, OK diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/select-modf.mir b/llvm/test/CodeGen/AArch64/GlobalISel/select-modf.mir new file mode 100644 index 0000000000000..604cb96e38dc3 --- /dev/null +++ b/llvm/test/CodeGen/AArch64/GlobalISel/select-modf.mir @@ -0,0 +1,136 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6 +# RUN: llc -verify-machineinstrs -mtriple aarch64-unknown-unknown -run-pass=instruction-select %s -o - | FileCheck %s +--- +name: test_modf_fp128 +alignment: 4 +legalized: true +regBankSelected: true +tracksRegLiveness: true +liveins: + - { reg: '$q0' } +frameInfo: + maxAlignment: 16 +stack: + - { id: 0, size: 16, alignment: 16 } +body: | + bb.1: + liveins: $q0 + + ; CHECK-LABEL: name: test_modf_fp128 + ; CHECK: liveins: $q0 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr128 = COPY $q0 + ; CHECK-NEXT: [[ADDXri:%[0-9]+]]:gpr64sp = ADDXri %stack.0, 0, 0 + ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp + ; CHECK-NEXT: $q0 = COPY [[COPY]] + ; CHECK-NEXT: $x0 = COPY [[ADDXri]] + ; CHECK-NEXT: BL &modfl, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $q0, implicit $x0, implicit-def $q0 + ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr128 = COPY $q0 + ; CHECK-NEXT: [[LDRQui:%[0-9]+]]:fpr128 = LDRQui %stack.0, 0 :: (load (s128) from %stack.0) + ; CHECK-NEXT: $q0 = COPY [[COPY1]] + ; CHECK-NEXT: $q1 = COPY [[LDRQui]] + ; CHECK-NEXT: RET_ReallyLR implicit $q0, implicit $q1 + %0:fpr(s128) = COPY $q0 + %3:gpr(p0) = G_FRAME_INDEX %stack.0 + ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp + $q0 = COPY %0(s128) + $x0 = COPY %3(p0) + BL &modfl, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $q0, implicit $x0, implicit-def $q0 + ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp + %1:fpr(s128) = COPY $q0 + %2:fpr(s128) = G_LOAD %3(p0) :: (load (s128) from %stack.0) + $q0 = COPY %1(s128) + $q1 = COPY %2(s128) + RET_ReallyLR implicit $q0, implicit $q1 +... +--- +name: test_modf_double +alignment: 4 +legalized: true +regBankSelected: true +tracksRegLiveness: true +liveins: + - { reg: '$d0' } +frameInfo: + maxAlignment: 8 +stack: + - { id: 0, size: 8, alignment: 8 } +machineFunctionInfo: {} +body: | + bb.1: + liveins: $d0 + + ; CHECK-LABEL: name: test_modf_double + ; CHECK: liveins: $d0 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $d0 + ; CHECK-NEXT: [[ADDXri:%[0-9]+]]:gpr64sp = ADDXri %stack.0, 0, 0 + ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp + ; CHECK-NEXT: $d0 = COPY [[COPY]] + ; CHECK-NEXT: $x0 = COPY [[ADDXri]] + ; CHECK-NEXT: BL &modf, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $d0, implicit $x0, implicit-def $d0 + ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $d0 + ; CHECK-NEXT: [[LDRDui:%[0-9]+]]:fpr64 = LDRDui %stack.0, 0 :: (load (s64) from %stack.0) + ; CHECK-NEXT: $d0 = COPY [[COPY1]] + ; CHECK-NEXT: $d1 = COPY [[LDRDui]] + ; CHECK-NEXT: RET_ReallyLR implicit $d0, implicit $d1 + %0:fpr(s64) = COPY $d0 + %3:gpr(p0) = G_FRAME_INDEX %stack.0 + ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp + $d0 = COPY %0(s64) + $x0 = COPY %3(p0) + BL &modf, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $d0, implicit $x0, implicit-def $d0 + ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp + %1:fpr(s64) = COPY $d0 + %2:fpr(s64) = G_LOAD %3(p0) :: (load (s64) from %stack.0) + $d0 = COPY %1(s64) + $d1 = COPY %2(s64) + RET_ReallyLR implicit $d0, implicit $d1 +... +--- +name: test_modf_double_vec +alignment: 4 +legalized: true +regBankSelected: true +tracksRegLiveness: true +liveins: + - { reg: '$d0' } +frameInfo: + maxAlignment: 8 +stack: + - { id: 0, size: 8, alignment: 8 } +machineFunctionInfo: {} +body: | + bb.1: + liveins: $d0 + + ; CHECK-LABEL: name: test_modf_double_vec + ; CHECK: liveins: $d0 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $d0 + ; CHECK-NEXT: [[ADDXri:%[0-9]+]]:gpr64sp = ADDXri %stack.0, 0, 0 + ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp + ; CHECK-NEXT: $d0 = COPY [[COPY]] + ; CHECK-NEXT: $x0 = COPY [[ADDXri]] + ; CHECK-NEXT: BL &modf, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $d0, implicit $x0, implicit-def $d0 + ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $d0 + ; CHECK-NEXT: [[LDRDui:%[0-9]+]]:fpr64 = LDRDui %stack.0, 0 :: (load (s64) from %stack.0) + ; CHECK-NEXT: $d0 = COPY [[COPY1]] + ; CHECK-NEXT: $d1 = COPY [[LDRDui]] + ; CHECK-NEXT: RET_ReallyLR implicit $d0, implicit $d1 + %0:fpr(s64) = COPY $d0 + %3:gpr(p0) = G_FRAME_INDEX %stack.0 + ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp + $d0 = COPY %0(s64) + $x0 = COPY %3(p0) + BL &modf, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $d0, implicit $x0, implicit-def $d0 + ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp + %1:fpr(s64) = COPY $d0 + %2:fpr(s64) = G_LOAD %3(p0) :: (load (s64) from %stack.0) + $d0 = COPY %1(s64) + $d1 = COPY %2(s64) + RET_ReallyLR implicit $d0, implicit $d1 +... diff --git a/llvm/test/CodeGen/AArch64/llvm.modf.ll b/llvm/test/CodeGen/AArch64/llvm.modf.ll index 41fe796daca86..243124a07e136 100644 --- a/llvm/test/CodeGen/AArch64/llvm.modf.ll +++ b/llvm/test/CodeGen/AArch64/llvm.modf.ll @@ -1,5 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 ; RUN: llc -mtriple=aarch64-gnu-linux < %s | FileCheck -check-prefixes=CHECK %s +; RUN: llc -mtriple=aarch64-gnu-linux -global-isel < %s | FileCheck -check-prefixes=CHECK-GIS %s define { half, half } @test_modf_f16(half %a) { ; CHECK-LABEL: test_modf_f16: @@ -15,6 +16,20 @@ define { half, half } @test_modf_f16(half %a) { ; CHECK-NEXT: fcvt h1, s1 ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload ; CHECK-NEXT: ret +; +; CHECK-GIS-LABEL: test_modf_f16: +; CHECK-GIS: // %bb.0: +; CHECK-GIS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill +; CHECK-GIS-NEXT: .cfi_def_cfa_offset 16 +; CHECK-GIS-NEXT: .cfi_offset w30, -16 +; CHECK-GIS-NEXT: fcvt s0, h0 +; CHECK-GIS-NEXT: add x0, sp, #12 +; CHECK-GIS-NEXT: bl modff +; CHECK-GIS-NEXT: ldr s1, [sp, #12] +; CHECK-GIS-NEXT: fcvt h0, s0 +; CHECK-GIS-NEXT: fcvt h1, s1 +; CHECK-GIS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload +; CHECK-GIS-NEXT: ret %result = call { half, half } @llvm.modf.f16(half %a) ret { half, half } %result } @@ -31,6 +46,18 @@ define half @test_modf_f16_only_use_fractional_part(half %a) { ; CHECK-NEXT: fcvt h0, s0 ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload ; CHECK-NEXT: ret +; +; CHECK-GIS-LABEL: test_modf_f16_only_use_fractional_part: +; CHECK-GIS: // %bb.0: +; CHECK-GIS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill +; CHECK-GIS-NEXT: .cfi_def_cfa_offset 16 +; CHECK-GIS-NEXT: .cfi_offset w30, -16 +; CHECK-GIS-NEXT: fcvt s0, h0 +; CHECK-GIS-NEXT: add x0, sp, #12 +; CHECK-GIS-NEXT: bl modff +; CHECK-GIS-NEXT: fcvt h0, s0 +; CHECK-GIS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload +; CHECK-GIS-NEXT: ret %result = call { half, half } @llvm.modf.f16(half %a) %result.0 = extractvalue { half, half } %result, 0 ret half %result.0 @@ -49,6 +76,19 @@ define half @test_modf_f16_only_use_integral_part(half %a) { ; CHECK-NEXT: fcvt h0, s0 ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload ; CHECK-NEXT: ret +; +; CHECK-GIS-LABEL: test_modf_f16_only_use_integral_part: +; CHECK-GIS: // %bb.0: +; CHECK-GIS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill +; CHECK-GIS-NEXT: .cfi_def_cfa_offset 16 +; CHECK-GIS-NEXT: .cfi_offset w30, -16 +; CHECK-GIS-NEXT: fcvt s0, h0 +; CHECK-GIS-NEXT: add x0, sp, #12 +; CHECK-GIS-NEXT: bl modff +; CHECK-GIS-NEXT: ldr s0, [sp, #12] +; CHECK-GIS-NEXT: fcvt h0, s0 +; CHECK-GIS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload +; CHECK-GIS-NEXT: ret %result = call { half, half } @llvm.modf.f16(half %a) %result.1 = extractvalue { half, half } %result, 1 ret half %result.1 @@ -110,6 +150,40 @@ define { <2 x half>, <2 x half> } @test_modf_v2f16(<2 x half> %a) { ; CHECK-NEXT: // kill: def $d1 killed $d1 killed $q1 ; CHECK-NEXT: add sp, sp, #64 ; CHECK-NEXT: ret +; +; CHECK-GIS-LABEL: test_modf_v2f16: +; CHECK-GIS: // %bb.0: +; CHECK-GIS-NEXT: sub sp, sp, #64 +; CHECK-GIS-NEXT: str d8, [sp, #48] // 8-byte Folded Spill +; CHECK-GIS-NEXT: str x30, [sp, #56] // 8-byte Folded Spill +; CHECK-GIS-NEXT: .cfi_def_cfa_offset 64 +; CHECK-GIS-NEXT: .cfi_offset w30, -8 +; CHECK-GIS-NEXT: .cfi_offset b8, -16 +; CHECK-GIS-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-GIS-NEXT: mov h8, v0.h[1] +; CHECK-GIS-NEXT: add x0, sp, #40 +; CHECK-GIS-NEXT: fcvt s0, h0 +; CHECK-GIS-NEXT: bl modff +; CHECK-GIS-NEXT: fcvt h0, s0 +; CHECK-GIS-NEXT: ldr s1, [sp, #40] +; CHECK-GIS-NEXT: add x0, sp, #44 +; CHECK-GIS-NEXT: str q0, [sp] // 16-byte Folded Spill +; CHECK-GIS-NEXT: fcvt h0, s1 +; CHECK-GIS-NEXT: str q0, [sp, #16] // 16-byte Folded Spill +; CHECK-GIS-NEXT: fcvt s0, h8 +; CHECK-GIS-NEXT: bl modff +; CHECK-GIS-NEXT: ldr s1, [sp, #44] +; CHECK-GIS-NEXT: fcvt h3, s0 +; CHECK-GIS-NEXT: ldr x30, [sp, #56] // 8-byte Folded Reload +; CHECK-GIS-NEXT: ldr d8, [sp, #48] // 8-byte Folded Reload +; CHECK-GIS-NEXT: fcvt h2, s1 +; CHECK-GIS-NEXT: ldp q0, q1, [sp] // 32-byte Folded Reload +; CHECK-GIS-NEXT: mov v0.h[1], v3.h[0] +; CHECK-GIS-NEXT: mov v1.h[1], v2.h[0] +; CHECK-GIS-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-GIS-NEXT: // kill: def $d1 killed $d1 killed $q1 +; CHECK-GIS-NEXT: add sp, sp, #64 +; CHECK-GIS-NEXT: ret %result = call { <2 x half>, <2 x half> } @llvm.modf.v2f16(<2 x half> %a) ret { <2 x half>, <2 x half> } %result } @@ -125,6 +199,17 @@ define { float, float } @test_modf_f32(float %a) { ; CHECK-NEXT: ldr s1, [sp, #12] ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload ; CHECK-NEXT: ret +; +; CHECK-GIS-LABEL: test_modf_f32: +; CHECK-GIS: // %bb.0: +; CHECK-GIS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill +; CHECK-GIS-NEXT: .cfi_def_cfa_offset 16 +; CHECK-GIS-NEXT: .cfi_offset w30, -16 +; CHECK-GIS-NEXT: add x0, sp, #12 +; CHECK-GIS-NEXT: bl modff +; CHECK-GIS-NEXT: ldr s1, [sp, #12] +; CHECK-GIS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload +; CHECK-GIS-NEXT: ret %result = call { float, float } @llvm.modf.f32(float %a) ret { float, float } %result } @@ -170,6 +255,49 @@ define { <3 x float>, <3 x float> } @test_modf_v3f32(<3 x float> %a) { ; CHECK-NEXT: mov v0.16b, v2.16b ; CHECK-NEXT: add sp, sp, #80 ; CHECK-NEXT: ret +; +; CHECK-GIS-LABEL: test_modf_v3f32: +; CHECK-GIS: // %bb.0: +; CHECK-GIS-NEXT: sub sp, sp, #112 +; CHECK-GIS-NEXT: stp d9, d8, [sp, #80] // 16-byte Folded Spill +; CHECK-GIS-NEXT: stp x30, x19, [sp, #96] // 16-byte Folded Spill +; CHECK-GIS-NEXT: .cfi_def_cfa_offset 112 +; CHECK-GIS-NEXT: .cfi_offset w19, -8 +; CHECK-GIS-NEXT: .cfi_offset w30, -16 +; CHECK-GIS-NEXT: .cfi_offset b8, -24 +; CHECK-GIS-NEXT: .cfi_offset b9, -32 +; CHECK-GIS-NEXT: add x0, sp, #68 +; CHECK-GIS-NEXT: mov s8, v0.s[1] +; CHECK-GIS-NEXT: mov s9, v0.s[2] +; CHECK-GIS-NEXT: // kill: def $s0 killed $s0 killed $q0 +; CHECK-GIS-NEXT: bl modff +; CHECK-GIS-NEXT: ldr s1, [sp, #68] +; CHECK-GIS-NEXT: // kill: def $s0 killed $s0 def $q0 +; CHECK-GIS-NEXT: add x0, sp, #72 +; CHECK-GIS-NEXT: stp q0, q1, [sp, #32] // 32-byte Folded Spill +; CHECK-GIS-NEXT: fmov s0, s8 +; CHECK-GIS-NEXT: bl modff +; CHECK-GIS-NEXT: // kill: def $s0 killed $s0 def $q0 +; CHECK-GIS-NEXT: str q0, [sp] // 16-byte Folded Spill +; CHECK-GIS-NEXT: add x0, sp, #76 +; CHECK-GIS-NEXT: add x19, sp, #76 +; CHECK-GIS-NEXT: ldr s0, [sp, #72] +; CHECK-GIS-NEXT: str q0, [sp, #16] // 16-byte Folded Spill +; CHECK-GIS-NEXT: fmov s0, s9 +; CHECK-GIS-NEXT: bl modff +; CHECK-GIS-NEXT: ldp q3, q2, [sp, #16] // 32-byte Folded Reload +; CHECK-GIS-NEXT: // kill: def $s0 killed $s0 def $q0 +; CHECK-GIS-NEXT: ldr q1, [sp] // 16-byte Folded Reload +; CHECK-GIS-NEXT: ldp d9, d8, [sp, #80] // 16-byte Folded Reload +; CHECK-GIS-NEXT: mov v2.s[1], v1.s[0] +; CHECK-GIS-NEXT: ldr q1, [sp, #48] // 16-byte Folded Reload +; CHECK-GIS-NEXT: mov v1.s[1], v3.s[0] +; CHECK-GIS-NEXT: mov v2.s[2], v0.s[0] +; CHECK-GIS-NEXT: ld1 { v1.s }[2], [x19] +; CHECK-GIS-NEXT: ldp x30, x19, [sp, #96] // 16-byte Folded Reload +; CHECK-GIS-NEXT: mov v0.16b, v2.16b +; CHECK-GIS-NEXT: add sp, sp, #112 +; CHECK-GIS-NEXT: ret %result = call { <3 x float>, <3 x float> } @llvm.modf.v3f32(<3 x float> %a) ret { <3 x float>, <3 x float> } %result } @@ -204,6 +332,39 @@ define { <2 x float>, <2 x float> } @test_modf_v2f32(<2 x float> %a) { ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0 ; CHECK-NEXT: add sp, sp, #64 ; CHECK-NEXT: ret +; +; CHECK-GIS-LABEL: test_modf_v2f32: +; CHECK-GIS: // %bb.0: +; CHECK-GIS-NEXT: sub sp, sp, #64 +; CHECK-GIS-NEXT: str d8, [sp, #32] // 8-byte Folded Spill +; CHECK-GIS-NEXT: stp x30, x19, [sp, #48] // 16-byte Folded Spill +; CHECK-GIS-NEXT: .cfi_def_cfa_offset 64 +; CHECK-GIS-NEXT: .cfi_offset w19, -8 +; CHECK-GIS-NEXT: .cfi_offset w30, -16 +; CHECK-GIS-NEXT: .cfi_offset b8, -32 +; CHECK-GIS-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-GIS-NEXT: add x0, sp, #40 +; CHECK-GIS-NEXT: mov s8, v0.s[1] +; CHECK-GIS-NEXT: // kill: def $s0 killed $s0 killed $q0 +; CHECK-GIS-NEXT: bl modff +; CHECK-GIS-NEXT: // kill: def $s0 killed $s0 def $q0 +; CHECK-GIS-NEXT: str q0, [sp] // 16-byte Folded Spill +; CHECK-GIS-NEXT: add x0, sp, #44 +; CHECK-GIS-NEXT: add x19, sp, #44 +; CHECK-GIS-NEXT: ldr s0, [sp, #40] +; CHECK-GIS-NEXT: str q0, [sp, #16] // 16-byte Folded Spill +; CHECK-GIS-NEXT: fmov s0, s8 +; CHECK-GIS-NEXT: bl modff +; CHECK-GIS-NEXT: ldp q2, q1, [sp] // 32-byte Folded Reload +; CHECK-GIS-NEXT: // kill: def $s0 killed $s0 def $q0 +; CHECK-GIS-NEXT: ldr d8, [sp, #32] // 8-byte Folded Reload +; CHECK-GIS-NEXT: mov v2.s[1], v0.s[0] +; CHECK-GIS-NEXT: ld1 { v1.s }[1], [x19] +; CHECK-GIS-NEXT: ldp x30, x19, [sp, #48] // 16-byte Folded Reload +; CHECK-GIS-NEXT: // kill: def $d1 killed $d1 killed $q1 +; CHECK-GIS-NEXT: fmov d0, d2 +; CHECK-GIS-NEXT: add sp, sp, #64 +; CHECK-GIS-NEXT: ret %result = call { <2 x float>, <2 x float> } @llvm.modf.v2f32(<2 x float> %a) ret { <2 x float>, <2 x float> } %result } @@ -219,6 +380,17 @@ define { double, double } @test_modf_f64(double %a) { ; CHECK-NEXT: ldr d1, [sp, #8] ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload ; CHECK-NEXT: ret +; +; CHECK-GIS-LABEL: test_modf_f64: +; CHECK-GIS: // %bb.0: +; CHECK-GIS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill +; CHECK-GIS-NEXT: .cfi_def_cfa_offset 16 +; CHECK-GIS-NEXT: .cfi_offset w30, -16 +; CHECK-GIS-NEXT: add x0, sp, #8 +; CHECK-GIS-NEXT: bl modf +; CHECK-GIS-NEXT: ldr d1, [sp, #8] +; CHECK-GIS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload +; CHECK-GIS-NEXT: ret %result = call { double, double } @llvm.modf.f64(double %a) ret { double, double } %result } @@ -250,6 +422,37 @@ define { <2 x double>, <2 x double> } @test_modf_v2f64(<2 x double> %a) { ; CHECK-NEXT: mov v0.d[1], v2.d[0] ; CHECK-NEXT: add sp, sp, #64 ; CHECK-NEXT: ret +; +; CHECK-GIS-LABEL: test_modf_v2f64: +; CHECK-GIS: // %bb.0: +; CHECK-GIS-NEXT: sub sp, sp, #80 +; CHECK-GIS-NEXT: str d8, [sp, #48] // 8-byte Folded Spill +; CHECK-GIS-NEXT: stp x30, x19, [sp, #64] // 16-byte Folded Spill +; CHECK-GIS-NEXT: .cfi_def_cfa_offset 80 +; CHECK-GIS-NEXT: .cfi_offset w19, -8 +; CHECK-GIS-NEXT: .cfi_offset w30, -16 +; CHECK-GIS-NEXT: .cfi_offset b8, -32 +; CHECK-GIS-NEXT: add x0, sp, #40 +; CHECK-GIS-NEXT: mov d8, v0.d[1] +; CHECK-GIS-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-GIS-NEXT: bl modf +; CHECK-GIS-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-GIS-NEXT: str q0, [sp] // 16-byte Folded Spill +; CHECK-GIS-NEXT: add x0, sp, #56 +; CHECK-GIS-NEXT: add x19, sp, #56 +; CHECK-GIS-NEXT: ldr d0, [sp, #40] +; CHECK-GIS-NEXT: str q0, [sp, #16] // 16-byte Folded Spill +; CHECK-GIS-NEXT: fmov d0, d8 +; CHECK-GIS-NEXT: bl modf +; CHECK-GIS-NEXT: ldp q2, q1, [sp] // 32-byte Folded Reload +; CHECK-GIS-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-GIS-NEXT: ldr d8, [sp, #48] // 8-byte Folded Reload +; CHECK-GIS-NEXT: mov v2.d[1], v0.d[0] +; CHECK-GIS-NEXT: ld1 { v1.d }[1], [x19] +; CHECK-GIS-NEXT: ldp x30, x19, [sp, #64] // 16-byte Folded Reload +; CHECK-GIS-NEXT: mov v0.16b, v2.16b +; CHECK-GIS-NEXT: add sp, sp, #80 +; CHECK-GIS-NEXT: ret %result = call { <2 x double>, <2 x double> } @llvm.modf.v2f64(<2 x double> %a) ret { <2 x double>, <2 x double> } %result } diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir index 7204064a07f40..f1d17f9f02b90 100644 --- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir +++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir @@ -505,6 +505,9 @@ # DEBUG-NEXT: G_FREM (opcode {{[0-9]+}}): 1 type index, 0 imm indices # DEBUG-NEXT: .. the first uncovered type index: 1, OK # DEBUG-NEXT: .. the first uncovered imm index: 0, OK +# DEBUG-NEXT: G_FMODF (opcode {{[0-9]+}}): 1 type index, 0 imm indices +# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined +# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined # DEBUG-NEXT: G_FPOW (opcode {{[0-9]+}}): 1 type index, 0 imm indices # DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}} # DEBUG-NEXT: .. the first uncovered type index: 1, OK @@ -607,11 +610,11 @@ # DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined # DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined # DEBUG-NEXT: G_FMINIMUMNUM (opcode {{[0-9]+}}): 1 type index, 0 imm indices -# DEBUG-NEXT: .. opcode 219 is aliased to 183 +# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}} # DEBUG-NEXT: .. the first uncovered type index: 1, OK # DEBUG-NEXT: .. the first uncovered imm index: 0, OK # DEBUG-NEXT: G_FMAXIMUMNUM (opcode {{[0-9]+}}): 1 type index, 0 imm indices -# DEBUG-NEXT: .. opcode 220 is aliased to 183 +# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}} # DEBUG-NEXT: .. the first uncovered type index: 1, OK # DEBUG-NEXT: .. the first uncovered imm index: 0, OK # DEBUG-NEXT: G_GET_FPENV (opcode {{[0-9]+}}): 1 type index, 0 imm indices diff --git a/llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-cxx.td b/llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-cxx.td index ce4f0108b4843..18960b43ab97d 100644 --- a/llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-cxx.td +++ b/llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-cxx.td @@ -96,71 +96,71 @@ def MyCombiner: GICombiner<"GenMyCombiner", [ // CHECK: const uint8_t *GenMyCombiner::getMatchTable() const { // CHECK-NEXT: constexpr static uint8_t MatchTable0[] = { -// CHECK-NEXT: /* 0 */ GIM_SwitchOpcode, /*MI*/0, /*[*/GIMT_Encode2(99), GIMT_Encode2(210), /*)*//*default:*//*Label 5*/ GIMT_Encode4(520), -// CHECK-NEXT: /* 10 */ /*TargetOpcode::G_STORE*//*Label 0*/ GIMT_Encode4(454), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), -// CHECK-NEXT: /* 182 */ /*TargetOpcode::G_SEXT*//*Label 1*/ GIMT_Encode4(472), GIMT_Encode4(0), -// CHECK-NEXT: /* 190 */ /*TargetOpcode::G_ZEXT*//*Label 2*/ GIMT_Encode4(484), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), -// CHECK-NEXT: /* 414 */ /*TargetOpcode::G_FNEG*//*Label 3*/ GIMT_Encode4(496), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), -// CHECK-NEXT: /* 450 */ /*TargetOpcode::G_FABS*//*Label 4*/ GIMT_Encode4(508), -// CHECK-NEXT: /* 454 */ // Label 0: @454 -// CHECK-NEXT: /* 454 */ GIM_Try, /*On fail goto*//*Label 6*/ GIMT_Encode4(471), // Rule ID 2 // -// CHECK-NEXT: /* 459 */ GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule2Enabled), -// CHECK-NEXT: /* 462 */ // MIs[0] x -// CHECK-NEXT: /* 462 */ // No operand predicates -// CHECK-NEXT: /* 462 */ // MIs[0] y -// CHECK-NEXT: /* 462 */ // No operand predicates -// CHECK-NEXT: /* 462 */ GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_GICombiner0), -// CHECK-NEXT: /* 466 */ GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_GICombiner1), -// CHECK-NEXT: /* 470 */ // Combiner Rule #2: TwoMatchNoApply -// CHECK-NEXT: /* 470 */ GIR_EraseRootFromParent_Done, -// CHECK-NEXT: /* 471 */ // Label 6: @471 -// CHECK-NEXT: /* 471 */ GIM_Reject, -// CHECK-NEXT: /* 472 */ // Label 1: @472 -// CHECK-NEXT: /* 472 */ GIM_Try, /*On fail goto*//*Label 7*/ GIMT_Encode4(483), // Rule ID 3 // -// CHECK-NEXT: /* 477 */ GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule3Enabled), -// CHECK-NEXT: /* 480 */ // MIs[0] a -// CHECK-NEXT: /* 480 */ // No operand predicates -// CHECK-NEXT: /* 480 */ // MIs[0] y -// CHECK-NEXT: /* 480 */ // No operand predicates -// CHECK-NEXT: /* 480 */ // Combiner Rule #3: NoMatchTwoApply -// CHECK-NEXT: /* 480 */ GIR_DoneWithCustomAction, /*Fn*/GIMT_Encode2(GICXXCustomAction_GICombiner2), -// CHECK-NEXT: /* 483 */ // Label 7: @483 -// CHECK-NEXT: /* 483 */ GIM_Reject, -// CHECK-NEXT: /* 484 */ // Label 2: @484 -// CHECK-NEXT: /* 484 */ GIM_Try, /*On fail goto*//*Label 8*/ GIMT_Encode4(495), // Rule ID 4 // -// CHECK-NEXT: /* 489 */ GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule4Enabled), -// CHECK-NEXT: /* 492 */ // MIs[0] a -// CHECK-NEXT: /* 492 */ // No operand predicates -// CHECK-NEXT: /* 492 */ // MIs[0] y -// CHECK-NEXT: /* 492 */ // No operand predicates -// CHECK-NEXT: /* 492 */ // Combiner Rule #4: CombineCXXOrder -// CHECK-NEXT: /* 492 */ GIR_DoneWithCustomAction, /*Fn*/GIMT_Encode2(GICXXCustomAction_GICombiner3), -// CHECK-NEXT: /* 495 */ // Label 8: @495 -// CHECK-NEXT: /* 495 */ GIM_Reject, -// CHECK-NEXT: /* 496 */ // Label 3: @496 -// CHECK-NEXT: /* 496 */ GIM_Try, /*On fail goto*//*Label 9*/ GIMT_Encode4(507), // Rule ID 1 // -// CHECK-NEXT: /* 501 */ GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule1Enabled), -// CHECK-NEXT: /* 504 */ // MIs[0] a -// CHECK-NEXT: /* 504 */ // No operand predicates -// CHECK-NEXT: /* 504 */ // MIs[0] b -// CHECK-NEXT: /* 504 */ // No operand predicates -// CHECK-NEXT: /* 504 */ // Combiner Rule #1: TwoMatchTwoApply -// CHECK-NEXT: /* 504 */ GIR_DoneWithCustomAction, /*Fn*/GIMT_Encode2(GICXXCustomAction_GICombiner1), -// CHECK-NEXT: /* 507 */ // Label 9: @507 -// CHECK-NEXT: /* 507 */ GIM_Reject, -// CHECK-NEXT: /* 508 */ // Label 4: @508 -// CHECK-NEXT: /* 508 */ GIM_Try, /*On fail goto*//*Label 10*/ GIMT_Encode4(519), // Rule ID 0 // -// CHECK-NEXT: /* 513 */ GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule0Enabled), -// CHECK-NEXT: /* 516 */ // MIs[0] a -// CHECK-NEXT: /* 516 */ // No operand predicates -// CHECK-NEXT: /* 516 */ // MIs[0] b -// CHECK-NEXT: /* 516 */ // No operand predicates -// CHECK-NEXT: /* 516 */ // Combiner Rule #0: OneMatchOneApply -// CHECK-NEXT: /* 516 */ GIR_DoneWithCustomAction, /*Fn*/GIMT_Encode2(GICXXCustomAction_GICombiner0), -// CHECK-NEXT: /* 519 */ // Label 10: @519 -// CHECK-NEXT: /* 519 */ GIM_Reject, -// CHECK-NEXT: /* 520 */ // Label 5: @520 -// CHECK-NEXT: /* 520 */ GIM_Reject, -// CHECK-NEXT: /* 521 */ }; // Size: 521 bytes +// CHECK-NEXT: /* 0 */ GIM_SwitchOpcode, /*MI*/0, /*[*/GIMT_Encode2(99), GIMT_Encode2(211), /*)*//*default:*//*Label 5*/ GIMT_Encode4(524), +// CHECK-NEXT: /* 10 */ /*TargetOpcode::G_STORE*//*Label 0*/ GIMT_Encode4(458), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), +// CHECK-NEXT: /* 182 */ /*TargetOpcode::G_SEXT*//*Label 1*/ GIMT_Encode4(476), GIMT_Encode4(0), +// CHECK-NEXT: /* 190 */ /*TargetOpcode::G_ZEXT*//*Label 2*/ GIMT_Encode4(488), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), +// CHECK-NEXT: /* 418 */ /*TargetOpcode::G_FNEG*//*Label 3*/ GIMT_Encode4(500), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), +// CHECK-NEXT: /* 454 */ /*TargetOpcode::G_FABS*//*Label 4*/ GIMT_Encode4(512), +// CHECK-NEXT: /* 458 */ // Label 0: @458 +// CHECK-NEXT: /* 458 */ GIM_Try, /*On fail goto*//*Label 6*/ GIMT_Encode4(475), // Rule ID 2 // +// CHECK-NEXT: /* 463 */ GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule2Enabled), +// CHECK-NEXT: /* 466 */ // MIs[0] x +// CHECK-NEXT: /* 466 */ // No operand predicates +// CHECK-NEXT: /* 466 */ // MIs[0] y +// CHECK-NEXT: /* 466 */ // No operand predicates +// CHECK-NEXT: /* 466 */ GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_GICombiner0), +// CHECK-NEXT: /* 470 */ GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_GICombiner1), +// CHECK-NEXT: /* 474 */ // Combiner Rule #2: TwoMatchNoApply +// CHECK-NEXT: /* 474 */ GIR_EraseRootFromParent_Done, +// CHECK-NEXT: /* 475 */ // Label 6: @475 +// CHECK-NEXT: /* 475 */ GIM_Reject, +// CHECK-NEXT: /* 476 */ // Label 1: @476 +// CHECK-NEXT: /* 476 */ GIM_Try, /*On fail goto*//*Label 7*/ GIMT_Encode4(487), // Rule ID 3 // +// CHECK-NEXT: /* 481 */ GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule3Enabled), +// CHECK-NEXT: /* 484 */ // MIs[0] a +// CHECK-NEXT: /* 484 */ // No operand predicates +// CHECK-NEXT: /* 484 */ // MIs[0] y +// CHECK-NEXT: /* 484 */ // No operand predicates +// CHECK-NEXT: /* 484 */ // Combiner Rule #3: NoMatchTwoApply +// CHECK-NEXT: /* 484 */ GIR_DoneWithCustomAction, /*Fn*/GIMT_Encode2(GICXXCustomAction_GICombiner2), +// CHECK-NEXT: /* 487 */ // Label 7: @487 +// CHECK-NEXT: /* 487 */ GIM_Reject, +// CHECK-NEXT: /* 488 */ // Label 2: @488 +// CHECK-NEXT: /* 488 */ GIM_Try, /*On fail goto*//*Label 8*/ GIMT_Encode4(499), // Rule ID 4 // +// CHECK-NEXT: /* 493 */ GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule4Enabled), +// CHECK-NEXT: /* 496 */ // MIs[0] a +// CHECK-NEXT: /* 496 */ // No operand predicates +// CHECK-NEXT: /* 496 */ // MIs[0] y +// CHECK-NEXT: /* 496 */ // No operand predicates +// CHECK-NEXT: /* 496 */ // Combiner Rule #4: CombineCXXOrder +// CHECK-NEXT: /* 496 */ GIR_DoneWithCustomAction, /*Fn*/GIMT_Encode2(GICXXCustomAction_GICombiner3), +// CHECK-NEXT: /* 499 */ // Label 8: @499 +// CHECK-NEXT: /* 499 */ GIM_Reject, +// CHECK-NEXT: /* 500 */ // Label 3: @500 +// CHECK-NEXT: /* 500 */ GIM_Try, /*On fail goto*//*Label 9*/ GIMT_Encode4(511), // Rule ID 1 // +// CHECK-NEXT: /* 505 */ GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule1Enabled), +// CHECK-NEXT: /* 508 */ // MIs[0] a +// CHECK-NEXT: /* 508 */ // No operand predicates +// CHECK-NEXT: /* 508 */ // MIs[0] b +// CHECK-NEXT: /* 508 */ // No operand predicates +// CHECK-NEXT: /* 508 */ // Combiner Rule #1: TwoMatchTwoApply +// CHECK-NEXT: /* 508 */ GIR_DoneWithCustomAction, /*Fn*/GIMT_Encode2(GICXXCustomAction_GICombiner1), +// CHECK-NEXT: /* 511 */ // Label 9: @511 +// CHECK-NEXT: /* 511 */ GIM_Reject, +// CHECK-NEXT: /* 512 */ // Label 4: @512 +// CHECK-NEXT: /* 512 */ GIM_Try, /*On fail goto*//*Label 10*/ GIMT_Encode4(523), // Rule ID 0 // +// CHECK-NEXT: /* 517 */ GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule0Enabled), +// CHECK-NEXT: /* 520 */ // MIs[0] a +// CHECK-NEXT: /* 520 */ // No operand predicates +// CHECK-NEXT: /* 520 */ // MIs[0] b +// CHECK-NEXT: /* 520 */ // No operand predicates +// CHECK-NEXT: /* 520 */ // Combiner Rule #0: OneMatchOneApply +// CHECK-NEXT: /* 520 */ GIR_DoneWithCustomAction, /*Fn*/GIMT_Encode2(GICXXCustomAction_GICombiner0), +// CHECK-NEXT: /* 523 */ // Label 10: @523 +// CHECK-NEXT: /* 523 */ GIM_Reject, +// CHECK-NEXT: /* 524 */ // Label 5: @524 +// CHECK-NEXT: /* 524 */ GIM_Reject, +// CHECK-NEXT: /* 525 */ }; // Size: 525 bytes // CHECK-NEXT: return MatchTable0; // CHECK-NEXT: } From ef90b81070a379a91981288c4d7a39493b2aae3d Mon Sep 17 00:00:00 2001 From: Ryan Cowan Date: Wed, 24 Sep 2025 14:21:44 +0000 Subject: [PATCH 2/7] Change check-label to match the the codebase --- llvm/test/CodeGen/AArch64/llvm.modf.ll | 639 +++++++++++-------------- 1 file changed, 289 insertions(+), 350 deletions(-) diff --git a/llvm/test/CodeGen/AArch64/llvm.modf.ll b/llvm/test/CodeGen/AArch64/llvm.modf.ll index 243124a07e136..a3d9b3596b6d6 100644 --- a/llvm/test/CodeGen/AArch64/llvm.modf.ll +++ b/llvm/test/CodeGen/AArch64/llvm.modf.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 -; RUN: llc -mtriple=aarch64-gnu-linux < %s | FileCheck -check-prefixes=CHECK %s -; RUN: llc -mtriple=aarch64-gnu-linux -global-isel < %s | FileCheck -check-prefixes=CHECK-GIS %s +; RUN: llc -mtriple=aarch64-gnu-linux < %s | FileCheck -check-prefixes=CHECK,CHECK-SD %s +; RUN: llc -mtriple=aarch64-gnu-linux -global-isel < %s | FileCheck -check-prefixes=CHECK,CHECK-GI %s define { half, half } @test_modf_f16(half %a) { ; CHECK-LABEL: test_modf_f16: @@ -16,20 +16,6 @@ define { half, half } @test_modf_f16(half %a) { ; CHECK-NEXT: fcvt h1, s1 ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload ; CHECK-NEXT: ret -; -; CHECK-GIS-LABEL: test_modf_f16: -; CHECK-GIS: // %bb.0: -; CHECK-GIS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill -; CHECK-GIS-NEXT: .cfi_def_cfa_offset 16 -; CHECK-GIS-NEXT: .cfi_offset w30, -16 -; CHECK-GIS-NEXT: fcvt s0, h0 -; CHECK-GIS-NEXT: add x0, sp, #12 -; CHECK-GIS-NEXT: bl modff -; CHECK-GIS-NEXT: ldr s1, [sp, #12] -; CHECK-GIS-NEXT: fcvt h0, s0 -; CHECK-GIS-NEXT: fcvt h1, s1 -; CHECK-GIS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload -; CHECK-GIS-NEXT: ret %result = call { half, half } @llvm.modf.f16(half %a) ret { half, half } %result } @@ -46,18 +32,6 @@ define half @test_modf_f16_only_use_fractional_part(half %a) { ; CHECK-NEXT: fcvt h0, s0 ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload ; CHECK-NEXT: ret -; -; CHECK-GIS-LABEL: test_modf_f16_only_use_fractional_part: -; CHECK-GIS: // %bb.0: -; CHECK-GIS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill -; CHECK-GIS-NEXT: .cfi_def_cfa_offset 16 -; CHECK-GIS-NEXT: .cfi_offset w30, -16 -; CHECK-GIS-NEXT: fcvt s0, h0 -; CHECK-GIS-NEXT: add x0, sp, #12 -; CHECK-GIS-NEXT: bl modff -; CHECK-GIS-NEXT: fcvt h0, s0 -; CHECK-GIS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload -; CHECK-GIS-NEXT: ret %result = call { half, half } @llvm.modf.f16(half %a) %result.0 = extractvalue { half, half } %result, 0 ret half %result.0 @@ -76,114 +50,101 @@ define half @test_modf_f16_only_use_integral_part(half %a) { ; CHECK-NEXT: fcvt h0, s0 ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload ; CHECK-NEXT: ret -; -; CHECK-GIS-LABEL: test_modf_f16_only_use_integral_part: -; CHECK-GIS: // %bb.0: -; CHECK-GIS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill -; CHECK-GIS-NEXT: .cfi_def_cfa_offset 16 -; CHECK-GIS-NEXT: .cfi_offset w30, -16 -; CHECK-GIS-NEXT: fcvt s0, h0 -; CHECK-GIS-NEXT: add x0, sp, #12 -; CHECK-GIS-NEXT: bl modff -; CHECK-GIS-NEXT: ldr s0, [sp, #12] -; CHECK-GIS-NEXT: fcvt h0, s0 -; CHECK-GIS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload -; CHECK-GIS-NEXT: ret %result = call { half, half } @llvm.modf.f16(half %a) %result.1 = extractvalue { half, half } %result, 1 ret half %result.1 } define { <2 x half>, <2 x half> } @test_modf_v2f16(<2 x half> %a) { -; CHECK-LABEL: test_modf_v2f16: -; CHECK: // %bb.0: -; CHECK-NEXT: sub sp, sp, #64 -; CHECK-NEXT: str x30, [sp, #48] // 8-byte Folded Spill -; CHECK-NEXT: .cfi_def_cfa_offset 64 -; CHECK-NEXT: .cfi_offset w30, -16 -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: mov h1, v0.h[1] -; CHECK-NEXT: str q0, [sp] // 16-byte Folded Spill -; CHECK-NEXT: add x0, sp, #44 -; CHECK-NEXT: fcvt s0, h1 -; CHECK-NEXT: bl modff -; CHECK-NEXT: ldr q1, [sp] // 16-byte Folded Reload -; CHECK-NEXT: fcvt h0, s0 -; CHECK-NEXT: add x0, sp, #40 -; CHECK-NEXT: fcvt s1, h1 -; CHECK-NEXT: str q0, [sp, #16] // 16-byte Folded Spill -; CHECK-NEXT: fmov s0, s1 -; CHECK-NEXT: bl modff -; CHECK-NEXT: ldr q1, [sp] // 16-byte Folded Reload -; CHECK-NEXT: fcvt h2, s0 -; CHECK-NEXT: add x0, sp, #56 -; CHECK-NEXT: mov h1, v1.h[2] -; CHECK-NEXT: fcvt s0, h1 -; CHECK-NEXT: ldr q1, [sp, #16] // 16-byte Folded Reload -; CHECK-NEXT: mov v2.h[1], v1.h[0] -; CHECK-NEXT: str q2, [sp, #16] // 16-byte Folded Spill -; CHECK-NEXT: bl modff -; CHECK-NEXT: ldr q1, [sp] // 16-byte Folded Reload -; CHECK-NEXT: fcvt h2, s0 -; CHECK-NEXT: add x0, sp, #60 -; CHECK-NEXT: mov h1, v1.h[3] -; CHECK-NEXT: fcvt s0, h1 -; CHECK-NEXT: ldr q1, [sp, #16] // 16-byte Folded Reload -; CHECK-NEXT: mov v1.h[2], v2.h[0] -; CHECK-NEXT: str q1, [sp, #16] // 16-byte Folded Spill -; CHECK-NEXT: bl modff -; CHECK-NEXT: ldp s2, s1, [sp, #40] -; CHECK-NEXT: fcvt h4, s0 -; CHECK-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload -; CHECK-NEXT: ldr x30, [sp, #48] // 8-byte Folded Reload -; CHECK-NEXT: fcvt h3, s1 -; CHECK-NEXT: fcvt h1, s2 -; CHECK-NEXT: ldr s2, [sp, #56] -; CHECK-NEXT: mov v0.h[3], v4.h[0] -; CHECK-NEXT: fcvt h2, s2 -; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0 -; CHECK-NEXT: mov v1.h[1], v3.h[0] -; CHECK-NEXT: ldr s3, [sp, #60] -; CHECK-NEXT: mov v1.h[2], v2.h[0] -; CHECK-NEXT: fcvt h2, s3 -; CHECK-NEXT: mov v1.h[3], v2.h[0] -; CHECK-NEXT: // kill: def $d1 killed $d1 killed $q1 -; CHECK-NEXT: add sp, sp, #64 -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_modf_v2f16: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: sub sp, sp, #64 +; CHECK-SD-NEXT: str x30, [sp, #48] // 8-byte Folded Spill +; CHECK-SD-NEXT: .cfi_def_cfa_offset 64 +; CHECK-SD-NEXT: .cfi_offset w30, -16 +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: mov h1, v0.h[1] +; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill +; CHECK-SD-NEXT: add x0, sp, #44 +; CHECK-SD-NEXT: fcvt s0, h1 +; CHECK-SD-NEXT: bl modff +; CHECK-SD-NEXT: ldr q1, [sp] // 16-byte Folded Reload +; CHECK-SD-NEXT: fcvt h0, s0 +; CHECK-SD-NEXT: add x0, sp, #40 +; CHECK-SD-NEXT: fcvt s1, h1 +; CHECK-SD-NEXT: str q0, [sp, #16] // 16-byte Folded Spill +; CHECK-SD-NEXT: fmov s0, s1 +; CHECK-SD-NEXT: bl modff +; CHECK-SD-NEXT: ldr q1, [sp] // 16-byte Folded Reload +; CHECK-SD-NEXT: fcvt h2, s0 +; CHECK-SD-NEXT: add x0, sp, #56 +; CHECK-SD-NEXT: mov h1, v1.h[2] +; CHECK-SD-NEXT: fcvt s0, h1 +; CHECK-SD-NEXT: ldr q1, [sp, #16] // 16-byte Folded Reload +; CHECK-SD-NEXT: mov v2.h[1], v1.h[0] +; CHECK-SD-NEXT: str q2, [sp, #16] // 16-byte Folded Spill +; CHECK-SD-NEXT: bl modff +; CHECK-SD-NEXT: ldr q1, [sp] // 16-byte Folded Reload +; CHECK-SD-NEXT: fcvt h2, s0 +; CHECK-SD-NEXT: add x0, sp, #60 +; CHECK-SD-NEXT: mov h1, v1.h[3] +; CHECK-SD-NEXT: fcvt s0, h1 +; CHECK-SD-NEXT: ldr q1, [sp, #16] // 16-byte Folded Reload +; CHECK-SD-NEXT: mov v1.h[2], v2.h[0] +; CHECK-SD-NEXT: str q1, [sp, #16] // 16-byte Folded Spill +; CHECK-SD-NEXT: bl modff +; CHECK-SD-NEXT: ldp s2, s1, [sp, #40] +; CHECK-SD-NEXT: fcvt h4, s0 +; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload +; CHECK-SD-NEXT: ldr x30, [sp, #48] // 8-byte Folded Reload +; CHECK-SD-NEXT: fcvt h3, s1 +; CHECK-SD-NEXT: fcvt h1, s2 +; CHECK-SD-NEXT: ldr s2, [sp, #56] +; CHECK-SD-NEXT: mov v0.h[3], v4.h[0] +; CHECK-SD-NEXT: fcvt h2, s2 +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-SD-NEXT: mov v1.h[1], v3.h[0] +; CHECK-SD-NEXT: ldr s3, [sp, #60] +; CHECK-SD-NEXT: mov v1.h[2], v2.h[0] +; CHECK-SD-NEXT: fcvt h2, s3 +; CHECK-SD-NEXT: mov v1.h[3], v2.h[0] +; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1 +; CHECK-SD-NEXT: add sp, sp, #64 +; CHECK-SD-NEXT: ret ; -; CHECK-GIS-LABEL: test_modf_v2f16: -; CHECK-GIS: // %bb.0: -; CHECK-GIS-NEXT: sub sp, sp, #64 -; CHECK-GIS-NEXT: str d8, [sp, #48] // 8-byte Folded Spill -; CHECK-GIS-NEXT: str x30, [sp, #56] // 8-byte Folded Spill -; CHECK-GIS-NEXT: .cfi_def_cfa_offset 64 -; CHECK-GIS-NEXT: .cfi_offset w30, -8 -; CHECK-GIS-NEXT: .cfi_offset b8, -16 -; CHECK-GIS-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-GIS-NEXT: mov h8, v0.h[1] -; CHECK-GIS-NEXT: add x0, sp, #40 -; CHECK-GIS-NEXT: fcvt s0, h0 -; CHECK-GIS-NEXT: bl modff -; CHECK-GIS-NEXT: fcvt h0, s0 -; CHECK-GIS-NEXT: ldr s1, [sp, #40] -; CHECK-GIS-NEXT: add x0, sp, #44 -; CHECK-GIS-NEXT: str q0, [sp] // 16-byte Folded Spill -; CHECK-GIS-NEXT: fcvt h0, s1 -; CHECK-GIS-NEXT: str q0, [sp, #16] // 16-byte Folded Spill -; CHECK-GIS-NEXT: fcvt s0, h8 -; CHECK-GIS-NEXT: bl modff -; CHECK-GIS-NEXT: ldr s1, [sp, #44] -; CHECK-GIS-NEXT: fcvt h3, s0 -; CHECK-GIS-NEXT: ldr x30, [sp, #56] // 8-byte Folded Reload -; CHECK-GIS-NEXT: ldr d8, [sp, #48] // 8-byte Folded Reload -; CHECK-GIS-NEXT: fcvt h2, s1 -; CHECK-GIS-NEXT: ldp q0, q1, [sp] // 32-byte Folded Reload -; CHECK-GIS-NEXT: mov v0.h[1], v3.h[0] -; CHECK-GIS-NEXT: mov v1.h[1], v2.h[0] -; CHECK-GIS-NEXT: // kill: def $d0 killed $d0 killed $q0 -; CHECK-GIS-NEXT: // kill: def $d1 killed $d1 killed $q1 -; CHECK-GIS-NEXT: add sp, sp, #64 -; CHECK-GIS-NEXT: ret +; CHECK-GI-LABEL: test_modf_v2f16: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: sub sp, sp, #64 +; CHECK-GI-NEXT: str d8, [sp, #48] // 8-byte Folded Spill +; CHECK-GI-NEXT: str x30, [sp, #56] // 8-byte Folded Spill +; CHECK-GI-NEXT: .cfi_def_cfa_offset 64 +; CHECK-GI-NEXT: .cfi_offset w30, -8 +; CHECK-GI-NEXT: .cfi_offset b8, -16 +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: mov h8, v0.h[1] +; CHECK-GI-NEXT: add x0, sp, #40 +; CHECK-GI-NEXT: fcvt s0, h0 +; CHECK-GI-NEXT: bl modff +; CHECK-GI-NEXT: fcvt h0, s0 +; CHECK-GI-NEXT: ldr s1, [sp, #40] +; CHECK-GI-NEXT: add x0, sp, #44 +; CHECK-GI-NEXT: str q0, [sp] // 16-byte Folded Spill +; CHECK-GI-NEXT: fcvt h0, s1 +; CHECK-GI-NEXT: str q0, [sp, #16] // 16-byte Folded Spill +; CHECK-GI-NEXT: fcvt s0, h8 +; CHECK-GI-NEXT: bl modff +; CHECK-GI-NEXT: ldr s1, [sp, #44] +; CHECK-GI-NEXT: fcvt h3, s0 +; CHECK-GI-NEXT: ldr x30, [sp, #56] // 8-byte Folded Reload +; CHECK-GI-NEXT: ldr d8, [sp, #48] // 8-byte Folded Reload +; CHECK-GI-NEXT: fcvt h2, s1 +; CHECK-GI-NEXT: ldp q0, q1, [sp] // 32-byte Folded Reload +; CHECK-GI-NEXT: mov v0.h[1], v3.h[0] +; CHECK-GI-NEXT: mov v1.h[1], v2.h[0] +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-GI-NEXT: // kill: def $d1 killed $d1 killed $q1 +; CHECK-GI-NEXT: add sp, sp, #64 +; CHECK-GI-NEXT: ret %result = call { <2 x half>, <2 x half> } @llvm.modf.v2f16(<2 x half> %a) ret { <2 x half>, <2 x half> } %result } @@ -199,172 +160,161 @@ define { float, float } @test_modf_f32(float %a) { ; CHECK-NEXT: ldr s1, [sp, #12] ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload ; CHECK-NEXT: ret -; -; CHECK-GIS-LABEL: test_modf_f32: -; CHECK-GIS: // %bb.0: -; CHECK-GIS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill -; CHECK-GIS-NEXT: .cfi_def_cfa_offset 16 -; CHECK-GIS-NEXT: .cfi_offset w30, -16 -; CHECK-GIS-NEXT: add x0, sp, #12 -; CHECK-GIS-NEXT: bl modff -; CHECK-GIS-NEXT: ldr s1, [sp, #12] -; CHECK-GIS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload -; CHECK-GIS-NEXT: ret %result = call { float, float } @llvm.modf.f32(float %a) ret { float, float } %result } define { <3 x float>, <3 x float> } @test_modf_v3f32(<3 x float> %a) { -; CHECK-LABEL: test_modf_v3f32: -; CHECK: // %bb.0: -; CHECK-NEXT: sub sp, sp, #80 -; CHECK-NEXT: str x30, [sp, #48] // 8-byte Folded Spill -; CHECK-NEXT: stp x20, x19, [sp, #64] // 16-byte Folded Spill -; CHECK-NEXT: .cfi_def_cfa_offset 80 -; CHECK-NEXT: .cfi_offset w19, -8 -; CHECK-NEXT: .cfi_offset w20, -16 -; CHECK-NEXT: .cfi_offset w30, -32 -; CHECK-NEXT: str q0, [sp, #16] // 16-byte Folded Spill -; CHECK-NEXT: mov s0, v0.s[1] -; CHECK-NEXT: add x0, sp, #56 -; CHECK-NEXT: add x19, sp, #56 -; CHECK-NEXT: bl modff -; CHECK-NEXT: // kill: def $s0 killed $s0 def $q0 -; CHECK-NEXT: str q0, [sp] // 16-byte Folded Spill -; CHECK-NEXT: add x0, sp, #44 -; CHECK-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload -; CHECK-NEXT: // kill: def $s0 killed $s0 killed $q0 -; CHECK-NEXT: bl modff -; CHECK-NEXT: ldr q1, [sp] // 16-byte Folded Reload -; CHECK-NEXT: // kill: def $s0 killed $s0 def $q0 -; CHECK-NEXT: add x0, sp, #60 -; CHECK-NEXT: add x20, sp, #60 -; CHECK-NEXT: mov v0.s[1], v1.s[0] -; CHECK-NEXT: str q0, [sp] // 16-byte Folded Spill -; CHECK-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload -; CHECK-NEXT: mov s0, v0.s[2] -; CHECK-NEXT: bl modff -; CHECK-NEXT: ldr s1, [sp, #44] -; CHECK-NEXT: ldr q2, [sp] // 16-byte Folded Reload -; CHECK-NEXT: // kill: def $s0 killed $s0 def $q0 -; CHECK-NEXT: ldr x30, [sp, #48] // 8-byte Folded Reload -; CHECK-NEXT: ld1 { v1.s }[1], [x19] -; CHECK-NEXT: mov v2.s[2], v0.s[0] -; CHECK-NEXT: ld1 { v1.s }[2], [x20] -; CHECK-NEXT: ldp x20, x19, [sp, #64] // 16-byte Folded Reload -; CHECK-NEXT: mov v0.16b, v2.16b -; CHECK-NEXT: add sp, sp, #80 -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_modf_v3f32: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: sub sp, sp, #80 +; CHECK-SD-NEXT: str x30, [sp, #48] // 8-byte Folded Spill +; CHECK-SD-NEXT: stp x20, x19, [sp, #64] // 16-byte Folded Spill +; CHECK-SD-NEXT: .cfi_def_cfa_offset 80 +; CHECK-SD-NEXT: .cfi_offset w19, -8 +; CHECK-SD-NEXT: .cfi_offset w20, -16 +; CHECK-SD-NEXT: .cfi_offset w30, -32 +; CHECK-SD-NEXT: str q0, [sp, #16] // 16-byte Folded Spill +; CHECK-SD-NEXT: mov s0, v0.s[1] +; CHECK-SD-NEXT: add x0, sp, #56 +; CHECK-SD-NEXT: add x19, sp, #56 +; CHECK-SD-NEXT: bl modff +; CHECK-SD-NEXT: // kill: def $s0 killed $s0 def $q0 +; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill +; CHECK-SD-NEXT: add x0, sp, #44 +; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload +; CHECK-SD-NEXT: // kill: def $s0 killed $s0 killed $q0 +; CHECK-SD-NEXT: bl modff +; CHECK-SD-NEXT: ldr q1, [sp] // 16-byte Folded Reload +; CHECK-SD-NEXT: // kill: def $s0 killed $s0 def $q0 +; CHECK-SD-NEXT: add x0, sp, #60 +; CHECK-SD-NEXT: add x20, sp, #60 +; CHECK-SD-NEXT: mov v0.s[1], v1.s[0] +; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill +; CHECK-SD-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload +; CHECK-SD-NEXT: mov s0, v0.s[2] +; CHECK-SD-NEXT: bl modff +; CHECK-SD-NEXT: ldr s1, [sp, #44] +; CHECK-SD-NEXT: ldr q2, [sp] // 16-byte Folded Reload +; CHECK-SD-NEXT: // kill: def $s0 killed $s0 def $q0 +; CHECK-SD-NEXT: ldr x30, [sp, #48] // 8-byte Folded Reload +; CHECK-SD-NEXT: ld1 { v1.s }[1], [x19] +; CHECK-SD-NEXT: mov v2.s[2], v0.s[0] +; CHECK-SD-NEXT: ld1 { v1.s }[2], [x20] +; CHECK-SD-NEXT: ldp x20, x19, [sp, #64] // 16-byte Folded Reload +; CHECK-SD-NEXT: mov v0.16b, v2.16b +; CHECK-SD-NEXT: add sp, sp, #80 +; CHECK-SD-NEXT: ret ; -; CHECK-GIS-LABEL: test_modf_v3f32: -; CHECK-GIS: // %bb.0: -; CHECK-GIS-NEXT: sub sp, sp, #112 -; CHECK-GIS-NEXT: stp d9, d8, [sp, #80] // 16-byte Folded Spill -; CHECK-GIS-NEXT: stp x30, x19, [sp, #96] // 16-byte Folded Spill -; CHECK-GIS-NEXT: .cfi_def_cfa_offset 112 -; CHECK-GIS-NEXT: .cfi_offset w19, -8 -; CHECK-GIS-NEXT: .cfi_offset w30, -16 -; CHECK-GIS-NEXT: .cfi_offset b8, -24 -; CHECK-GIS-NEXT: .cfi_offset b9, -32 -; CHECK-GIS-NEXT: add x0, sp, #68 -; CHECK-GIS-NEXT: mov s8, v0.s[1] -; CHECK-GIS-NEXT: mov s9, v0.s[2] -; CHECK-GIS-NEXT: // kill: def $s0 killed $s0 killed $q0 -; CHECK-GIS-NEXT: bl modff -; CHECK-GIS-NEXT: ldr s1, [sp, #68] -; CHECK-GIS-NEXT: // kill: def $s0 killed $s0 def $q0 -; CHECK-GIS-NEXT: add x0, sp, #72 -; CHECK-GIS-NEXT: stp q0, q1, [sp, #32] // 32-byte Folded Spill -; CHECK-GIS-NEXT: fmov s0, s8 -; CHECK-GIS-NEXT: bl modff -; CHECK-GIS-NEXT: // kill: def $s0 killed $s0 def $q0 -; CHECK-GIS-NEXT: str q0, [sp] // 16-byte Folded Spill -; CHECK-GIS-NEXT: add x0, sp, #76 -; CHECK-GIS-NEXT: add x19, sp, #76 -; CHECK-GIS-NEXT: ldr s0, [sp, #72] -; CHECK-GIS-NEXT: str q0, [sp, #16] // 16-byte Folded Spill -; CHECK-GIS-NEXT: fmov s0, s9 -; CHECK-GIS-NEXT: bl modff -; CHECK-GIS-NEXT: ldp q3, q2, [sp, #16] // 32-byte Folded Reload -; CHECK-GIS-NEXT: // kill: def $s0 killed $s0 def $q0 -; CHECK-GIS-NEXT: ldr q1, [sp] // 16-byte Folded Reload -; CHECK-GIS-NEXT: ldp d9, d8, [sp, #80] // 16-byte Folded Reload -; CHECK-GIS-NEXT: mov v2.s[1], v1.s[0] -; CHECK-GIS-NEXT: ldr q1, [sp, #48] // 16-byte Folded Reload -; CHECK-GIS-NEXT: mov v1.s[1], v3.s[0] -; CHECK-GIS-NEXT: mov v2.s[2], v0.s[0] -; CHECK-GIS-NEXT: ld1 { v1.s }[2], [x19] -; CHECK-GIS-NEXT: ldp x30, x19, [sp, #96] // 16-byte Folded Reload -; CHECK-GIS-NEXT: mov v0.16b, v2.16b -; CHECK-GIS-NEXT: add sp, sp, #112 -; CHECK-GIS-NEXT: ret +; CHECK-GI-LABEL: test_modf_v3f32: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: sub sp, sp, #112 +; CHECK-GI-NEXT: stp d9, d8, [sp, #80] // 16-byte Folded Spill +; CHECK-GI-NEXT: stp x30, x19, [sp, #96] // 16-byte Folded Spill +; CHECK-GI-NEXT: .cfi_def_cfa_offset 112 +; CHECK-GI-NEXT: .cfi_offset w19, -8 +; CHECK-GI-NEXT: .cfi_offset w30, -16 +; CHECK-GI-NEXT: .cfi_offset b8, -24 +; CHECK-GI-NEXT: .cfi_offset b9, -32 +; CHECK-GI-NEXT: add x0, sp, #68 +; CHECK-GI-NEXT: mov s8, v0.s[1] +; CHECK-GI-NEXT: mov s9, v0.s[2] +; CHECK-GI-NEXT: // kill: def $s0 killed $s0 killed $q0 +; CHECK-GI-NEXT: bl modff +; CHECK-GI-NEXT: ldr s1, [sp, #68] +; CHECK-GI-NEXT: // kill: def $s0 killed $s0 def $q0 +; CHECK-GI-NEXT: add x0, sp, #72 +; CHECK-GI-NEXT: stp q0, q1, [sp, #32] // 32-byte Folded Spill +; CHECK-GI-NEXT: fmov s0, s8 +; CHECK-GI-NEXT: bl modff +; CHECK-GI-NEXT: // kill: def $s0 killed $s0 def $q0 +; CHECK-GI-NEXT: str q0, [sp] // 16-byte Folded Spill +; CHECK-GI-NEXT: add x0, sp, #76 +; CHECK-GI-NEXT: add x19, sp, #76 +; CHECK-GI-NEXT: ldr s0, [sp, #72] +; CHECK-GI-NEXT: str q0, [sp, #16] // 16-byte Folded Spill +; CHECK-GI-NEXT: fmov s0, s9 +; CHECK-GI-NEXT: bl modff +; CHECK-GI-NEXT: ldp q3, q2, [sp, #16] // 32-byte Folded Reload +; CHECK-GI-NEXT: // kill: def $s0 killed $s0 def $q0 +; CHECK-GI-NEXT: ldr q1, [sp] // 16-byte Folded Reload +; CHECK-GI-NEXT: ldp d9, d8, [sp, #80] // 16-byte Folded Reload +; CHECK-GI-NEXT: mov v2.s[1], v1.s[0] +; CHECK-GI-NEXT: ldr q1, [sp, #48] // 16-byte Folded Reload +; CHECK-GI-NEXT: mov v1.s[1], v3.s[0] +; CHECK-GI-NEXT: mov v2.s[2], v0.s[0] +; CHECK-GI-NEXT: ld1 { v1.s }[2], [x19] +; CHECK-GI-NEXT: ldp x30, x19, [sp, #96] // 16-byte Folded Reload +; CHECK-GI-NEXT: mov v0.16b, v2.16b +; CHECK-GI-NEXT: add sp, sp, #112 +; CHECK-GI-NEXT: ret %result = call { <3 x float>, <3 x float> } @llvm.modf.v3f32(<3 x float> %a) ret { <3 x float>, <3 x float> } %result } define { <2 x float>, <2 x float> } @test_modf_v2f32(<2 x float> %a) { -; CHECK-LABEL: test_modf_v2f32: -; CHECK: // %bb.0: -; CHECK-NEXT: sub sp, sp, #64 -; CHECK-NEXT: stp x30, x19, [sp, #48] // 16-byte Folded Spill -; CHECK-NEXT: .cfi_def_cfa_offset 64 -; CHECK-NEXT: .cfi_offset w19, -8 -; CHECK-NEXT: .cfi_offset w30, -16 -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: str q0, [sp] // 16-byte Folded Spill -; CHECK-NEXT: add x0, sp, #40 -; CHECK-NEXT: add x19, sp, #40 -; CHECK-NEXT: mov s0, v0.s[1] -; CHECK-NEXT: bl modff -; CHECK-NEXT: // kill: def $s0 killed $s0 def $q0 -; CHECK-NEXT: str q0, [sp, #16] // 16-byte Folded Spill -; CHECK-NEXT: add x0, sp, #44 -; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload -; CHECK-NEXT: // kill: def $s0 killed $s0 killed $q0 -; CHECK-NEXT: bl modff -; CHECK-NEXT: ldr s1, [sp, #44] -; CHECK-NEXT: ldr q2, [sp, #16] // 16-byte Folded Reload -; CHECK-NEXT: // kill: def $s0 killed $s0 def $q0 -; CHECK-NEXT: ld1 { v1.s }[1], [x19] -; CHECK-NEXT: ldp x30, x19, [sp, #48] // 16-byte Folded Reload -; CHECK-NEXT: mov v0.s[1], v2.s[0] -; CHECK-NEXT: // kill: def $d1 killed $d1 killed $q1 -; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0 -; CHECK-NEXT: add sp, sp, #64 -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_modf_v2f32: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: sub sp, sp, #64 +; CHECK-SD-NEXT: stp x30, x19, [sp, #48] // 16-byte Folded Spill +; CHECK-SD-NEXT: .cfi_def_cfa_offset 64 +; CHECK-SD-NEXT: .cfi_offset w19, -8 +; CHECK-SD-NEXT: .cfi_offset w30, -16 +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill +; CHECK-SD-NEXT: add x0, sp, #40 +; CHECK-SD-NEXT: add x19, sp, #40 +; CHECK-SD-NEXT: mov s0, v0.s[1] +; CHECK-SD-NEXT: bl modff +; CHECK-SD-NEXT: // kill: def $s0 killed $s0 def $q0 +; CHECK-SD-NEXT: str q0, [sp, #16] // 16-byte Folded Spill +; CHECK-SD-NEXT: add x0, sp, #44 +; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload +; CHECK-SD-NEXT: // kill: def $s0 killed $s0 killed $q0 +; CHECK-SD-NEXT: bl modff +; CHECK-SD-NEXT: ldr s1, [sp, #44] +; CHECK-SD-NEXT: ldr q2, [sp, #16] // 16-byte Folded Reload +; CHECK-SD-NEXT: // kill: def $s0 killed $s0 def $q0 +; CHECK-SD-NEXT: ld1 { v1.s }[1], [x19] +; CHECK-SD-NEXT: ldp x30, x19, [sp, #48] // 16-byte Folded Reload +; CHECK-SD-NEXT: mov v0.s[1], v2.s[0] +; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1 +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-SD-NEXT: add sp, sp, #64 +; CHECK-SD-NEXT: ret ; -; CHECK-GIS-LABEL: test_modf_v2f32: -; CHECK-GIS: // %bb.0: -; CHECK-GIS-NEXT: sub sp, sp, #64 -; CHECK-GIS-NEXT: str d8, [sp, #32] // 8-byte Folded Spill -; CHECK-GIS-NEXT: stp x30, x19, [sp, #48] // 16-byte Folded Spill -; CHECK-GIS-NEXT: .cfi_def_cfa_offset 64 -; CHECK-GIS-NEXT: .cfi_offset w19, -8 -; CHECK-GIS-NEXT: .cfi_offset w30, -16 -; CHECK-GIS-NEXT: .cfi_offset b8, -32 -; CHECK-GIS-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-GIS-NEXT: add x0, sp, #40 -; CHECK-GIS-NEXT: mov s8, v0.s[1] -; CHECK-GIS-NEXT: // kill: def $s0 killed $s0 killed $q0 -; CHECK-GIS-NEXT: bl modff -; CHECK-GIS-NEXT: // kill: def $s0 killed $s0 def $q0 -; CHECK-GIS-NEXT: str q0, [sp] // 16-byte Folded Spill -; CHECK-GIS-NEXT: add x0, sp, #44 -; CHECK-GIS-NEXT: add x19, sp, #44 -; CHECK-GIS-NEXT: ldr s0, [sp, #40] -; CHECK-GIS-NEXT: str q0, [sp, #16] // 16-byte Folded Spill -; CHECK-GIS-NEXT: fmov s0, s8 -; CHECK-GIS-NEXT: bl modff -; CHECK-GIS-NEXT: ldp q2, q1, [sp] // 32-byte Folded Reload -; CHECK-GIS-NEXT: // kill: def $s0 killed $s0 def $q0 -; CHECK-GIS-NEXT: ldr d8, [sp, #32] // 8-byte Folded Reload -; CHECK-GIS-NEXT: mov v2.s[1], v0.s[0] -; CHECK-GIS-NEXT: ld1 { v1.s }[1], [x19] -; CHECK-GIS-NEXT: ldp x30, x19, [sp, #48] // 16-byte Folded Reload -; CHECK-GIS-NEXT: // kill: def $d1 killed $d1 killed $q1 -; CHECK-GIS-NEXT: fmov d0, d2 -; CHECK-GIS-NEXT: add sp, sp, #64 -; CHECK-GIS-NEXT: ret +; CHECK-GI-LABEL: test_modf_v2f32: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: sub sp, sp, #64 +; CHECK-GI-NEXT: str d8, [sp, #32] // 8-byte Folded Spill +; CHECK-GI-NEXT: stp x30, x19, [sp, #48] // 16-byte Folded Spill +; CHECK-GI-NEXT: .cfi_def_cfa_offset 64 +; CHECK-GI-NEXT: .cfi_offset w19, -8 +; CHECK-GI-NEXT: .cfi_offset w30, -16 +; CHECK-GI-NEXT: .cfi_offset b8, -32 +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: add x0, sp, #40 +; CHECK-GI-NEXT: mov s8, v0.s[1] +; CHECK-GI-NEXT: // kill: def $s0 killed $s0 killed $q0 +; CHECK-GI-NEXT: bl modff +; CHECK-GI-NEXT: // kill: def $s0 killed $s0 def $q0 +; CHECK-GI-NEXT: str q0, [sp] // 16-byte Folded Spill +; CHECK-GI-NEXT: add x0, sp, #44 +; CHECK-GI-NEXT: add x19, sp, #44 +; CHECK-GI-NEXT: ldr s0, [sp, #40] +; CHECK-GI-NEXT: str q0, [sp, #16] // 16-byte Folded Spill +; CHECK-GI-NEXT: fmov s0, s8 +; CHECK-GI-NEXT: bl modff +; CHECK-GI-NEXT: ldp q2, q1, [sp] // 32-byte Folded Reload +; CHECK-GI-NEXT: // kill: def $s0 killed $s0 def $q0 +; CHECK-GI-NEXT: ldr d8, [sp, #32] // 8-byte Folded Reload +; CHECK-GI-NEXT: mov v2.s[1], v0.s[0] +; CHECK-GI-NEXT: ld1 { v1.s }[1], [x19] +; CHECK-GI-NEXT: ldp x30, x19, [sp, #48] // 16-byte Folded Reload +; CHECK-GI-NEXT: // kill: def $d1 killed $d1 killed $q1 +; CHECK-GI-NEXT: fmov d0, d2 +; CHECK-GI-NEXT: add sp, sp, #64 +; CHECK-GI-NEXT: ret %result = call { <2 x float>, <2 x float> } @llvm.modf.v2f32(<2 x float> %a) ret { <2 x float>, <2 x float> } %result } @@ -380,79 +330,68 @@ define { double, double } @test_modf_f64(double %a) { ; CHECK-NEXT: ldr d1, [sp, #8] ; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload ; CHECK-NEXT: ret -; -; CHECK-GIS-LABEL: test_modf_f64: -; CHECK-GIS: // %bb.0: -; CHECK-GIS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill -; CHECK-GIS-NEXT: .cfi_def_cfa_offset 16 -; CHECK-GIS-NEXT: .cfi_offset w30, -16 -; CHECK-GIS-NEXT: add x0, sp, #8 -; CHECK-GIS-NEXT: bl modf -; CHECK-GIS-NEXT: ldr d1, [sp, #8] -; CHECK-GIS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload -; CHECK-GIS-NEXT: ret %result = call { double, double } @llvm.modf.f64(double %a) ret { double, double } %result } define { <2 x double>, <2 x double> } @test_modf_v2f64(<2 x double> %a) { -; CHECK-LABEL: test_modf_v2f64: -; CHECK: // %bb.0: -; CHECK-NEXT: sub sp, sp, #64 -; CHECK-NEXT: stp x30, x19, [sp, #48] // 16-byte Folded Spill -; CHECK-NEXT: .cfi_def_cfa_offset 64 -; CHECK-NEXT: .cfi_offset w19, -8 -; CHECK-NEXT: .cfi_offset w30, -16 -; CHECK-NEXT: str q0, [sp] // 16-byte Folded Spill -; CHECK-NEXT: mov d0, v0.d[1] -; CHECK-NEXT: add x0, sp, #32 -; CHECK-NEXT: add x19, sp, #32 -; CHECK-NEXT: bl modf -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: str q0, [sp, #16] // 16-byte Folded Spill -; CHECK-NEXT: add x0, sp, #40 -; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload -; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0 -; CHECK-NEXT: bl modf -; CHECK-NEXT: ldr d1, [sp, #40] -; CHECK-NEXT: ldr q2, [sp, #16] // 16-byte Folded Reload -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: ld1 { v1.d }[1], [x19] -; CHECK-NEXT: ldp x30, x19, [sp, #48] // 16-byte Folded Reload -; CHECK-NEXT: mov v0.d[1], v2.d[0] -; CHECK-NEXT: add sp, sp, #64 -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_modf_v2f64: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: sub sp, sp, #64 +; CHECK-SD-NEXT: stp x30, x19, [sp, #48] // 16-byte Folded Spill +; CHECK-SD-NEXT: .cfi_def_cfa_offset 64 +; CHECK-SD-NEXT: .cfi_offset w19, -8 +; CHECK-SD-NEXT: .cfi_offset w30, -16 +; CHECK-SD-NEXT: str q0, [sp] // 16-byte Folded Spill +; CHECK-SD-NEXT: mov d0, v0.d[1] +; CHECK-SD-NEXT: add x0, sp, #32 +; CHECK-SD-NEXT: add x19, sp, #32 +; CHECK-SD-NEXT: bl modf +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: str q0, [sp, #16] // 16-byte Folded Spill +; CHECK-SD-NEXT: add x0, sp, #40 +; CHECK-SD-NEXT: ldr q0, [sp] // 16-byte Folded Reload +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-SD-NEXT: bl modf +; CHECK-SD-NEXT: ldr d1, [sp, #40] +; CHECK-SD-NEXT: ldr q2, [sp, #16] // 16-byte Folded Reload +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: ld1 { v1.d }[1], [x19] +; CHECK-SD-NEXT: ldp x30, x19, [sp, #48] // 16-byte Folded Reload +; CHECK-SD-NEXT: mov v0.d[1], v2.d[0] +; CHECK-SD-NEXT: add sp, sp, #64 +; CHECK-SD-NEXT: ret ; -; CHECK-GIS-LABEL: test_modf_v2f64: -; CHECK-GIS: // %bb.0: -; CHECK-GIS-NEXT: sub sp, sp, #80 -; CHECK-GIS-NEXT: str d8, [sp, #48] // 8-byte Folded Spill -; CHECK-GIS-NEXT: stp x30, x19, [sp, #64] // 16-byte Folded Spill -; CHECK-GIS-NEXT: .cfi_def_cfa_offset 80 -; CHECK-GIS-NEXT: .cfi_offset w19, -8 -; CHECK-GIS-NEXT: .cfi_offset w30, -16 -; CHECK-GIS-NEXT: .cfi_offset b8, -32 -; CHECK-GIS-NEXT: add x0, sp, #40 -; CHECK-GIS-NEXT: mov d8, v0.d[1] -; CHECK-GIS-NEXT: // kill: def $d0 killed $d0 killed $q0 -; CHECK-GIS-NEXT: bl modf -; CHECK-GIS-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-GIS-NEXT: str q0, [sp] // 16-byte Folded Spill -; CHECK-GIS-NEXT: add x0, sp, #56 -; CHECK-GIS-NEXT: add x19, sp, #56 -; CHECK-GIS-NEXT: ldr d0, [sp, #40] -; CHECK-GIS-NEXT: str q0, [sp, #16] // 16-byte Folded Spill -; CHECK-GIS-NEXT: fmov d0, d8 -; CHECK-GIS-NEXT: bl modf -; CHECK-GIS-NEXT: ldp q2, q1, [sp] // 32-byte Folded Reload -; CHECK-GIS-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-GIS-NEXT: ldr d8, [sp, #48] // 8-byte Folded Reload -; CHECK-GIS-NEXT: mov v2.d[1], v0.d[0] -; CHECK-GIS-NEXT: ld1 { v1.d }[1], [x19] -; CHECK-GIS-NEXT: ldp x30, x19, [sp, #64] // 16-byte Folded Reload -; CHECK-GIS-NEXT: mov v0.16b, v2.16b -; CHECK-GIS-NEXT: add sp, sp, #80 -; CHECK-GIS-NEXT: ret +; CHECK-GI-LABEL: test_modf_v2f64: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: sub sp, sp, #80 +; CHECK-GI-NEXT: str d8, [sp, #48] // 8-byte Folded Spill +; CHECK-GI-NEXT: stp x30, x19, [sp, #64] // 16-byte Folded Spill +; CHECK-GI-NEXT: .cfi_def_cfa_offset 80 +; CHECK-GI-NEXT: .cfi_offset w19, -8 +; CHECK-GI-NEXT: .cfi_offset w30, -16 +; CHECK-GI-NEXT: .cfi_offset b8, -32 +; CHECK-GI-NEXT: add x0, sp, #40 +; CHECK-GI-NEXT: mov d8, v0.d[1] +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-GI-NEXT: bl modf +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: str q0, [sp] // 16-byte Folded Spill +; CHECK-GI-NEXT: add x0, sp, #56 +; CHECK-GI-NEXT: add x19, sp, #56 +; CHECK-GI-NEXT: ldr d0, [sp, #40] +; CHECK-GI-NEXT: str q0, [sp, #16] // 16-byte Folded Spill +; CHECK-GI-NEXT: fmov d0, d8 +; CHECK-GI-NEXT: bl modf +; CHECK-GI-NEXT: ldp q2, q1, [sp] // 32-byte Folded Reload +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: ldr d8, [sp, #48] // 8-byte Folded Reload +; CHECK-GI-NEXT: mov v2.d[1], v0.d[0] +; CHECK-GI-NEXT: ld1 { v1.d }[1], [x19] +; CHECK-GI-NEXT: ldp x30, x19, [sp, #64] // 16-byte Folded Reload +; CHECK-GI-NEXT: mov v0.16b, v2.16b +; CHECK-GI-NEXT: add sp, sp, #80 +; CHECK-GI-NEXT: ret %result = call { <2 x double>, <2 x double> } @llvm.modf.v2f64(<2 x double> %a) ret { <2 x double>, <2 x double> } %result } From 92badbfb6ecf1765b3f23bb579905831500bbd7a Mon Sep 17 00:00:00 2001 From: Ryan Cowan Date: Thu, 25 Sep 2025 09:36:25 +0100 Subject: [PATCH 3/7] Change use of MI to MIRBuilder for getting the Machine Function. Co-authored-by: Matt Arsenault --- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp index ddeaa52d5fea0..5dee3339badfa 100644 --- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp +++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp @@ -708,7 +708,7 @@ LegalizerHelper::LegalizeResult LegalizerHelper::emitModfLibcall(MachineInstr &MI, MachineIRBuilder &MIRBuilder, unsigned Size, Type *OpType, LostDebugLocObserver &LocObserver) { - MachineFunction &MF = *MI.getMF(); + MachineFunction &MF = MIRBuilder.getMF(); MachineRegisterInfo &MRI = MF.getRegInfo(); Register DstFrac = MI.getOperand(0).getReg(); From d8767ddc9302ec04eea23e31ed8896947c432f68 Mon Sep 17 00:00:00 2001 From: Ryan Cowan Date: Thu, 25 Sep 2025 08:59:16 +0000 Subject: [PATCH 4/7] Rely on end to end testing in lieu of irtranslator tests --- .../AArch64/GlobalISel/irtranslator-modf.ll | 140 ------------------ llvm/test/CodeGen/AArch64/llvm.modf.ll | 17 +++ 2 files changed, 17 insertions(+), 140 deletions(-) delete mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-modf.ll diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-modf.ll b/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-modf.ll deleted file mode 100644 index b4ab099e6ac4f..0000000000000 --- a/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-modf.ll +++ /dev/null @@ -1,140 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py -; RUN: llc -O0 -mtriple=aarch64-linux-gnu -global-isel -stop-after=irtranslator %s -o - | FileCheck %s - -define { half, half } @test_modf_f16(half %a) { - ; CHECK-LABEL: name: test_modf_f16 - ; CHECK: bb.1 (%ir-block.0): - ; CHECK-NEXT: liveins: $h0 - ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $h0 - ; CHECK-NEXT: [[FMODF:%[0-9]+]]:_(s16), [[FMODF1:%[0-9]+]]:_ = G_FMODF [[COPY]] - ; CHECK-NEXT: $h0 = COPY [[FMODF]](s16) - ; CHECK-NEXT: $h1 = COPY [[FMODF1]](s16) - ; CHECK-NEXT: RET_ReallyLR implicit $h0, implicit $h1 - %result = call { half, half } @llvm.modf.f16(half %a) - ret { half, half } %result -} - -define { <2 x half>, <2 x half> } @test_modf_v2f16(<2 x half> %a) { - ; CHECK-LABEL: name: test_modf_v2f16 - ; CHECK: bb.1 (%ir-block.0): - ; CHECK-NEXT: liveins: $d0 - ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0 - ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) - ; CHECK-NEXT: [[FMODF:%[0-9]+]]:_(<2 x s16>), [[FMODF1:%[0-9]+]]:_ = G_FMODF [[UV]] - ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[FMODF]](<2 x s16>) - ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF - ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[UV2]](s16), [[UV3]](s16), [[DEF]](s16), [[DEF]](s16) - ; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s16), [[UV5:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[FMODF1]](<2 x s16>) - ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[UV4]](s16), [[UV5]](s16), [[DEF]](s16), [[DEF]](s16) - ; CHECK-NEXT: $d0 = COPY [[BUILD_VECTOR]](<4 x s16>) - ; CHECK-NEXT: $d1 = COPY [[BUILD_VECTOR1]](<4 x s16>) - ; CHECK-NEXT: RET_ReallyLR implicit $d0, implicit $d1 - %result = call { <2 x half>, <2 x half> } @llvm.modf.v2f16(<2 x half> %a) - ret { <2 x half>, <2 x half> } %result -} - -define { float, float } @test_modf_f32(float %a) { - ; CHECK-LABEL: name: test_modf_f32 - ; CHECK: bb.1 (%ir-block.0): - ; CHECK-NEXT: liveins: $s0 - ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $s0 - ; CHECK-NEXT: [[FMODF:%[0-9]+]]:_(s32), [[FMODF1:%[0-9]+]]:_ = G_FMODF [[COPY]] - ; CHECK-NEXT: $s0 = COPY [[FMODF]](s32) - ; CHECK-NEXT: $s1 = COPY [[FMODF1]](s32) - ; CHECK-NEXT: RET_ReallyLR implicit $s0, implicit $s1 - %result = call { float, float } @llvm.modf.f32(float %a) - ret { float, float } %result -} - -define { <2 x float>, <2 x float> } @test_modf_v2f32(<2 x float> %a) { - ; CHECK-LABEL: name: test_modf_v2f32 - ; CHECK: bb.1 (%ir-block.0): - ; CHECK-NEXT: liveins: $d0 - ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0 - ; CHECK-NEXT: [[FMODF:%[0-9]+]]:_(<2 x s32>), [[FMODF1:%[0-9]+]]:_ = G_FMODF [[COPY]] - ; CHECK-NEXT: $d0 = COPY [[FMODF]](<2 x s32>) - ; CHECK-NEXT: $d1 = COPY [[FMODF1]](<2 x s32>) - ; CHECK-NEXT: RET_ReallyLR implicit $d0, implicit $d1 - %result = call { <2 x float>, <2 x float> } @llvm.modf.v2f32(<2 x float> %a) - ret { <2 x float>, <2 x float> } %result -} - -define { double, double } @test_modf_f64(double %a) { - ; CHECK-LABEL: name: test_modf_f64 - ; CHECK: bb.1 (%ir-block.0): - ; CHECK-NEXT: liveins: $d0 - ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $d0 - ; CHECK-NEXT: [[FMODF:%[0-9]+]]:_(s64), [[FMODF1:%[0-9]+]]:_ = G_FMODF [[COPY]] - ; CHECK-NEXT: $d0 = COPY [[FMODF]](s64) - ; CHECK-NEXT: $d1 = COPY [[FMODF1]](s64) - ; CHECK-NEXT: RET_ReallyLR implicit $d0, implicit $d1 - %result = call { double, double } @llvm.modf.f64(double %a) - ret { double, double } %result -} - -define { <2 x double>, <2 x double> } @test_modf_v2f64(<2 x double> %a) { - ; CHECK-LABEL: name: test_modf_v2f64 - ; CHECK: bb.1 (%ir-block.0): - ; CHECK-NEXT: liveins: $q0 - ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0 - ; CHECK-NEXT: [[FMODF:%[0-9]+]]:_(<2 x s64>), [[FMODF1:%[0-9]+]]:_ = G_FMODF [[COPY]] - ; CHECK-NEXT: $q0 = COPY [[FMODF]](<2 x s64>) - ; CHECK-NEXT: $q1 = COPY [[FMODF1]](<2 x s64>) - ; CHECK-NEXT: RET_ReallyLR implicit $q0, implicit $q1 - %result = call { <2 x double>, <2 x double> } @llvm.modf.v2f64(<2 x double> %a) - ret { <2 x double>, <2 x double> } %result -} - -define { fp128, fp128 } @test_modf_fp128(fp128 %a) { - ; CHECK-LABEL: name: test_modf_fp128 - ; CHECK: bb.1 (%ir-block.0): - ; CHECK-NEXT: liveins: $q0 - ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $q0 - ; CHECK-NEXT: [[FMODF:%[0-9]+]]:_(s128), [[FMODF1:%[0-9]+]]:_ = G_FMODF [[COPY]] - ; CHECK-NEXT: $q0 = COPY [[FMODF]](s128) - ; CHECK-NEXT: $q1 = COPY [[FMODF1]](s128) - ; CHECK-NEXT: RET_ReallyLR implicit $q0, implicit $q1 - %result = call { fp128, fp128 } @llvm.modf.fp128(fp128 %a) - ret { fp128, fp128 } %result -} - -define { <2 x fp128>, <2 x fp128> } @test_modf_v2fp128(<2 x fp128> %a) { - ; CHECK-LABEL: name: test_modf_v2fp128 - ; CHECK: bb.1 (%ir-block.0): - ; CHECK-NEXT: liveins: $q0, $q1 - ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $q0 - ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s128) = COPY $q1 - ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s128>) = G_BUILD_VECTOR [[COPY]](s128), [[COPY1]](s128) - ; CHECK-NEXT: [[FMODF:%[0-9]+]]:_(<2 x s128>), [[FMODF1:%[0-9]+]]:_ = G_FMODF [[BUILD_VECTOR]] - ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s128), [[UV1:%[0-9]+]]:_(s128) = G_UNMERGE_VALUES [[FMODF]](<2 x s128>) - ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s128), [[UV3:%[0-9]+]]:_(s128) = G_UNMERGE_VALUES [[FMODF1]](<2 x s128>) - ; CHECK-NEXT: $q0 = COPY [[UV]](s128) - ; CHECK-NEXT: $q1 = COPY [[UV1]](s128) - ; CHECK-NEXT: $q2 = COPY [[UV2]](s128) - ; CHECK-NEXT: $q3 = COPY [[UV3]](s128) - ; CHECK-NEXT: RET_ReallyLR implicit $q0, implicit $q1, implicit $q2, implicit $q3 - %result = call { <2 x fp128>, <2 x fp128> } @llvm.modf.v2fp128(<2 x fp128> %a) - ret { <2 x fp128>, <2 x fp128> } %result -} - -define { float, float } @test_modf_f32_afn(float %a) { - ; CHECK-LABEL: name: test_modf_f32_afn - ; CHECK: bb.1 (%ir-block.0): - ; CHECK-NEXT: liveins: $s0 - ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $s0 - ; CHECK-NEXT: [[FMODF:%[0-9]+]]:_(s32), [[FMODF1:%[0-9]+]]:_ = afn G_FMODF [[COPY]] - ; CHECK-NEXT: $s0 = COPY [[FMODF]](s32) - ; CHECK-NEXT: $s1 = COPY [[FMODF1]](s32) - ; CHECK-NEXT: RET_ReallyLR implicit $s0, implicit $s1 - %result = call afn { float, float } @llvm.modf.f32(float %a) - ret { float, float } %result -} diff --git a/llvm/test/CodeGen/AArch64/llvm.modf.ll b/llvm/test/CodeGen/AArch64/llvm.modf.ll index a3d9b3596b6d6..503742fa1c443 100644 --- a/llvm/test/CodeGen/AArch64/llvm.modf.ll +++ b/llvm/test/CodeGen/AArch64/llvm.modf.ll @@ -395,3 +395,20 @@ define { <2 x double>, <2 x double> } @test_modf_v2f64(<2 x double> %a) { %result = call { <2 x double>, <2 x double> } @llvm.modf.v2f64(<2 x double> %a) ret { <2 x double>, <2 x double> } %result } + +define { fp128, fp128 } @test_modf_fp128(fp128 %a) { +; CHECK-LABEL: test_modf_fp128: +; CHECK: // %bb.0: +; CHECK-NEXT: sub sp, sp, #32 +; CHECK-NEXT: str x30, [sp, #16] // 8-byte Folded Spill +; CHECK-NEXT: .cfi_def_cfa_offset 32 +; CHECK-NEXT: .cfi_offset w30, -16 +; CHECK-NEXT: mov x0, sp +; CHECK-NEXT: bl modfl +; CHECK-NEXT: ldr q1, [sp] +; CHECK-NEXT: ldr x30, [sp, #16] // 8-byte Folded Reload +; CHECK-NEXT: add sp, sp, #32 +; CHECK-NEXT: ret + %result = call { fp128, fp128 } @llvm.modf.fp128(fp128 %a) + ret { fp128, fp128 } %result +} From 3897d005c804ea0d990dba74616cb2e2a10e241f Mon Sep 17 00:00:00 2001 From: Ryan Cowan Date: Thu, 25 Sep 2025 10:43:24 +0000 Subject: [PATCH 5/7] Switch to WidenScalarDst & change insert pointer --- .../CodeGen/GlobalISel/LegalizerHelper.cpp | 18 +++++------------ .../AArch64/GlobalISel/legalize-modf.mir | 20 +++++++++---------- 2 files changed, 15 insertions(+), 23 deletions(-) diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp index 5dee3339badfa..cffaf7ce5aa06 100644 --- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp +++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp @@ -3386,21 +3386,13 @@ LegalizerHelper::widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy) { Observer.changedInstr(MI); return Legalized; case TargetOpcode::G_FMODF: { + Observer.changingInstr(MI); widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_FPEXT); - Register DstFrac = MI.getOperand(0).getReg(); - Register DstInt = MI.getOperand(1).getReg(); - - Register DstFracWide = MRI.createGenericVirtualRegister(WideTy); - Register DstIntWide = MRI.createGenericVirtualRegister(WideTy); - Register SrcWide = MI.getOperand(2).getReg(); - - MIRBuilder.buildInstr(TargetOpcode::G_FMODF, {DstFracWide, DstIntWide}, - {SrcWide}); - - MIRBuilder.buildFPTrunc(DstFrac, DstFracWide); - MIRBuilder.buildFPTrunc(DstInt, DstIntWide); - MI.eraseFromParent(); + widenScalarDst(MI, WideTy, 1, TargetOpcode::G_FPTRUNC); + MIRBuilder.setInsertPt(MIRBuilder.getMBB(), --MIRBuilder.getInsertPt()); + widenScalarDst(MI, WideTy, 0, TargetOpcode::G_FPTRUNC); + Observer.changedInstr(MI); return Legalized; } case TargetOpcode::G_FPOWI: diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-modf.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-modf.mir index 5d0d94ed2a274..36ac7ebf007d1 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-modf.mir +++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-modf.mir @@ -15,10 +15,10 @@ body: | ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $s0 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %stack.0) - ; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[COPY1]](s32) - ; CHECK-NEXT: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[LOAD]](s32) - ; CHECK-NEXT: $h0 = COPY [[FPTRUNC]](s16) - ; CHECK-NEXT: $h1 = COPY [[FPTRUNC1]](s16) + ; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[LOAD]](s32) + ; CHECK-NEXT: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[COPY1]](s32) + ; CHECK-NEXT: $h0 = COPY [[FPTRUNC1]](s16) + ; CHECK-NEXT: $h1 = COPY [[FPTRUNC]](s16) ; CHECK-NEXT: RET_ReallyLR implicit $h0, implicit $h1 %0:_(s16) = COPY $h0 %1:_(s16), %2:_(s16) = G_FMODF %0 @@ -64,8 +64,8 @@ body: | ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $s0 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %stack.1) - ; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[COPY1]](s32) - ; CHECK-NEXT: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[LOAD]](s32) + ; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[LOAD]](s32) + ; CHECK-NEXT: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[COPY1]](s32) ; CHECK-NEXT: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[UV1]](s16) ; CHECK-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp @@ -75,11 +75,11 @@ body: | ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $s0 ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (s32) from %stack.0) - ; CHECK-NEXT: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC [[COPY2]](s32) - ; CHECK-NEXT: [[FPTRUNC3:%[0-9]+]]:_(s16) = G_FPTRUNC [[LOAD1]](s32) + ; CHECK-NEXT: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC [[LOAD1]](s32) + ; CHECK-NEXT: [[FPTRUNC3:%[0-9]+]]:_(s16) = G_FPTRUNC [[COPY2]](s32) ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF - ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[FPTRUNC]](s16), [[FPTRUNC2]](s16), [[DEF]](s16), [[DEF]](s16) - ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[FPTRUNC1]](s16), [[FPTRUNC3]](s16), [[DEF]](s16), [[DEF]](s16) + ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[FPTRUNC1]](s16), [[FPTRUNC3]](s16), [[DEF]](s16), [[DEF]](s16) + ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[FPTRUNC]](s16), [[FPTRUNC2]](s16), [[DEF]](s16), [[DEF]](s16) ; CHECK-NEXT: $d0 = COPY [[BUILD_VECTOR]](<4 x s16>) ; CHECK-NEXT: $d1 = COPY [[BUILD_VECTOR1]](<4 x s16>) ; CHECK-NEXT: RET_ReallyLR implicit $d0, implicit $d1 From f44d72d127318f17936ccb80f13e4954006bd993 Mon Sep 17 00:00:00 2001 From: Ryan Cowan Date: Fri, 26 Sep 2025 12:52:56 +0000 Subject: [PATCH 6/7] Fix test post rebase --- llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td b/llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td index 6be1720a6da23..fdabc53a3ff3b 100644 --- a/llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td +++ b/llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td @@ -535,7 +535,7 @@ def : Pat<(frag GPR32:$src1, complex:$src2, complex:$src3), // R00O-NEXT: GIM_Reject, // R00O: // Label [[DEFAULT_NUM]]: @[[DEFAULT]] // R00O-NEXT: GIM_Reject, -// R00O-NEXT: }; // Size: 1898 bytes +// R00O-NEXT: }; // Size: 1902 bytes def INSNBOB : I<(outs GPR32:$dst), (ins GPR32:$src1, GPR32:$src2, GPR32:$src3, GPR32:$src4), [(set GPR32:$dst, From ce27cdb5c4f3bc80d562ca02250a304ad5dd873c Mon Sep 17 00:00:00 2001 From: Ryan Cowan Date: Mon, 29 Sep 2025 14:55:07 +0000 Subject: [PATCH 7/7] Remove unused call to selectModf --- llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp | 3 --- 1 file changed, 3 deletions(-) diff --git a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp index 44cb780565803..a73abb9a6c5e2 100644 --- a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp @@ -3390,9 +3390,6 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register ResVReg, case Intrinsic::spv_discard: { return selectDiscard(ResVReg, ResType, I); } - case Intrinsic::modf: { - return selectModf(ResVReg, ResType, I); - } default: { std::string DiagMsg; raw_string_ostream OS(DiagMsg);