diff --git a/mlir/include/mlir/Conversion/Normalize/Normalize.h b/mlir/include/mlir/Conversion/Normalize/Normalize.h
new file mode 100644
index 0000000000000..650cfe734aeac
--- /dev/null
+++ b/mlir/include/mlir/Conversion/Normalize/Normalize.h
@@ -0,0 +1,22 @@
+//===- Normalize.h - Conversion from MLIR to its canonical form -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef MLIR_CONVERSION_NORMALIZE_NORMALIZE_H
+#define MLIR_CONVERSION_NORMALIZE_NORMALIZE_H
+
+#include <memory>
+
+namespace mlir {
+class Pass;
+
+#define GEN_PASS_DECL_NORMALIZE
+#include "mlir/Conversion/Passes.h.inc"
+
+} // namespace mlir
+
+#endif // MLIR_CONVERSION_NORMALIZE_NORMALIZE_H
diff --git a/mlir/include/mlir/Conversion/Passes.h b/mlir/include/mlir/Conversion/Passes.h
index 40d866ec7bf10..29d4fc9e865a2 100644
--- a/mlir/include/mlir/Conversion/Passes.h
+++ b/mlir/include/mlir/Conversion/Passes.h
@@ -55,6 +55,7 @@
 #include "mlir/Conversion/MemRefToSPIRV/MemRefToSPIRVPass.h"
 #include "mlir/Conversion/NVGPUToNVVM/NVGPUToNVVM.h"
 #include "mlir/Conversion/NVVMToLLVM/NVVMToLLVM.h"
+#include "mlir/Conversion/Normalize/Normalize.h"
 #include "mlir/Conversion/OpenACCToSCF/ConvertOpenACCToSCF.h"
 #include "mlir/Conversion/OpenMPToLLVM/ConvertOpenMPToLLVM.h"
 #include "mlir/Conversion/PDLToPDLInterp/PDLToPDLInterp.h"
diff --git a/mlir/include/mlir/Conversion/Passes.td b/mlir/include/mlir/Conversion/Passes.td
index 70e3e45c225db..d41e58a11921e 100644
--- a/mlir/include/mlir/Conversion/Passes.td
+++ b/mlir/include/mlir/Conversion/Passes.td
@@ -975,6 +975,19 @@ def ConvertShardToMPIPass : Pass<"convert-shard-to-mpi"> {
   ];
 }
 
+//===----------------------------------------------------------------------===//
+// Normalize
+//===----------------------------------------------------------------------===//
+def Normalize : Pass<"normalize", "ModuleOp"> {
+  let summary = "Convert MLIR input to its normalized form";
+  let description = [{
+    This pass aims to transform MLIR inputs into a normal form by reordering
+    and renaming instructions while preserving the same semantics. The pass
+    makes it easier to spot semantic differences while diffing two modules
+    which have undergone different passes.
+  }];
+}
+
 //===----------------------------------------------------------------------===//
 // NVVMToLLVM
 //===----------------------------------------------------------------------===//
diff --git a/mlir/lib/Conversion/CMakeLists.txt b/mlir/lib/Conversion/CMakeLists.txt
index bebf1b8fff3f9..01c9fe10055d4 100644
--- a/mlir/lib/Conversion/CMakeLists.txt
+++ b/mlir/lib/Conversion/CMakeLists.txt
@@ -46,6 +46,7 @@ add_subdirectory(MemRefToLLVM)
 add_subdirectory(MemRefToSPIRV)
 add_subdirectory(ShardToMPI)
 add_subdirectory(MPIToLLVM)
+add_subdirectory(Normalize)
 add_subdirectory(NVGPUToNVVM)
 add_subdirectory(NVVMToLLVM)
 add_subdirectory(OpenACCToSCF)
diff --git a/mlir/lib/Conversion/Normalize/CMakeLists.txt b/mlir/lib/Conversion/Normalize/CMakeLists.txt
new file mode 100644
index 0000000000000..a9944349714e3
--- /dev/null
+++ b/mlir/lib/Conversion/Normalize/CMakeLists.txt
@@ -0,0 +1,24 @@
+add_mlir_conversion_library(MLIRNormalize
+  Normalize.cpp
+
+  ADDITIONAL_HEADER_DIRS
+  ${MLIR_MAIN_INCLUDE_DIR}/mlir/Conversion/Normalize
+
+  DEPENDS
+  MLIRConversionPassIncGen
+
+  LINK_COMPONENTS
+  Core
+
+  LINK_LIBS PUBLIC
+  MLIRArithDialect
+  MLIRControlFlowDialect
+  MLIRFuncDialect
+  MLIRLLVMDialect
+  MLIRMathDialect
+  MLIRPass
+  MLIRSCFDialect
+  MLIRTransforms
+  MLIRVectorDialect
+  MLIRVectorUtils
+)
diff --git a/mlir/lib/Conversion/Normalize/Normalize.cpp b/mlir/lib/Conversion/Normalize/Normalize.cpp
new file mode 100644
index 0000000000000..33bedcd1cb783
--- /dev/null
+++ b/mlir/lib/Conversion/Normalize/Normalize.cpp
@@ -0,0 +1,446 @@
+//===- Normalize.cpp - Conversion from MLIR to its canonical form ---------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "mlir/Conversion/Normalize/Normalize.h"
+
+#include "mlir/Dialect/Func/IR/FuncOps.h"
+#include "mlir/Dialect/Vector/Utils/VectorUtils.h"
+#include "mlir/IR/AsmState.h"
+#include "mlir/Pass/Pass.h"
+#include "mlir/Support/LLVM.h"
+#include "llvm/ADT/Hashing.h"
+
+#include <algorithm>
+#include <iomanip>
+#include <sstream>
+
+namespace mlir {
+#define GEN_PASS_DEF_NORMALIZE
+#include "mlir/Conversion/Passes.h.inc"
+} // namespace mlir
+
+using namespace mlir;
+
+#define DEBUG_TYPE "normalize"
+
+namespace {
+/// NormalizePass aims to transform MLIR into it's normal form
+struct NormalizePass : public impl::NormalizeBase<NormalizePass> {
+  NormalizePass() = default;
+
+  void runOnOperation() override;
+
+private:
+  // Random constant for hashing, so the state isn't zero.
+  const uint64_t magicHashConstant = 0x6acaa36bef8325c5ULL;
+  bool isOutput(Operation &op) const noexcept;
+  void reorderOperations(const SmallVector<Operation *, 16> &outputs);
+  void reorderOperation(Operation *used, Operation *user,
+                        SmallPtrSet<const Operation *, 32> &visited);
+  void renameOperations(const SmallVector<Operation *, 16> &outputs);
+  void renameOperation(Operation *op,
+                       SmallPtrSet<const Operation *, 32> &visited);
+  bool isInitialOperation(Operation *const op) const noexcept;
+  void nameAsInitialOperation(Operation *op,
+                              SmallPtrSet<const Operation *, 32> &visited);
+  void nameAsRegularOperation(Operation *op,
+                              SmallPtrSet<const Operation *, 32> &visited);
+  bool hasOnlyImmediateOperands(Operation *const op) const noexcept;
+  SetVector<int>
+  getOutputFootprint(Operation *op,
+                     SmallPtrSet<const Operation *, 32> &visited) const;
+  void appendRenamedOperands(Operation *op, SmallString<512> &name);
+  void reorderOperationOperandsByName(Operation *op);
+  OpPrintingFlags flags{};
+};
+} // namespace
+
+/// Entry method to the NormalizePass
+void NormalizePass::runOnOperation() {
+  flags.printNameLocAsPrefix(true);
+
+  ModuleOp module = getOperation();
+
+  SmallVector<Operation *, 16> outputs;
+  module.walk([&](Operation *op) {
+    if (isOutput(*op))
+      outputs.push_back(op);
+  });
+
+  reorderOperations(outputs);
+  renameOperations(outputs);
+}
+
+void NormalizePass::renameOperations(
+    const SmallVector<Operation *, 16> &outputs) {
+  SmallPtrSet<const Operation *, 32> visited;
+
+  for (auto *op : outputs)
+    renameOperation(op, visited);
+}
+
+/// Renames operations graphically (recursive) in accordance with the
+/// def-use tree, starting from the initial operations (defs), finishing at
+/// the output (top-most user) operations.
+void NormalizePass::renameOperation(
+    Operation *op, SmallPtrSet<const Operation *, 32> &visited) {
+  if (!visited.count(op)) {
+    visited.insert(op);
+
+    if (isInitialOperation(op)) {
+      nameAsInitialOperation(op, visited);
+    } else {
+      nameAsRegularOperation(op, visited);
+    }
+    if (op->hasTrait<OpTrait::IsCommutative>())
+      reorderOperationOperandsByName(op);
+  }
+}
+
+/// Helper method checking whether a given operation has users and only
+/// immediate operands.
+bool NormalizePass::isInitialOperation(Operation *const op) const noexcept {
+  return !op->use_empty() and hasOnlyImmediateOperands(op);
+}
+
+/// Helper method checking whether all operands of a given operation has a
+/// ConstantLike OpTrait
+bool NormalizePass::hasOnlyImmediateOperands(
+    Operation *const op) const noexcept {
+  for (Value operand : op->getOperands())
+    if (Operation *defOp = operand.getDefiningOp())
+      if (!(defOp->hasTrait<OpTrait::ConstantLike>()))
+        return false;
+  return true;
+}
+
+std::string inline toString(uint64_t const hash) noexcept {
+  std::ostringstream oss;
+  oss << std::hex << std::setw(5) << std::setfill('0') << hash;
+  std::string tmp = oss.str();
+  return tmp.size() > 5 ? tmp.substr(tmp.size() - 5, 5) : tmp;
+}
+
+uint64_t inline strHash(std::string_view data) noexcept {
+  const static uint64_t FNV_OFFSET = 0xcbf29ce484222325ULL;
+  const static uint64_t FNV_PRIME = 0x100000001b3ULL;
+  uint64_t hash = FNV_OFFSET;
+  for (const auto &c : data) {
+    hash ^= static_cast<uint64_t>(c);
+    hash *= FNV_PRIME;
+  }
+  return hash;
+}
+
+std::string inline split(std::string_view str, const char &delimiter,
+                         int indx = 0) noexcept {
+  std::stringstream ss{std::string{str}};
+  std::string item;
+  int cnt = 0;
+  while (std::getline(ss, item, delimiter)) {
+    if (cnt == indx) {
+      std::replace(item.begin(), item.end(), ':', '_');
+      return item;
+    } else {
+      cnt++;
+    }
+  }
+  return nullptr;
+}
+
+/// Names operation following the scheme:
+/// vl00000Callee$Operands$
+///
+/// Where 00000 is a hash calculated considering operation's opcode and output
+/// footprint. Callee's name is only included when operations's type is
+/// CallOp. If the operation has operands, the renaming is further handled
+/// in appendRenamedOperands, otherwise if it's a call operation with no
+/// arguments, void is appended, else a hash of the definition of the operation
+/// is appended.
+void NormalizePass::nameAsInitialOperation(
+    Operation *op, SmallPtrSet<const Operation *, 32> &visited) {
+
+  for (Value operand : op->getOperands())
+    if (Operation *defOp = operand.getDefiningOp())
+      renameOperation(defOp, visited);
+
+  uint64_t hash = magicHashConstant;
+
+  uint64_t opcodeHash = strHash(op->getName().getStringRef().str());
+  hash = llvm::hashing::detail::hash_16_bytes(hash, opcodeHash);
+
+  SmallPtrSet<const Operation *, 32> visitedLocal;
+  SetVector<int> outputFootprint = getOutputFootprint(op, visitedLocal);
+
+  for (const auto &output : outputFootprint)
+    hash = llvm::hashing::detail::hash_16_bytes(hash, output);
+
+  SmallString<512> name;
+  name.append("vl" + std::to_string(hash).substr(0, 5));
+
+  if (auto call = dyn_cast<func::CallOp>(op)) {
+    StringRef callee = call.getCallee();
+    name.append(callee.str());
+  }
+
+  if (op->getNumOperands() == 0) {
+    name.append("$");
+    if (auto call = dyn_cast<func::CallOp>(op)) {
+      name.append("void");
+    } else {
+      std::string textRepresentation;
+      AsmState state(op, flags);
+      llvm::raw_string_ostream stream(textRepresentation);
+      op->print(stream, state);
+      std::string hashStr = toString(strHash(split(stream.str(), '=', 1)));
+      name.append(hashStr);
+    }
+    name.append("$");
+
+    OpBuilder b(op->getContext());
+    StringAttr sat = b.getStringAttr(name);
+    Location newLoc = NameLoc::get(sat, op->getLoc());
+    op->setLoc(newLoc);
+
+    return;
+  }
+
+  appendRenamedOperands(op, name);
+}
+
+/// Names operation following the scheme:
+/// op00000Callee$Operands$
+///
+/// Where 00000 is a hash calculated considering operation's opcode and its
+/// operands opcode. Callee's name is only included when operations's type is
+/// CallOp. A regular operation must have operands, thus the renaming is further
+/// handled in appendRenamedOperands.
+void NormalizePass::nameAsRegularOperation(
+    Operation *op, SmallPtrSet<const Operation *, 32> &visited) {
+
+  for (Value operand : op->getOperands())
+    if (Operation *defOp = operand.getDefiningOp())
+      renameOperation(defOp, visited);
+
+  uint64_t hash = magicHashConstant;
+
+  uint64_t opcodeHash = strHash(op->getName().getStringRef().str());
+  hash = llvm::hashing::detail::hash_16_bytes(hash, opcodeHash);
+
+  SmallVector<uint64_t, 4> operandOpcodes;
+
+  for (Value operand : op->getOperands())
+    if (Operation *defOp = operand.getDefiningOp())
+      operandOpcodes.push_back(strHash(defOp->getName().getStringRef().str()));
+
+  if (op->hasTrait<OpTrait::IsCommutative>())
+    llvm::sort(operandOpcodes.begin(), operandOpcodes.end());
+
+  for (const uint64_t code : operandOpcodes)
+    hash = llvm::hashing::detail::hash_16_bytes(hash, code);
+
+  SmallString<512> name;
+  name.append("op" + std::to_string(hash).substr(0, 5));
+
+  if (auto call = dyn_cast<func::CallOp>(op)) {
+    StringRef callee = call.getCallee();
+    name.append(callee.str());
+  }
+
+  appendRenamedOperands(op, name);
+}
+
+bool inline startsWith(std::string_view base, std::string_view check) noexcept {
+  return base.size() >= check.size() &&
+         std::equal(check.begin(), check.end(), base.begin());
+}
+
+/// This function serves a dual purpose of appending the operands name in the
+/// operation while at the same time shortening it. Because of the recursive
+/// def-use chain traversal, the operands should already have been renamed and
+/// if they were an initial / regular operation, we truncate them by taking the
+/// first 7 characters of the renamed operand. The operand could also have been
+/// a block/function argument which is handled separately.
+void NormalizePass::appendRenamedOperands(Operation *op,
+                                          SmallString<512> &name) {
+  if (op->getNumOperands() == 0)
+    return;
+
+  SmallVector<std::string, 4> operands;
+
+  for (Value operand : op->getOperands()) {
+    if (Operation *defOp = operand.getDefiningOp()) {
+      std::string textRepresentation;
+      AsmState state(defOp, flags);
+      llvm::raw_string_ostream stream(textRepresentation);
+      defOp->print(stream, state);
+      auto operandName = split(stream.str(), '=', 0);
+
+      bool hasNormalName =
+          (startsWith(operandName, "%op") || startsWith(operandName, "%vl"));
+
+      if (hasNormalName) {
+        operands.push_back(operandName.substr(1, 7));
+      } else {
+        operands.push_back(operandName);
+      }
+    } else if (auto ba = dyn_cast<BlockArgument>(operand)) {
+      Block *ownerBlock = ba.getOwner();
+      unsigned argIndex = ba.getArgNumber();
+      if (auto func = dyn_cast<func::FuncOp>(ownerBlock->getParentOp())) {
+        if (&func.front() == ownerBlock) {
+          operands.push_back(std::string("funcArg" + std::to_string(argIndex)));
+        } else {
+          operands.push_back(
+              std::string("blockArg" + std::to_string(argIndex)));
+        }
+      } else {
+        operands.push_back(std::string("blockArg" + std::to_string(argIndex)));
+      }
+    }
+  }
+
+  if (op->hasTrait<OpTrait::IsCommutative>())
+    sort(operands.begin(), operands.end());
+
+  name.append("$");
+  for (size_t i = 0, size_ = operands.size(); i < size_; ++i) {
+    name.append(operands[i]);
+
+    if (i < size_ - 1)
+      name.append("-");
+  }
+  name.append("$");
+
+  OpBuilder b(op->getContext());
+  Location newLoc = NameLoc::get(b.getStringAttr(name), op->getLoc());
+  op->setLoc(newLoc);
+}
+
+/// Reorders operation's operands alphabetically. This method assumes
+/// that passed operation is commutative.
+void NormalizePass::reorderOperationOperandsByName(Operation *op) {
+  if (op->getNumOperands() == 0)
+    return;
+
+  SmallVector<std::pair<std::string, Value>, 4> operands;
+
+  for (Value operand : op->getOperands()) {
+    std::string textRepresentation;
+    llvm::raw_string_ostream stream(textRepresentation);
+    operand.printAsOperand(stream, flags);
+    operands.push_back({stream.str(), operand});
+  }
+
+  if (op->hasTrait<OpTrait::IsCommutative>()) {
+    sort(operands.begin(), operands.end(), [](const auto &a, const auto &b) {
+      return StringRef(a.first).compare_insensitive(b.first) < 0;
+    });
+  }
+
+  for (size_t i = 0, size_ = operands.size(); i < size_; i++) {
+    op->setOperand(i, operands[i].second);
+  }
+}
+
+void NormalizePass::reorderOperations(
+    const SmallVector<Operation *, 16> &outputs) {
+  SmallPtrSet<const Operation *, 32> visited;
+  for (auto *const op : outputs)
+    for (Value operand : op->getOperands())
+      if (Operation *defOp = operand.getDefiningOp())
+        reorderOperation(defOp, op, visited);
+}
+
+/// Reorders operations by walking up the tree from each operand of an output
+/// operation and reducing the def-use distance.
+void NormalizePass::reorderOperation(
+    Operation *used, Operation *user,
+    SmallPtrSet<const Operation *, 32> &visited) {
+  if (!visited.count(used)) {
+    visited.insert(used);
+
+    Block *usedBlock = used->getBlock();
+    Block *userBlock = user->getBlock();
+
+    if (usedBlock == userBlock)
+      used->moveBefore(user);
+    else
+      used->moveBefore(&usedBlock->back());
+
+    for (Value operand : used->getOperands())
+      if (Operation *defOp = operand.getDefiningOp())
+        reorderOperation(defOp, used, visited);
+  }
+}
+
+/// The following Operations are termed as output:
+///  - Terminator operations are outputs
+///  - Any operation that implements MemoryEffectOpInterface and reports at
+///    least one MemoryEffects::Write effect is an output
+///  - Any operation that implements CallOpInterface is treated as an output
+///    (calls are conservatively assumed to possibly produce side effects).
+bool NormalizePass::isOutput(Operation &op) const noexcept {
+  if (op.hasTrait<OpTrait::IsTerminator>())
+    return true;
+
+  if (auto memOp = dyn_cast<MemoryEffectOpInterface>(&op)) {
+    SmallVector<MemoryEffects::EffectInstance, 4> effects;
+    memOp.getEffects(effects);
+    for (auto &effect : effects)
+      if (isa<MemoryEffects::Write>(effect.getEffect()))
+        return true;
+  }
+
+  if (dyn_cast<CallOpInterface>(&op))
+    return true;
+
+  return false;
+}
+
+/// Helper method returning indices (distance from the beginning of the basic
+/// block) of output operations using the given operation. It Walks down the
+/// def-use tree recursively.
+SetVector<int> NormalizePass::getOutputFootprint(
+    Operation *op, SmallPtrSet<const Operation *, 32> &visited) const {
+  SetVector<int> outputsVec;
+  if (!visited.count(op)) {
+    visited.insert(op);
+
+    if (isOutput(*op)) {
+      func::FuncOp func = op->getParentOfType<func::FuncOp>();
+
+      unsigned count = 0;
+      for (Block &block : func.getRegion()) {
+        if (auto it = std::find_if(
+                block.begin(), block.end(),
+                [op](Operation &innerOp) { return &innerOp == op; });
+            it != block.end()) {
+          count += std::distance(block.begin(), it);
+          outputsVec.insert(count);
+          break;
+        } else {
+          count += std::distance(block.begin(), block.end());
+        }
+      }
+
+      return outputsVec;
+    }
+
+    for (OpOperand &use : op->getUses()) {
+      Operation *useOp = use.getOwner();
+      if (useOp) {
+        SetVector<int> outputsUsingUop = getOutputFootprint(useOp, visited);
+
+        outputsVec.insert(outputsUsingUop.begin(), outputsUsingUop.end());
+      }
+    }
+  }
+
+  return outputsVec;
+}
diff --git a/mlir/test/Conversion/Normalize/infinite-loop.mlir b/mlir/test/Conversion/Normalize/infinite-loop.mlir
new file mode 100644
index 0000000000000..1ec6b4551363e
--- /dev/null
+++ b/mlir/test/Conversion/Normalize/infinite-loop.mlir
@@ -0,0 +1,847 @@
+// RUN: mlir-opt %s --normalize --mlir-use-nameloc-as-prefix 2>&1 | FileCheck %s
+
+// CHECK-LABEL:   module {
+
+// CHECK:           func.func @infinte_loop_v1(%[[ARG0:.*]]: memref<?xi32>, %[[ARG1:.*]]: i32) {
+// CHECK:           %vl15969$e5677$ = arith.constant 1 : i32
+// CHECK:           %vl15390$funcArg1-vl15969$ = arith.addi %[[ARG1]], %vl15969$e5677$ : i32
+// CHECK:           cf.br ^bb1(%vl15390$funcArg1-vl15969$, %vl15390$funcArg1-vl15969$ : i32, i32)
+// CHECK:           ^bb1(%0: i32, %1: i32):
+// CHECK:           %vl85743$20b04$ = arith.constant 0 : i32
+// CHECK:           %vl73800$blockArg0-vl85743$ = arith.muli %0, %vl85743$20b04$ : i32
+// CHECK:           %vl85743$ded78$ = arith.constant -1 : i32
+// CHECK:           %op51214$vl73800-vl85743$ = arith.xori %vl73800$blockArg0-vl85743$, %vl85743$ded78$ : i32
+// CHECK:           %op12693$blockArg0-op51214$ = arith.addi %0, %op51214$vl73800-vl85743$ : i32
+// CHECK:           %vl34407$blockArg1-vl85743$ = arith.addi %1, %vl85743$ded78$ : i32
+// CHECK:           %op15672$op12693-vl34407$ = arith.addi %op12693$blockArg0-op51214$, %vl34407$blockArg1-vl85743$ : i32
+// CHECK:           %op97825$op15672-vl73800$ = arith.muli %op15672$op12693-vl34407$, %vl73800$blockArg0-vl85743$ : i32
+// CHECK:           %op51214$op97825-vl85743$ = arith.xori %op97825$op15672-vl73800$, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op15672-op51214$ = arith.addi %op15672$op12693-vl34407$, %op51214$op97825-vl85743$ : i32
+// CHECK:           %op27844$op12343-vl85743$ = arith.addi %op12343$op15672-op51214$, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$ = arith.muli %op27844$op12343-vl85743$, %op97825$op15672-vl73800$ : i32
+// CHECK:           %op51214$op97825-vl85743$_0 = arith.xori %op97825$op27844-op97825$, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$ = arith.addi %op27844$op12343-vl85743$, %op51214$op97825-vl85743$_0 : i32
+// CHECK:           %op27844$op12343-vl85743$_1 = arith.addi %op12343$op27844-op51214$, %vl85743$20b04$ : i32
+// CHECK:           %op27844$op27844-vl85743$ = arith.addi %op27844$op12343-vl85743$_1, %vl85743$20b04$ : i32
+// CHECK:           %op27844$op27844-vl85743$_2 = arith.addi %op27844$op27844-vl85743$, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_3 = arith.muli %op27844$op12343-vl85743$_1, %op97825$op27844-op97825$ : i32
+// CHECK:           %op97825$op27844-op97825$_4 = arith.muli %op27844$op27844-vl85743$_2, %op97825$op27844-op97825$_3 : i32
+// CHECK:           %op51214$op97825-vl85743$_5 = arith.xori %op97825$op27844-op97825$_4, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_6 = arith.addi %op27844$op27844-vl85743$_2, %op51214$op97825-vl85743$_5 : i32
+// CHECK:           %op27844$op12343-vl85743$_7 = arith.addi %op12343$op27844-op51214$_6, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_8 = arith.muli %op27844$op12343-vl85743$_7, %op97825$op27844-op97825$_4 : i32
+// CHECK:           %op51214$op97825-vl85743$_9 = arith.xori %op97825$op27844-op97825$_8, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_10 = arith.addi %op27844$op12343-vl85743$_7, %op51214$op97825-vl85743$_9 : i32
+// CHECK:           %op27844$op12343-vl85743$_11 = arith.addi %op12343$op27844-op51214$_10, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_12 = arith.muli %op27844$op12343-vl85743$_11, %op97825$op27844-op97825$_8 : i32
+// CHECK:           %op51214$op97825-vl85743$_13 = arith.xori %op97825$op27844-op97825$_12, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_14 = arith.addi %op27844$op12343-vl85743$_11, %op51214$op97825-vl85743$_13 : i32
+// CHECK:           %op27844$op12343-vl85743$_15 = arith.addi %op12343$op27844-op51214$_14, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_16 = arith.muli %op27844$op12343-vl85743$_15, %op97825$op27844-op97825$_12 : i32
+// CHECK:           %op51214$op97825-vl85743$_17 = arith.xori %op97825$op27844-op97825$_16, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_18 = arith.addi %op27844$op12343-vl85743$_15, %op51214$op97825-vl85743$_17 : i32
+// CHECK:           %op27844$op12343-vl85743$_19 = arith.addi %op12343$op27844-op51214$_18, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_20 = arith.muli %op27844$op12343-vl85743$_19, %op97825$op27844-op97825$_16 : i32
+// CHECK:           %op51214$op97825-vl85743$_21 = arith.xori %op97825$op27844-op97825$_20, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_22 = arith.addi %op27844$op12343-vl85743$_19, %op51214$op97825-vl85743$_21 : i32
+// CHECK:           %vl85743$51850$ = arith.constant -9 : i32
+// CHECK:           %vl34407$blockArg1-vl85743$_23 = arith.addi %1, %vl85743$51850$ : i32
+// CHECK:           %op17008$vl34407-vl85743$ = arith.muli %vl34407$blockArg1-vl85743$_23, %vl85743$20b04$ : i32
+// CHECK:           %op51214$op17008-vl85743$ = arith.xori %op17008$vl34407-vl85743$, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op51214-vl34407$ = arith.addi %op51214$op17008-vl85743$, %vl34407$blockArg1-vl85743$_23 : i32
+// CHECK:           %op15672$op12343-op12343$ = arith.addi %op12343$op27844-op51214$_22, %op12343$op51214-vl34407$ : i32
+// CHECK:           %op97825$op15672-op97825$ = arith.muli %op15672$op12343-op12343$, %op97825$op27844-op97825$_20 : i32
+// CHECK:           %op51214$op97825-vl85743$_24 = arith.xori %op97825$op15672-op97825$, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op15672-op51214$_25 = arith.addi %op15672$op12343-op12343$, %op51214$op97825-vl85743$_24 : i32
+// CHECK:           %op17008$vl34407-vl85743$_26 = arith.muli %vl34407$blockArg1-vl85743$, %vl85743$20b04$ : i32
+// CHECK:           %op51214$op17008-vl85743$_27 = arith.xori %op17008$vl34407-vl85743$_26, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op51214-vl34407$_28 = arith.addi %op51214$op17008-vl85743$_27, %vl34407$blockArg1-vl85743$ : i32
+// CHECK:           %op97825$op12343-op17008$ = arith.muli %op12343$op51214-vl34407$_28, %op17008$vl34407-vl85743$_26 : i32
+// CHECK:           %op51214$op97825-vl85743$_29 = arith.xori %op97825$op12343-op17008$, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op12343-op51214$ = arith.addi %op12343$op51214-vl34407$_28, %op51214$op97825-vl85743$_29 : i32
+// CHECK:           %op27844$op12343-vl85743$_30 = arith.addi %op12343$op12343-op51214$, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_31 = arith.muli %op27844$op12343-vl85743$_30, %op97825$op12343-op17008$ : i32
+// CHECK:           %op51214$op97825-vl85743$_32 = arith.xori %op97825$op27844-op97825$_31, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_33 = arith.addi %op27844$op12343-vl85743$_30, %op51214$op97825-vl85743$_32 : i32
+// CHECK:           %op15672$op12343-op12343$_34 = arith.addi %op12343$op15672-op51214$_25, %op12343$op27844-op51214$_33 : i32
+// CHECK:           %op97825$op15672-op97825$_35 = arith.muli %op15672$op12343-op12343$_34, %op97825$op15672-op97825$ : i32
+// CHECK:           %op51214$op97825-vl85743$_36 = arith.xori %op97825$op15672-op97825$_35, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op15672-op51214$_37 = arith.addi %op15672$op12343-op12343$_34, %op51214$op97825-vl85743$_36 : i32
+// CHECK:           %op27844$op12343-vl85743$_38 = arith.addi %op12343$op15672-op51214$_37, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_39 = arith.muli %op27844$op12343-vl85743$_38, %op97825$op15672-op97825$_35 : i32
+// CHECK:           %op51214$op97825-vl85743$_40 = arith.xori %op97825$op27844-op97825$_39, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_41 = arith.addi %op27844$op12343-vl85743$_38, %op51214$op97825-vl85743$_40 : i32
+// CHECK:           %op27844$op12343-vl85743$_42 = arith.addi %op12343$op27844-op51214$_41, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_43 = arith.muli %op27844$op12343-vl85743$_42, %op97825$op27844-op97825$_39 : i32
+// CHECK:           %op51214$op97825-vl85743$_44 = arith.xori %op97825$op27844-op97825$_43, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_45 = arith.addi %op27844$op12343-vl85743$_42, %op51214$op97825-vl85743$_44 : i32
+// CHECK:           %vl85743$7b7de$ = arith.constant -14 : i32
+// CHECK:           %vl34407$blockArg1-vl85743$_46 = arith.addi %1, %vl85743$7b7de$ : i32
+// CHECK:           %op17008$vl34407-vl85743$_47 = arith.muli %vl34407$blockArg1-vl85743$_46, %vl85743$20b04$ : i32
+// CHECK:           %op51214$op17008-vl85743$_48 = arith.xori %op17008$vl34407-vl85743$_47, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op51214-vl34407$_49 = arith.addi %op51214$op17008-vl85743$_48, %vl34407$blockArg1-vl85743$_46 : i32
+// CHECK:           %op97825$op12343-op17008$_50 = arith.muli %op12343$op51214-vl34407$_49, %op17008$vl34407-vl85743$_47 : i32
+// CHECK:           %op51214$op97825-vl85743$_51 = arith.xori %op97825$op12343-op17008$_50, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op12343-op51214$_52 = arith.addi %op12343$op51214-vl34407$_49, %op51214$op97825-vl85743$_51 : i32
+// CHECK:           %op27844$op12343-vl85743$_53 = arith.addi %op12343$op12343-op51214$_52, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_54 = arith.muli %op27844$op12343-vl85743$_53, %op97825$op12343-op17008$_50 : i32
+// CHECK:           %op51214$op97825-vl85743$_55 = arith.xori %op97825$op27844-op97825$_54, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_56 = arith.addi %op27844$op12343-vl85743$_53, %op51214$op97825-vl85743$_55 : i32
+// CHECK:           %op27844$op12343-vl85743$_57 = arith.addi %op12343$op27844-op51214$_56, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_58 = arith.muli %op27844$op12343-vl85743$_57, %op97825$op27844-op97825$_54 : i32
+// CHECK:           %op51214$op97825-vl85743$_59 = arith.xori %op97825$op27844-op97825$_58, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_60 = arith.addi %op27844$op12343-vl85743$_57, %op51214$op97825-vl85743$_59 : i32
+// CHECK:           %op27844$op12343-vl85743$_61 = arith.addi %op12343$op27844-op51214$_60, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_62 = arith.muli %op27844$op12343-vl85743$_61, %op97825$op27844-op97825$_58 : i32
+// CHECK:           %op51214$op97825-vl85743$_63 = arith.xori %op97825$op27844-op97825$_62, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_64 = arith.addi %op27844$op12343-vl85743$_61, %op51214$op97825-vl85743$_63 : i32
+// CHECK:           %op27844$op12343-vl85743$_65 = arith.addi %op12343$op27844-op51214$_64, %vl85743$20b04$ : i32
+// CHECK:           %op15672$op12343-op27844$ = arith.addi %op12343$op27844-op51214$_45, %op27844$op12343-vl85743$_65 : i32
+// CHECK:           %op97825$op15672-op97825$_66 = arith.muli %op15672$op12343-op27844$, %op97825$op27844-op97825$_43 : i32
+// CHECK:           %op51214$op97825-vl85743$_67 = arith.xori %op97825$op15672-op97825$_66, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op15672-op51214$_68 = arith.addi %op15672$op12343-op27844$, %op51214$op97825-vl85743$_67 : i32
+// CHECK:           %op15672$op12343-vl34407$ = arith.addi %op12343$op15672-op51214$_68, %vl34407$blockArg1-vl85743$_46 : i32
+// CHECK:           %op97825$op15672-op97825$_69 = arith.muli %op15672$op12343-vl34407$, %op97825$op15672-op97825$_66 : i32
+// CHECK:           %op51214$op97825-vl85743$_70 = arith.xori %op97825$op15672-op97825$_69, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op15672-op51214$_71 = arith.addi %op15672$op12343-vl34407$, %op51214$op97825-vl85743$_70 : i32
+// CHECK:           %vl85743$1e72e$ = arith.constant -21 : i32
+// CHECK:           %vl34407$blockArg1-vl85743$_72 = arith.addi %1, %vl85743$1e72e$ : i32
+// CHECK:           %op17008$vl34407-vl85743$_73 = arith.muli %vl34407$blockArg1-vl85743$_72, %vl85743$20b04$ : i32
+// CHECK:           %op51214$op17008-vl85743$_74 = arith.xori %op17008$vl34407-vl85743$_73, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op51214-vl34407$_75 = arith.addi %op51214$op17008-vl85743$_74, %vl34407$blockArg1-vl85743$_72 : i32
+// CHECK:           %op97825$op12343-op17008$_76 = arith.muli %op12343$op51214-vl34407$_75, %op17008$vl34407-vl85743$_73 : i32
+// CHECK:           %op51214$op97825-vl85743$_77 = arith.xori %op97825$op12343-op17008$_76, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op12343-op51214$_78 = arith.addi %op12343$op51214-vl34407$_75, %op51214$op97825-vl85743$_77 : i32
+// CHECK:           %op27844$op12343-vl85743$_79 = arith.addi %op12343$op12343-op51214$_78, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_80 = arith.muli %op27844$op12343-vl85743$_79, %op97825$op12343-op17008$_76 : i32
+// CHECK:           %op51214$op97825-vl85743$_81 = arith.xori %op97825$op27844-op97825$_80, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_82 = arith.addi %op27844$op12343-vl85743$_79, %op51214$op97825-vl85743$_81 : i32
+// CHECK:           %op27844$op12343-vl85743$_83 = arith.addi %op12343$op27844-op51214$_82, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_84 = arith.muli %op27844$op12343-vl85743$_83, %op97825$op27844-op97825$_80 : i32
+// CHECK:           %op51214$op97825-vl85743$_85 = arith.xori %op97825$op27844-op97825$_84, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_86 = arith.addi %op27844$op12343-vl85743$_83, %op51214$op97825-vl85743$_85 : i32
+// CHECK:           %op27844$op12343-vl85743$_87 = arith.addi %op12343$op27844-op51214$_86, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_88 = arith.muli %op27844$op12343-vl85743$_87, %op97825$op27844-op97825$_84 : i32
+// CHECK:           %op51214$op97825-vl85743$_89 = arith.xori %op97825$op27844-op97825$_88, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_90 = arith.addi %op27844$op12343-vl85743$_87, %op51214$op97825-vl85743$_89 : i32
+// CHECK:           %op27844$op12343-vl85743$_91 = arith.addi %op12343$op27844-op51214$_90, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_92 = arith.muli %op27844$op12343-vl85743$_91, %op97825$op27844-op97825$_88 : i32
+// CHECK:           %op13782$op12343-op97825$ = arith.addi %op12343$op15672-op51214$_71, %op97825$op27844-op97825$_92 : i32
+// CHECK:           %op97825$op13782-op97825$ = arith.muli %op13782$op12343-op97825$, %op97825$op15672-op97825$_69 : i32
+// CHECK:           %op51214$op97825-vl85743$_93 = arith.xori %op97825$op13782-op97825$, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op13782-op51214$ = arith.addi %op13782$op12343-op97825$, %op51214$op97825-vl85743$_93 : i32
+// CHECK:           %op27844$op12343-vl85743$_94 = arith.addi %op12343$op13782-op51214$, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_95 = arith.muli %op27844$op12343-vl85743$_94, %op97825$op13782-op97825$ : i32
+// CHECK:           %op51214$op97825-vl85743$_96 = arith.xori %op97825$op27844-op97825$_95, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_97 = arith.addi %op27844$op12343-vl85743$_94, %op51214$op97825-vl85743$_96 : i32
+// CHECK:           %op27844$op12343-vl85743$_98 = arith.addi %op12343$op27844-op51214$_97, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_99 = arith.muli %op27844$op12343-vl85743$_98, %op97825$op27844-op97825$_95 : i32
+// CHECK:           %op51214$op97825-vl85743$_100 = arith.xori %op97825$op27844-op97825$_99, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_101 = arith.addi %op27844$op12343-vl85743$_98, %op51214$op97825-vl85743$_100 : i32
+// CHECK:           %op27844$op12343-vl85743$_102 = arith.addi %op12343$op27844-op51214$_101, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_103 = arith.muli %op27844$op12343-vl85743$_102, %op97825$op27844-op97825$_99 : i32
+// CHECK:           %op51214$op97825-vl85743$_104 = arith.xori %op97825$op27844-op97825$_103, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_105 = arith.addi %op27844$op12343-vl85743$_102, %op51214$op97825-vl85743$_104 : i32
+// CHECK:           %op27844$op12343-vl85743$_106 = arith.addi %op12343$op27844-op51214$_105, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_107 = arith.muli %op27844$op12343-vl85743$_106, %op97825$op27844-op97825$_103 : i32
+// CHECK:           %op51214$op97825-vl85743$_108 = arith.xori %op97825$op27844-op97825$_107, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_109 = arith.addi %op27844$op12343-vl85743$_106, %op51214$op97825-vl85743$_108 : i32
+// CHECK:           %op27844$op12343-vl85743$_110 = arith.addi %op12343$op27844-op51214$_109, %vl85743$20b04$ : i32
+// CHECK:           %op27844$op27844-vl85743$_111 = arith.addi %op27844$op12343-vl85743$_110, %vl85743$20b04$ : i32
+// CHECK:           %op15672$op27844-vl34407$ = arith.addi %op27844$op27844-vl85743$_111, %vl34407$blockArg1-vl85743$_72 : i32
+// CHECK:           %vl16744$e527e$ = arith.constant 0 : index
+// CHECK:           memref.store %op15672$op27844-vl34407$, %[[ARG0]][%vl16744$e527e$] : memref<?xi32>
+// CHECK:           cf.br ^bb1(%op15672$op27844-vl34407$, %vl34407$blockArg1-vl85743$_72 : i32, i32)
+// CHECK:         }
+func.func @infinte_loop_v1(%arg0: memref<?xi32>, %arg1: i32) {
+    %c1 = arith.constant 1 : i32
+    %a = arith.addi %arg1, %c1 : i32
+    cf.br ^bb1(%a, %a : i32, i32)
+
+    ^bb1(%tmp: i32, %tmp2: i32):
+    %c0 = arith.constant 0 : i32
+    %cneg1 = arith.constant -1 : i32
+    %cneg9 = arith.constant -9 : i32
+    %cneg14 = arith.constant -14 : i32
+    %cneg21 = arith.constant -21 : i32
+    
+    // Branch E: Start with tmp2-based constants
+    %e1 = arith.addi %tmp2, %cneg14 : i32
+    
+    // Branch A: First main chain
+    %tmp3 = arith.muli %tmp, %c0 : i32
+    %tmp4 = arith.xori %tmp3, %cneg1 : i32
+    
+    // Branch D: Another tmp2-based chain
+    %d1 = arith.addi %tmp2, %cneg21 : i32
+    %d2 = arith.muli %d1, %c0 : i32
+    
+    // Branch B: tmp2-cneg1 chain
+    %tmp6 = arith.addi %tmp2, %cneg1 : i32
+    
+    // Branch A continued
+    %tmp5 = arith.addi %tmp, %tmp4 : i32
+    
+    // Branch C: tmp2-cneg9 chain  
+    %base1 = arith.addi %tmp2, %cneg9 : i32
+    
+    // Branch E continued
+    %e2 = arith.muli %e1, %c0 : i32
+    %e3 = arith.xori %e2, %cneg1 : i32
+    
+    // Branch A continued
+    %tmp7 = arith.addi %tmp5, %tmp6 : i32
+    
+    // Branch D continued
+    %d3 = arith.xori %d2, %cneg1 : i32
+    
+    // Branch B continued
+    %alt1 = arith.muli %tmp6, %c0 : i32
+    %alt2 = arith.xori %alt1, %cneg1 : i32
+    
+    // Branch C continued
+    %base2 = arith.muli %base1, %c0 : i32
+    
+    // Branch A continued
+    %tmp8 = arith.muli %tmp7, %tmp3 : i32
+    %tmp9 = arith.xori %tmp8, %cneg1 : i32
+    
+    // Branch E continued
+    %e4 = arith.addi %e1, %e3 : i32
+    
+    // Branch B continued
+    %alt3 = arith.addi %tmp6, %alt2 : i32
+    
+    // Branch D continued
+    %d4 = arith.addi %d1, %d3 : i32
+    %d5 = arith.muli %d4, %d2 : i32
+    
+    // Branch A continued
+    %tmp10 = arith.addi %tmp7, %tmp9 : i32
+    
+    // Branch C continued
+    %base3 = arith.xori %base2, %cneg1 : i32
+    %base4 = arith.addi %base1, %base3 : i32
+    
+    // Branch B continued
+    %alt4 = arith.muli %alt3, %alt1 : i32
+    %alt5 = arith.xori %alt4, %cneg1 : i32
+    
+    // Branch A continued
+    %tmp11 = arith.addi %tmp10, %c0 : i32
+    %tmp12 = arith.muli %tmp11, %tmp8 : i32
+    
+    // Branch E continued
+    %e5 = arith.muli %e4, %e2 : i32
+    %e6 = arith.xori %e5, %cneg1 : i32
+    
+    // Branch D continued
+    %d6 = arith.xori %d5, %cneg1 : i32
+    
+    // Branch A continued
+    %tmp13 = arith.xori %tmp12, %cneg1 : i32
+    %tmp14 = arith.addi %tmp11, %tmp13 : i32
+    
+    // Branch B continued
+    %alt6 = arith.addi %alt3, %alt5 : i32
+    %alt7 = arith.addi %alt6, %c0 : i32
+    
+    // Branch E continued
+    %e7 = arith.addi %e4, %e6 : i32
+    
+    // Branch A continued
+    %tmp15 = arith.addi %tmp14, %c0 : i32
+    %tmp16 = arith.muli %tmp15, %tmp12 : i32
+    
+    // Branch D continued
+    %d7 = arith.addi %d4, %d6 : i32
+    %d8 = arith.addi %d7, %c0 : i32
+    
+    // Branch B continued
+    %alt8 = arith.muli %alt7, %alt4 : i32
+    
+    // Branch A continued
+    %tmp17 = arith.addi %tmp15, %c0 : i32
+    %tmp18 = arith.addi %tmp17, %c0 : i32
+    
+    // Branch E continued
+    %e8 = arith.addi %e7, %c0 : i32
+    %e9 = arith.muli %e8, %e5 : i32
+    
+    // Branch A continued
+    %tmp19 = arith.muli %tmp18, %tmp16 : i32
+    %tmp20 = arith.xori %tmp19, %cneg1 : i32
+    
+    // Branch D continued
+    %d9 = arith.muli %d8, %d5 : i32
+    
+    // Branch B continued
+    %alt9 = arith.xori %alt8, %cneg1 : i32
+    %alt10 = arith.addi %alt7, %alt9 : i32
+    
+    // Branch A continued
+    %tmp21 = arith.addi %tmp18, %tmp20 : i32
+    
+    // Branch E continued
+    %e10 = arith.xori %e9, %cneg1 : i32
+    
+    // Branch A continued
+    %tmp22 = arith.addi %tmp21, %c0 : i32
+    %tmp23 = arith.muli %tmp22, %tmp19 : i32
+    
+    // Branch D continued
+    %d10 = arith.xori %d9, %cneg1 : i32
+    %d11 = arith.addi %d8, %d10 : i32
+    
+    // Branch E continued
+    %e11 = arith.addi %e8, %e10 : i32
+    
+    // Branch A continued
+    %tmp24 = arith.xori %tmp23, %cneg1 : i32
+    %tmp25 = arith.addi %tmp22, %tmp24 : i32
+    
+    // Branch D continued
+    %d12 = arith.addi %d11, %c0 : i32
+    
+    // Branch A continued
+    %tmp26 = arith.addi %tmp25, %c0 : i32
+    %tmp27 = arith.muli %tmp26, %tmp23 : i32
+    
+    // Branch E continued
+    %e12 = arith.addi %e11, %c0 : i32
+    
+    // Branch A continued
+    %tmp28 = arith.xori %tmp27, %cneg1 : i32
+    %tmp29 = arith.addi %tmp26, %tmp28 : i32
+    
+    // Branch D continued
+    %d13 = arith.muli %d12, %d9 : i32
+    %d14 = arith.xori %d13, %cneg1 : i32
+    
+    // Branch A continued
+    %tmp30 = arith.addi %tmp29, %c0 : i32
+    %tmp31 = arith.muli %tmp30, %tmp27 : i32
+    
+    // Branch E continued
+    %e13 = arith.muli %e12, %e9 : i32
+    
+    // Branch A continued
+    %tmp32 = arith.xori %tmp31, %cneg1 : i32
+    %tmp33 = arith.addi %tmp30, %tmp32 : i32
+    
+    // Branch D continued
+    %d15 = arith.addi %d12, %d14 : i32
+    
+    // Branch A continued
+    %tmp34 = arith.addi %tmp33, %c0 : i32
+    %tmp35 = arith.muli %tmp34, %tmp31 : i32
+    
+    // Branch E continued
+    %e14 = arith.xori %e13, %cneg1 : i32
+    %e15 = arith.addi %e12, %e14 : i32
+    
+    // Branch A continued
+    %tmp36 = arith.xori %tmp35, %cneg1 : i32
+    %tmp37 = arith.addi %tmp34, %tmp36 : i32
+    
+    // Branch D continued
+    %d16 = arith.addi %d15, %c0 : i32
+    
+    // First merge: A + C
+    %tmp39 = arith.addi %tmp37, %base4 : i32
+    
+    // Branch E continued
+    %e16 = arith.addi %e15, %c0 : i32
+    
+    // Continue merged chain
+    %tmp40 = arith.muli %tmp39, %tmp35 : i32
+    
+    // Branch D continued
+    %d17 = arith.muli %d16, %d13 : i32
+    
+    // Continue merged chain
+    %tmp41 = arith.xori %tmp40, %cneg1 : i32
+    %tmp42 = arith.addi %tmp39, %tmp41 : i32
+    
+    // Branch E continued
+    %e17 = arith.muli %e16, %e13 : i32
+    %e18 = arith.xori %e17, %cneg1 : i32
+    
+    // Second merge: AB + B
+    %tmp43 = arith.addi %tmp42, %alt10 : i32
+    
+    // Branch D continued
+    %d18 = arith.xori %d17, %cneg1 : i32
+    %d19 = arith.addi %d16, %d18 : i32
+    
+    // Continue merged chain
+    %tmp44 = arith.muli %tmp43, %tmp40 : i32
+    
+    // Branch E continued
+    %e19 = arith.addi %e16, %e18 : i32
+    
+    // Continue merged chain
+    %tmp45 = arith.xori %tmp44, %cneg1 : i32
+    %tmp46 = arith.addi %tmp43, %tmp45 : i32
+    
+    // Branch D continued
+    %d20 = arith.addi %d19, %c0 : i32
+    
+    // Continue merged chain
+    %tmp47 = arith.addi %tmp46, %c0 : i32
+    
+    // Branch E final
+    %e20 = arith.addi %e19, %c0 : i32
+    
+    // Continue merged chain
+    %tmp48 = arith.muli %tmp47, %tmp44 : i32
+    %tmp49 = arith.xori %tmp48, %cneg1 : i32
+    
+    // Branch D final
+    %d21 = arith.muli %d20, %d17 : i32
+    
+    // Continue merged chain
+    %tmp50 = arith.addi %tmp47, %tmp49 : i32
+    %tmp51 = arith.addi %tmp50, %c0 : i32
+    
+    // Merge in E
+    %tmp52 = arith.muli %tmp51, %tmp48 : i32
+    %tmp53 = arith.xori %tmp52, %cneg1 : i32
+    %tmp54 = arith.addi %tmp51, %tmp53 : i32
+    
+    // Continue with E merge
+    %tmp55 = arith.addi %tmp54, %e20 : i32
+    
+    // Continue chain
+    %tmp56 = arith.muli %tmp55, %tmp52 : i32
+    %tmp57 = arith.xori %tmp56, %cneg1 : i32
+    %tmp58 = arith.addi %tmp55, %tmp57 : i32
+    
+    // Merge in E branch value
+    %tmp60 = arith.addi %tmp58, %e1 : i32
+    
+    // Continue chain
+    %tmp61 = arith.muli %tmp60, %tmp56 : i32
+    %tmp62 = arith.xori %tmp61, %cneg1 : i32
+    %tmp63 = arith.addi %tmp60, %tmp62 : i32
+    
+    // Merge in D
+    %tmp64 = arith.addi %tmp63, %d21 : i32
+    
+    // Continue chain
+    %tmp65 = arith.muli %tmp64, %tmp61 : i32
+    %tmp66 = arith.xori %tmp65, %cneg1 : i32
+    %tmp67 = arith.addi %tmp64, %tmp66 : i32
+    %tmp68 = arith.addi %tmp67, %c0 : i32
+    %tmp69 = arith.muli %tmp68, %tmp65 : i32
+    %tmp70 = arith.xori %tmp69, %cneg1 : i32
+    %tmp71 = arith.addi %tmp68, %tmp70 : i32
+    %tmp72 = arith.addi %tmp71, %c0 : i32
+    %tmp73 = arith.muli %tmp72, %tmp69 : i32
+    %tmp74 = arith.xori %tmp73, %cneg1 : i32
+    %tmp75 = arith.addi %tmp72, %tmp74 : i32
+    %tmp76 = arith.addi %tmp75, %c0 : i32
+    %tmp77 = arith.muli %tmp76, %tmp73 : i32
+    %tmp78 = arith.xori %tmp77, %cneg1 : i32
+    %tmp79 = arith.addi %tmp76, %tmp78 : i32
+    %tmp80 = arith.addi %tmp79, %c0 : i32
+    %tmp81 = arith.muli %tmp80, %tmp77 : i32
+    %tmp82 = arith.xori %tmp81, %cneg1 : i32
+    %tmp83 = arith.addi %tmp80, %tmp82 : i32
+    %tmp84 = arith.addi %tmp83, %c0 : i32
+    %tmp85 = arith.addi %tmp84, %c0 : i32
+    
+    // Final merge with D
+    %tmp87 = arith.addi %tmp85, %d1 : i32
+    
+    %c0_idx = arith.constant 0 : index
+    memref.store %tmp87, %arg0[%c0_idx] : memref<?xi32>
+    cf.br ^bb1(%tmp87, %d1 : i32, i32)
+}
+
+// CHECK:           func.func @infinte_loop_v2(%[[ARG0:.*]]: memref<?xi32>, %[[ARG1:.*]]: i32) {
+// CHECK:           %vl15969$e5677$ = arith.constant 1 : i32
+// CHECK:           %vl15390$funcArg1-vl15969$ = arith.addi %[[ARG1]], %vl15969$e5677$ : i32
+// CHECK:           cf.br ^bb1(%vl15390$funcArg1-vl15969$, %vl15390$funcArg1-vl15969$ : i32, i32)
+// CHECK:           ^bb1(%0: i32, %1: i32):
+// CHECK:           %vl85743$20b04$ = arith.constant 0 : i32
+// CHECK:           %vl73800$blockArg0-vl85743$ = arith.muli %0, %vl85743$20b04$ : i32
+// CHECK:           %vl85743$ded78$ = arith.constant -1 : i32
+// CHECK:           %op51214$vl73800-vl85743$ = arith.xori %vl73800$blockArg0-vl85743$, %vl85743$ded78$ : i32
+// CHECK:           %op12693$blockArg0-op51214$ = arith.addi %0, %op51214$vl73800-vl85743$ : i32
+// CHECK:           %vl34407$blockArg1-vl85743$ = arith.addi %1, %vl85743$ded78$ : i32
+// CHECK:           %op15672$op12693-vl34407$ = arith.addi %op12693$blockArg0-op51214$, %vl34407$blockArg1-vl85743$ : i32
+// CHECK:           %op97825$op15672-vl73800$ = arith.muli %op15672$op12693-vl34407$, %vl73800$blockArg0-vl85743$ : i32
+// CHECK:           %op51214$op97825-vl85743$ = arith.xori %op97825$op15672-vl73800$, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op15672-op51214$ = arith.addi %op15672$op12693-vl34407$, %op51214$op97825-vl85743$ : i32
+// CHECK:           %op27844$op12343-vl85743$ = arith.addi %op12343$op15672-op51214$, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$ = arith.muli %op27844$op12343-vl85743$, %op97825$op15672-vl73800$ : i32
+// CHECK:           %op51214$op97825-vl85743$_0 = arith.xori %op97825$op27844-op97825$, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$ = arith.addi %op27844$op12343-vl85743$, %op51214$op97825-vl85743$_0 : i32
+// CHECK:           %op27844$op12343-vl85743$_1 = arith.addi %op12343$op27844-op51214$, %vl85743$20b04$ : i32
+// CHECK:           %op27844$op27844-vl85743$ = arith.addi %op27844$op12343-vl85743$_1, %vl85743$20b04$ : i32
+// CHECK:           %op27844$op27844-vl85743$_2 = arith.addi %op27844$op27844-vl85743$, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_3 = arith.muli %op27844$op12343-vl85743$_1, %op97825$op27844-op97825$ : i32
+// CHECK:           %op97825$op27844-op97825$_4 = arith.muli %op27844$op27844-vl85743$_2, %op97825$op27844-op97825$_3 : i32
+// CHECK:           %op51214$op97825-vl85743$_5 = arith.xori %op97825$op27844-op97825$_4, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_6 = arith.addi %op27844$op27844-vl85743$_2, %op51214$op97825-vl85743$_5 : i32
+// CHECK:           %op27844$op12343-vl85743$_7 = arith.addi %op12343$op27844-op51214$_6, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_8 = arith.muli %op27844$op12343-vl85743$_7, %op97825$op27844-op97825$_4 : i32
+// CHECK:           %op51214$op97825-vl85743$_9 = arith.xori %op97825$op27844-op97825$_8, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_10 = arith.addi %op27844$op12343-vl85743$_7, %op51214$op97825-vl85743$_9 : i32
+// CHECK:           %op27844$op12343-vl85743$_11 = arith.addi %op12343$op27844-op51214$_10, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_12 = arith.muli %op27844$op12343-vl85743$_11, %op97825$op27844-op97825$_8 : i32
+// CHECK:           %op51214$op97825-vl85743$_13 = arith.xori %op97825$op27844-op97825$_12, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_14 = arith.addi %op27844$op12343-vl85743$_11, %op51214$op97825-vl85743$_13 : i32
+// CHECK:           %op27844$op12343-vl85743$_15 = arith.addi %op12343$op27844-op51214$_14, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_16 = arith.muli %op27844$op12343-vl85743$_15, %op97825$op27844-op97825$_12 : i32
+// CHECK:           %op51214$op97825-vl85743$_17 = arith.xori %op97825$op27844-op97825$_16, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_18 = arith.addi %op27844$op12343-vl85743$_15, %op51214$op97825-vl85743$_17 : i32
+// CHECK:           %op27844$op12343-vl85743$_19 = arith.addi %op12343$op27844-op51214$_18, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_20 = arith.muli %op27844$op12343-vl85743$_19, %op97825$op27844-op97825$_16 : i32
+// CHECK:           %op51214$op97825-vl85743$_21 = arith.xori %op97825$op27844-op97825$_20, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_22 = arith.addi %op27844$op12343-vl85743$_19, %op51214$op97825-vl85743$_21 : i32
+// CHECK:           %vl85743$51850$ = arith.constant -9 : i32
+// CHECK:           %vl34407$blockArg1-vl85743$_23 = arith.addi %1, %vl85743$51850$ : i32
+// CHECK:           %op17008$vl34407-vl85743$ = arith.muli %vl34407$blockArg1-vl85743$_23, %vl85743$20b04$ : i32
+// CHECK:           %op51214$op17008-vl85743$ = arith.xori %op17008$vl34407-vl85743$, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op51214-vl34407$ = arith.addi %op51214$op17008-vl85743$, %vl34407$blockArg1-vl85743$_23 : i32
+// CHECK:           %op15672$op12343-op12343$ = arith.addi %op12343$op27844-op51214$_22, %op12343$op51214-vl34407$ : i32
+// CHECK:           %op97825$op15672-op97825$ = arith.muli %op15672$op12343-op12343$, %op97825$op27844-op97825$_20 : i32
+// CHECK:           %op51214$op97825-vl85743$_24 = arith.xori %op97825$op15672-op97825$, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op15672-op51214$_25 = arith.addi %op15672$op12343-op12343$, %op51214$op97825-vl85743$_24 : i32
+// CHECK:           %op17008$vl34407-vl85743$_26 = arith.muli %vl34407$blockArg1-vl85743$, %vl85743$20b04$ : i32
+// CHECK:           %op51214$op17008-vl85743$_27 = arith.xori %op17008$vl34407-vl85743$_26, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op51214-vl34407$_28 = arith.addi %op51214$op17008-vl85743$_27, %vl34407$blockArg1-vl85743$ : i32
+// CHECK:           %op97825$op12343-op17008$ = arith.muli %op12343$op51214-vl34407$_28, %op17008$vl34407-vl85743$_26 : i32
+// CHECK:           %op51214$op97825-vl85743$_29 = arith.xori %op97825$op12343-op17008$, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op12343-op51214$ = arith.addi %op12343$op51214-vl34407$_28, %op51214$op97825-vl85743$_29 : i32
+// CHECK:           %op27844$op12343-vl85743$_30 = arith.addi %op12343$op12343-op51214$, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_31 = arith.muli %op27844$op12343-vl85743$_30, %op97825$op12343-op17008$ : i32
+// CHECK:           %op51214$op97825-vl85743$_32 = arith.xori %op97825$op27844-op97825$_31, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_33 = arith.addi %op27844$op12343-vl85743$_30, %op51214$op97825-vl85743$_32 : i32
+// CHECK:           %op15672$op12343-op12343$_34 = arith.addi %op12343$op15672-op51214$_25, %op12343$op27844-op51214$_33 : i32
+// CHECK:           %op97825$op15672-op97825$_35 = arith.muli %op15672$op12343-op12343$_34, %op97825$op15672-op97825$ : i32
+// CHECK:           %op51214$op97825-vl85743$_36 = arith.xori %op97825$op15672-op97825$_35, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op15672-op51214$_37 = arith.addi %op15672$op12343-op12343$_34, %op51214$op97825-vl85743$_36 : i32
+// CHECK:           %op27844$op12343-vl85743$_38 = arith.addi %op12343$op15672-op51214$_37, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_39 = arith.muli %op27844$op12343-vl85743$_38, %op97825$op15672-op97825$_35 : i32
+// CHECK:           %op51214$op97825-vl85743$_40 = arith.xori %op97825$op27844-op97825$_39, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_41 = arith.addi %op27844$op12343-vl85743$_38, %op51214$op97825-vl85743$_40 : i32
+// CHECK:           %op27844$op12343-vl85743$_42 = arith.addi %op12343$op27844-op51214$_41, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_43 = arith.muli %op27844$op12343-vl85743$_42, %op97825$op27844-op97825$_39 : i32
+// CHECK:           %op51214$op97825-vl85743$_44 = arith.xori %op97825$op27844-op97825$_43, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_45 = arith.addi %op27844$op12343-vl85743$_42, %op51214$op97825-vl85743$_44 : i32
+// CHECK:           %vl85743$7b7de$ = arith.constant -14 : i32
+// CHECK:           %vl34407$blockArg1-vl85743$_46 = arith.addi %1, %vl85743$7b7de$ : i32
+// CHECK:           %op17008$vl34407-vl85743$_47 = arith.muli %vl34407$blockArg1-vl85743$_46, %vl85743$20b04$ : i32
+// CHECK:           %op51214$op17008-vl85743$_48 = arith.xori %op17008$vl34407-vl85743$_47, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op51214-vl34407$_49 = arith.addi %op51214$op17008-vl85743$_48, %vl34407$blockArg1-vl85743$_46 : i32
+// CHECK:           %op97825$op12343-op17008$_50 = arith.muli %op12343$op51214-vl34407$_49, %op17008$vl34407-vl85743$_47 : i32
+// CHECK:           %op51214$op97825-vl85743$_51 = arith.xori %op97825$op12343-op17008$_50, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op12343-op51214$_52 = arith.addi %op12343$op51214-vl34407$_49, %op51214$op97825-vl85743$_51 : i32
+// CHECK:           %op27844$op12343-vl85743$_53 = arith.addi %op12343$op12343-op51214$_52, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_54 = arith.muli %op27844$op12343-vl85743$_53, %op97825$op12343-op17008$_50 : i32
+// CHECK:           %op51214$op97825-vl85743$_55 = arith.xori %op97825$op27844-op97825$_54, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_56 = arith.addi %op27844$op12343-vl85743$_53, %op51214$op97825-vl85743$_55 : i32
+// CHECK:           %op27844$op12343-vl85743$_57 = arith.addi %op12343$op27844-op51214$_56, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_58 = arith.muli %op27844$op12343-vl85743$_57, %op97825$op27844-op97825$_54 : i32
+// CHECK:           %op51214$op97825-vl85743$_59 = arith.xori %op97825$op27844-op97825$_58, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_60 = arith.addi %op27844$op12343-vl85743$_57, %op51214$op97825-vl85743$_59 : i32
+// CHECK:           %op27844$op12343-vl85743$_61 = arith.addi %op12343$op27844-op51214$_60, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_62 = arith.muli %op27844$op12343-vl85743$_61, %op97825$op27844-op97825$_58 : i32
+// CHECK:           %op51214$op97825-vl85743$_63 = arith.xori %op97825$op27844-op97825$_62, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_64 = arith.addi %op27844$op12343-vl85743$_61, %op51214$op97825-vl85743$_63 : i32
+// CHECK:           %op27844$op12343-vl85743$_65 = arith.addi %op12343$op27844-op51214$_64, %vl85743$20b04$ : i32
+// CHECK:           %op15672$op12343-op27844$ = arith.addi %op12343$op27844-op51214$_45, %op27844$op12343-vl85743$_65 : i32
+// CHECK:           %op97825$op15672-op97825$_66 = arith.muli %op15672$op12343-op27844$, %op97825$op27844-op97825$_43 : i32
+// CHECK:           %op51214$op97825-vl85743$_67 = arith.xori %op97825$op15672-op97825$_66, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op15672-op51214$_68 = arith.addi %op15672$op12343-op27844$, %op51214$op97825-vl85743$_67 : i32
+// CHECK:           %op15672$op12343-vl34407$ = arith.addi %op12343$op15672-op51214$_68, %vl34407$blockArg1-vl85743$_46 : i32
+// CHECK:           %op97825$op15672-op97825$_69 = arith.muli %op15672$op12343-vl34407$, %op97825$op15672-op97825$_66 : i32
+// CHECK:           %op51214$op97825-vl85743$_70 = arith.xori %op97825$op15672-op97825$_69, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op15672-op51214$_71 = arith.addi %op15672$op12343-vl34407$, %op51214$op97825-vl85743$_70 : i32
+// CHECK:           %vl85743$1e72e$ = arith.constant -21 : i32
+// CHECK:           %vl34407$blockArg1-vl85743$_72 = arith.addi %1, %vl85743$1e72e$ : i32
+// CHECK:           %op17008$vl34407-vl85743$_73 = arith.muli %vl34407$blockArg1-vl85743$_72, %vl85743$20b04$ : i32
+// CHECK:           %op51214$op17008-vl85743$_74 = arith.xori %op17008$vl34407-vl85743$_73, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op51214-vl34407$_75 = arith.addi %op51214$op17008-vl85743$_74, %vl34407$blockArg1-vl85743$_72 : i32
+// CHECK:           %op97825$op12343-op17008$_76 = arith.muli %op12343$op51214-vl34407$_75, %op17008$vl34407-vl85743$_73 : i32
+// CHECK:           %op51214$op97825-vl85743$_77 = arith.xori %op97825$op12343-op17008$_76, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op12343-op51214$_78 = arith.addi %op12343$op51214-vl34407$_75, %op51214$op97825-vl85743$_77 : i32
+// CHECK:           %op27844$op12343-vl85743$_79 = arith.addi %op12343$op12343-op51214$_78, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_80 = arith.muli %op27844$op12343-vl85743$_79, %op97825$op12343-op17008$_76 : i32
+// CHECK:           %op51214$op97825-vl85743$_81 = arith.xori %op97825$op27844-op97825$_80, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_82 = arith.addi %op27844$op12343-vl85743$_79, %op51214$op97825-vl85743$_81 : i32
+// CHECK:           %op27844$op12343-vl85743$_83 = arith.addi %op12343$op27844-op51214$_82, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_84 = arith.muli %op27844$op12343-vl85743$_83, %op97825$op27844-op97825$_80 : i32
+// CHECK:           %op51214$op97825-vl85743$_85 = arith.xori %op97825$op27844-op97825$_84, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_86 = arith.addi %op27844$op12343-vl85743$_83, %op51214$op97825-vl85743$_85 : i32
+// CHECK:           %op27844$op12343-vl85743$_87 = arith.addi %op12343$op27844-op51214$_86, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_88 = arith.muli %op27844$op12343-vl85743$_87, %op97825$op27844-op97825$_84 : i32
+// CHECK:           %op51214$op97825-vl85743$_89 = arith.xori %op97825$op27844-op97825$_88, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_90 = arith.addi %op27844$op12343-vl85743$_87, %op51214$op97825-vl85743$_89 : i32
+// CHECK:           %op27844$op12343-vl85743$_91 = arith.addi %op12343$op27844-op51214$_90, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_92 = arith.muli %op27844$op12343-vl85743$_91, %op97825$op27844-op97825$_88 : i32
+// CHECK:           %op13782$op12343-op97825$ = arith.addi %op12343$op15672-op51214$_71, %op97825$op27844-op97825$_92 : i32
+// CHECK:           %op97825$op13782-op97825$ = arith.muli %op13782$op12343-op97825$, %op97825$op15672-op97825$_69 : i32
+// CHECK:           %op51214$op97825-vl85743$_93 = arith.xori %op97825$op13782-op97825$, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op13782-op51214$ = arith.addi %op13782$op12343-op97825$, %op51214$op97825-vl85743$_93 : i32
+// CHECK:           %op27844$op12343-vl85743$_94 = arith.addi %op12343$op13782-op51214$, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_95 = arith.muli %op27844$op12343-vl85743$_94, %op97825$op13782-op97825$ : i32
+// CHECK:           %op51214$op97825-vl85743$_96 = arith.xori %op97825$op27844-op97825$_95, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_97 = arith.addi %op27844$op12343-vl85743$_94, %op51214$op97825-vl85743$_96 : i32
+// CHECK:           %op27844$op12343-vl85743$_98 = arith.addi %op12343$op27844-op51214$_97, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_99 = arith.muli %op27844$op12343-vl85743$_98, %op97825$op27844-op97825$_95 : i32
+// CHECK:           %op51214$op97825-vl85743$_100 = arith.xori %op97825$op27844-op97825$_99, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_101 = arith.addi %op27844$op12343-vl85743$_98, %op51214$op97825-vl85743$_100 : i32
+// CHECK:           %op27844$op12343-vl85743$_102 = arith.addi %op12343$op27844-op51214$_101, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_103 = arith.muli %op27844$op12343-vl85743$_102, %op97825$op27844-op97825$_99 : i32
+// CHECK:           %op51214$op97825-vl85743$_104 = arith.xori %op97825$op27844-op97825$_103, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_105 = arith.addi %op27844$op12343-vl85743$_102, %op51214$op97825-vl85743$_104 : i32
+// CHECK:           %op27844$op12343-vl85743$_106 = arith.addi %op12343$op27844-op51214$_105, %vl85743$20b04$ : i32
+// CHECK:           %op97825$op27844-op97825$_107 = arith.muli %op27844$op12343-vl85743$_106, %op97825$op27844-op97825$_103 : i32
+// CHECK:           %op51214$op97825-vl85743$_108 = arith.xori %op97825$op27844-op97825$_107, %vl85743$ded78$ : i32
+// CHECK:           %op12343$op27844-op51214$_109 = arith.addi %op27844$op12343-vl85743$_106, %op51214$op97825-vl85743$_108 : i32
+// CHECK:           %op27844$op12343-vl85743$_110 = arith.addi %op12343$op27844-op51214$_109, %vl85743$20b04$ : i32
+// CHECK:           %op27844$op27844-vl85743$_111 = arith.addi %op27844$op12343-vl85743$_110, %vl85743$20b04$ : i32
+// CHECK:           %op15672$op27844-vl34407$ = arith.addi %op27844$op27844-vl85743$_111, %vl34407$blockArg1-vl85743$_72 : i32
+// CHECK:           %vl16744$e527e$ = arith.constant 0 : index
+// CHECK:           memref.store %op15672$op27844-vl34407$, %[[ARG0]][%vl16744$e527e$] : memref<?xi32>
+// CHECK:           cf.br ^bb1(%op15672$op27844-vl34407$, %vl34407$blockArg1-vl85743$_72 : i32, i32)
+// CHECK:         }
+func.func @infinte_loop_v2(%arg0: memref<?xi32>, %arg1: i32) {
+    %c1 = arith.constant 1 : i32
+    %a = arith.addi %arg1, %c1 : i32
+    cf.br ^bb1(%a, %a : i32, i32)
+
+    ^bb1(%tmp: i32, %tmp2: i32):
+    %c0 = arith.constant 0 : i32
+    %cneg1 = arith.constant -1 : i32
+    %cneg9 = arith.constant -9 : i32
+    %cneg14 = arith.constant -14 : i32
+    %cneg21 = arith.constant -21 : i32
+    
+    // Branch D: Start with cneg21
+    %d1 = arith.addi %tmp2, %cneg21 : i32
+    
+    // Branch C: tmp2-cneg9 chain
+    %base1 = arith.addi %tmp2, %cneg9 : i32
+    %base2 = arith.muli %base1, %c0 : i32
+    
+    // Branch A: First main chain
+    %tmp3 = arith.muli %tmp, %c0 : i32
+    
+    // Branch D continued
+    %d2 = arith.muli %d1, %c0 : i32
+    %d3 = arith.xori %d2, %cneg1 : i32
+    %d4 = arith.addi %d1, %d3 : i32
+    
+    // Branch E: cneg14 chain
+    %e1 = arith.addi %tmp2, %cneg14 : i32
+    %e2 = arith.muli %e1, %c0 : i32
+    
+    // Branch A continued
+    %tmp4 = arith.xori %tmp3, %cneg1 : i32
+    %tmp5 = arith.addi %tmp, %tmp4 : i32
+    
+    // Branch B: tmp6 chain
+    %tmp6 = arith.addi %tmp2, %cneg1 : i32
+    %alt1 = arith.muli %tmp6, %c0 : i32
+    
+    // Branch C continued
+    %base3 = arith.xori %base2, %cneg1 : i32
+    
+    // Branch D continued
+    %d5 = arith.muli %d4, %d2 : i32
+    %d6 = arith.xori %d5, %cneg1 : i32
+    %d7 = arith.addi %d4, %d6 : i32
+    
+    // Branch E continued
+    %e3 = arith.xori %e2, %cneg1 : i32
+    %e4 = arith.addi %e1, %e3 : i32
+    %e5 = arith.muli %e4, %e2 : i32
+    
+    // Branch A continued
+    %tmp7 = arith.addi %tmp5, %tmp6 : i32
+    %tmp8 = arith.muli %tmp7, %tmp3 : i32
+    
+    // Branch B continued
+    %alt2 = arith.xori %alt1, %cneg1 : i32
+    %alt3 = arith.addi %tmp6, %alt2 : i32
+    %alt4 = arith.muli %alt3, %alt1 : i32
+    
+    // Branch C continued
+    %base4 = arith.addi %base1, %base3 : i32
+    
+    // Branch D continued
+    %d8 = arith.addi %d7, %c0 : i32
+    %d9 = arith.muli %d8, %d5 : i32
+    
+    // Branch A continued
+    %tmp9 = arith.xori %tmp8, %cneg1 : i32
+    %tmp10 = arith.addi %tmp7, %tmp9 : i32
+    %tmp11 = arith.addi %tmp10, %c0 : i32
+    
+    // Branch E continued
+    %e6 = arith.xori %e5, %cneg1 : i32
+    %e7 = arith.addi %e4, %e6 : i32
+    %e8 = arith.addi %e7, %c0 : i32
+    
+    // Branch B continued
+    %alt5 = arith.xori %alt4, %cneg1 : i32
+    %alt6 = arith.addi %alt3, %alt5 : i32
+    
+    // Branch A continued
+    %tmp12 = arith.muli %tmp11, %tmp8 : i32
+    %tmp13 = arith.xori %tmp12, %cneg1 : i32
+    
+    // Branch D continued
+    %d10 = arith.xori %d9, %cneg1 : i32
+    %d11 = arith.addi %d8, %d10 : i32
+    %d12 = arith.addi %d11, %c0 : i32
+    
+    // Branch E continued
+    %e9 = arith.muli %e8, %e5 : i32
+    %e10 = arith.xori %e9, %cneg1 : i32
+    
+    // Branch B continued
+    %alt7 = arith.addi %alt6, %c0 : i32
+    %alt8 = arith.muli %alt7, %alt4 : i32
+    %alt9 = arith.xori %alt8, %cneg1 : i32
+    
+    // Branch A continued
+    %tmp14 = arith.addi %tmp11, %tmp13 : i32
+    %tmp15 = arith.addi %tmp14, %c0 : i32
+    %tmp16 = arith.muli %tmp15, %tmp12 : i32
+    
+    // Branch D continued
+    %d13 = arith.muli %d12, %d9 : i32
+    %d14 = arith.xori %d13, %cneg1 : i32
+    %d15 = arith.addi %d12, %d14 : i32
+    
+    // Branch E continued
+    %e11 = arith.addi %e8, %e10 : i32
+    %e12 = arith.addi %e11, %c0 : i32
+    %e13 = arith.muli %e12, %e9 : i32
+    
+    // Branch A continued
+    %tmp17 = arith.addi %tmp15, %c0 : i32
+    %tmp18 = arith.addi %tmp17, %c0 : i32
+    %tmp19 = arith.muli %tmp18, %tmp16 : i32
+    
+    // Branch B continued
+    %alt10 = arith.addi %alt7, %alt9 : i32
+    
+    // Branch D continued
+    %d16 = arith.addi %d15, %c0 : i32
+    %d17 = arith.muli %d16, %d13 : i32
+    %d18 = arith.xori %d17, %cneg1 : i32
+    
+    // Branch A continued
+    %tmp20 = arith.xori %tmp19, %cneg1 : i32
+    %tmp21 = arith.addi %tmp18, %tmp20 : i32
+    %tmp22 = arith.addi %tmp21, %c0 : i32
+    
+    // Branch E continued
+    %e14 = arith.xori %e13, %cneg1 : i32
+    %e15 = arith.addi %e12, %e14 : i32
+    %e16 = arith.addi %e15, %c0 : i32
+    
+    // Branch A continued
+    %tmp23 = arith.muli %tmp22, %tmp19 : i32
+    %tmp24 = arith.xori %tmp23, %cneg1 : i32
+    
+    // Branch D continued
+    %d19 = arith.addi %d16, %d18 : i32
+    %d20 = arith.addi %d19, %c0 : i32
+    %d21 = arith.muli %d20, %d17 : i32
+    
+    // Branch A continued
+    %tmp25 = arith.addi %tmp22, %tmp24 : i32
+    %tmp26 = arith.addi %tmp25, %c0 : i32
+    
+    // Branch E continued
+    %e17 = arith.muli %e16, %e13 : i32
+    %e18 = arith.xori %e17, %cneg1 : i32
+    %e19 = arith.addi %e16, %e18 : i32
+    %e20 = arith.addi %e19, %c0 : i32
+    
+    // Branch A continued
+    %tmp27 = arith.muli %tmp26, %tmp23 : i32
+    %tmp28 = arith.xori %tmp27, %cneg1 : i32
+    %tmp29 = arith.addi %tmp26, %tmp28 : i32
+    %tmp30 = arith.addi %tmp29, %c0 : i32
+    %tmp31 = arith.muli %tmp30, %tmp27 : i32
+    %tmp32 = arith.xori %tmp31, %cneg1 : i32
+    %tmp33 = arith.addi %tmp30, %tmp32 : i32
+    %tmp34 = arith.addi %tmp33, %c0 : i32
+    %tmp35 = arith.muli %tmp34, %tmp31 : i32
+    %tmp36 = arith.xori %tmp35, %cneg1 : i32
+    %tmp37 = arith.addi %tmp34, %tmp36 : i32
+    
+    // Merge A + C
+    %tmp39 = arith.addi %tmp37, %base4 : i32
+    %tmp40 = arith.muli %tmp39, %tmp35 : i32
+    %tmp41 = arith.xori %tmp40, %cneg1 : i32
+    %tmp42 = arith.addi %tmp39, %tmp41 : i32
+    
+    // Merge + B
+    %tmp43 = arith.addi %tmp42, %alt10 : i32
+    %tmp44 = arith.muli %tmp43, %tmp40 : i32
+    %tmp45 = arith.xori %tmp44, %cneg1 : i32
+    %tmp46 = arith.addi %tmp43, %tmp45 : i32
+    %tmp47 = arith.addi %tmp46, %c0 : i32
+    %tmp48 = arith.muli %tmp47, %tmp44 : i32
+    %tmp49 = arith.xori %tmp48, %cneg1 : i32
+    %tmp50 = arith.addi %tmp47, %tmp49 : i32
+    %tmp51 = arith.addi %tmp50, %c0 : i32
+    
+    // Merge + E
+    %tmp52 = arith.muli %tmp51, %tmp48 : i32
+    %tmp53 = arith.xori %tmp52, %cneg1 : i32
+    %tmp54 = arith.addi %tmp51, %tmp53 : i32
+    %tmp55 = arith.addi %tmp54, %e20 : i32
+    %tmp56 = arith.muli %tmp55, %tmp52 : i32
+    %tmp57 = arith.xori %tmp56, %cneg1 : i32
+    %tmp58 = arith.addi %tmp55, %tmp57 : i32
+    
+    // Merge E source value
+    %tmp60 = arith.addi %tmp58, %e1 : i32
+    %tmp61 = arith.muli %tmp60, %tmp56 : i32
+    %tmp62 = arith.xori %tmp61, %cneg1 : i32
+    %tmp63 = arith.addi %tmp60, %tmp62 : i32
+    
+    // Merge + D
+    %tmp64 = arith.addi %tmp63, %d21 : i32
+    %tmp65 = arith.muli %tmp64, %tmp61 : i32
+    %tmp66 = arith.xori %tmp65, %cneg1 : i32
+    %tmp67 = arith.addi %tmp64, %tmp66 : i32
+    %tmp68 = arith.addi %tmp67, %c0 : i32
+    %tmp69 = arith.muli %tmp68, %tmp65 : i32
+    %tmp70 = arith.xori %tmp69, %cneg1 : i32
+    %tmp71 = arith.addi %tmp68, %tmp70 : i32
+    %tmp72 = arith.addi %tmp71, %c0 : i32
+    %tmp73 = arith.muli %tmp72, %tmp69 : i32
+    %tmp74 = arith.xori %tmp73, %cneg1 : i32
+    %tmp75 = arith.addi %tmp72, %tmp74 : i32
+    %tmp76 = arith.addi %tmp75, %c0 : i32
+    %tmp77 = arith.muli %tmp76, %tmp73 : i32
+    %tmp78 = arith.xori %tmp77, %cneg1 : i32
+    %tmp79 = arith.addi %tmp76, %tmp78 : i32
+    %tmp80 = arith.addi %tmp79, %c0 : i32
+    %tmp81 = arith.muli %tmp80, %tmp77 : i32
+    %tmp82 = arith.xori %tmp81, %cneg1 : i32
+    %tmp83 = arith.addi %tmp80, %tmp82 : i32
+    %tmp84 = arith.addi %tmp83, %c0 : i32
+    %tmp85 = arith.addi %tmp84, %c0 : i32
+    
+    // Final merge with D source value
+    %tmp87 = arith.addi %tmp85, %d1 : i32
+    
+    %c0_idx = arith.constant 0 : index
+    memref.store %tmp87, %arg0[%c0_idx] : memref<?xi32>
+    cf.br ^bb1(%tmp87, %d1 : i32, i32)
+}
+
+// CHECK:       }
diff --git a/mlir/test/Conversion/Normalize/reorder.mlir b/mlir/test/Conversion/Normalize/reorder.mlir
new file mode 100644
index 0000000000000..aa698a5ae04d2
--- /dev/null
+++ b/mlir/test/Conversion/Normalize/reorder.mlir
@@ -0,0 +1,21 @@
+// RUN: mlir-opt %s --normalize --mlir-use-nameloc-as-prefix 2>&1 | FileCheck %s
+
+// CHECK-LABEL:   func.func @reorder(
+// CHECK-SAME:                   %[[ARG0:.*]]: i32) -> i32 {
+// CHECK:           %vl14084$51356$ = arith.constant 2 : i32
+// CHECK:           %vl15831$funcArg0-vl14084$ = arith.addi %[[ARG0]], %vl14084$51356$ : i32
+// CHECK:           %vl14084$187c2$ = arith.constant 6 : i32
+// CHECK:           %op27844$vl14084-vl15831$ = arith.addi %vl14084$187c2$, %vl15831$funcArg0-vl14084$ : i32
+// CHECK:           %vl14084$4c6ac$ = arith.constant 8 : i32
+// CHECK:           %op27844$op27844-vl14084$ = arith.addi %op27844$vl14084-vl15831$, %vl14084$4c6ac$ : i32
+// CHECK:           return %op27844$op27844-vl14084$ : i32
+// CHECK:         }
+func.func @reorder(%a0: i32) -> i32 {
+  %c2 = arith.constant 2 : i32
+  %c6 = arith.constant 6 : i32
+  %c8 = arith.constant 8 : i32
+  %a = arith.addi %a0, %c2 : i32
+  %b = arith.addi %a, %c6 : i32
+  %c = arith.addi %b, %c8 : i32
+  func.return %c : i32
+}
diff --git a/mlir/test/Conversion/Normalize/side-effect.mlir b/mlir/test/Conversion/Normalize/side-effect.mlir
new file mode 100644
index 0000000000000..ef5ae17e29ae0
--- /dev/null
+++ b/mlir/test/Conversion/Normalize/side-effect.mlir
@@ -0,0 +1,66 @@
+// RUN: mlir-opt %s --normalize --mlir-use-nameloc-as-prefix 2>&1 | FileCheck %s
+
+module {
+  // CHECK-LABEL:   func.func @foo(
+  // CHECK-SAME:                   %arg0: i32) -> i32 {
+  // CHECK:           %vl13600$funcArg0-funcArg0$ = arith.addi %arg0, %arg0 : i32
+  // CHECK:           return %vl13600$funcArg0-funcArg0$ : i32
+  // CHECK:         }
+  func.func @foo(%x: i32) -> i32 {
+    %y = arith.addi %x, %x : i32
+    return %y : i32
+  }
+  // CHECK-LABEL:   func.func @bar() -> i32 {
+  // CHECK:           %vl10237$20b04$ = arith.constant 0 : i32
+  // CHECK:           %vl15008$eafb0$ = arith.constant 4 : i32
+  // CHECK:           %vl70789$vl10237-vl15008$ = arith.addi %vl10237$20b04$, %vl15008$eafb0$ : i32
+  // CHECK:           %op27844$vl10237-vl70789$ = arith.addi %vl10237$20b04$, %vl70789$vl10237-vl15008$ : i32
+  // CHECK:           %op27844$op27844-vl15008$ = arith.addi %op27844$vl10237-vl70789$, %vl15008$eafb0$ : i32
+  // CHECK:           %vl16656$bf67a$ = memref.alloc() : memref<4xi32>
+  // CHECK:           %vl77401$e527e$ = arith.constant 0 : index
+  // CHECK:           memref.store %op27844$op27844-vl15008$, %vl16656$bf67a$[%vl77401$e527e$] : memref<4xi32>
+  // CHECK:           %op15672$op27844-op27844$ = arith.addi %op27844$op27844-vl15008$, %op27844$vl10237-vl70789$ : i32
+  // CHECK:           %vl70265$62631$ = arith.constant 1 : index
+  // CHECK:           memref.store %op15672$op27844-op27844$, %vl16656$bf67a$[%vl70265$62631$] : memref<4xi32>
+  // CHECK:           %op27844$vl10237-vl70789$_0 = arith.addi %vl10237$20b04$, %vl70789$vl10237-vl15008$ : i32
+  // CHECK:           %op27844$op27844-vl15008$_1 = arith.addi %op27844$vl10237-vl70789$_0, %vl15008$eafb0$ : i32
+  // CHECK:           %op15672$op27844-op27844$_2 = arith.addi %op27844$op27844-vl15008$_1, %op27844$vl10237-vl70789$_0 : i32
+  // CHECK:           %op43149$vl16656-vl77401$ = memref.load %vl16656$bf67a$[%vl77401$e527e$] : memref<4xi32>
+  // CHECK:           %op43149$vl16656-vl70265$ = memref.load %vl16656$bf67a$[%vl70265$62631$] : memref<4xi32>
+  // CHECK:           %op12004$op43149-op43149$ = arith.addi %op43149$vl16656-vl70265$, %op43149$vl16656-vl77401$ : i32
+  // CHECK:           %op52433foo$op15672$ = call @foo(%op15672$op27844-op27844$_2) : (i32) -> i32
+  // CHECK:           %op91727$op12004-op52433$ = arith.addi %op12004$op43149-op43149$, %op52433foo$op15672$ : i32
+  // CHECK:           return %op91727$op12004-op52433$ : i32
+  // CHECK:         }
+
+  func.func @bar() -> i32{
+    %m0 = memref.alloc() : memref<4xi32>
+
+    %c0 = arith.constant 4 : i32
+    %zero = arith.constant 0 : i32
+    
+    %idx0 = arith.constant 0 : index
+    %idx1 = arith.constant 1 : index
+
+    %t  = arith.addi %zero, %c0 : i32
+
+    %t2 = arith.addi %t, %zero : i32
+    %t3 = arith.addi %t2, %c0 : i32
+    %t4 = arith.addi %t3, %t2 : i32
+
+    memref.store %t3, %m0[%idx0] : memref<4xi32>
+    memref.store %t4, %m0[%idx1] : memref<4xi32>
+
+    %a = memref.load %m0[%idx0] : memref<4xi32>
+    %b = memref.load %m0[%idx1] : memref<4xi32>
+
+    %t5 = arith.addi %t, %zero : i32
+    %t6 = arith.addi %t5, %c0 : i32
+    %t7 = arith.addi %t6, %t5 : i32
+    %t8 = call @foo(%t7) : (i32) -> i32
+
+    %t9 = arith.addi %a, %b : i32
+    %t10 = arith.addi %t9, %t8 : i32
+    return %t10 : i32
+  }
+}
diff --git a/mlir/test/Conversion/Normalize/usedef.mlir b/mlir/test/Conversion/Normalize/usedef.mlir
new file mode 100644
index 0000000000000..2af5e55d64787
--- /dev/null
+++ b/mlir/test/Conversion/Normalize/usedef.mlir
@@ -0,0 +1,35 @@
+// RUN: mlir-opt %s --normalize --mlir-use-nameloc-as-prefix 2>&1 | FileCheck %s
+
+// CHECK-LABEL:    func.func @use_def(
+// CHECK-SAME:         %arg0: i32) -> i32 {
+// CHECK:              %vl36495$eafb0$ = arith.constant 4 : i32
+// CHECK:              %vl43392$funcArg0-vl36495$ = arith.addi %arg0, %vl36495$eafb0$ : i32
+// CHECK:              %vl36495$20b04$ = arith.constant 0 : i32
+// CHECK:              %op27844$vl36495-vl43392$ = arith.addi %vl36495$20b04$, %vl43392$funcArg0-vl36495$ : i32
+// CHECK:              %op27844$op27844-vl36495$ = arith.addi %op27844$vl36495-vl43392$, %vl36495$eafb0$ : i32
+// CHECK:              %op15672$op27844-op27844$ = arith.addi %op27844$op27844-vl36495$, %op27844$vl36495-vl43392$ : i32
+// CHECK:              %op15672$op15672-op27844$ = arith.addi %op15672$op27844-op27844$, %op27844$op27844-vl36495$ : i32
+// CHECK:              %op15672$op15672-op15672$ = arith.addi %op15672$op15672-op27844$, %op15672$op27844-op27844$ : i32
+// CHECK:              %op15672$op15672-op15672$_0 = arith.addi %op15672$op15672-op15672$, %op15672$op15672-op27844$ : i32
+// CHECK:              %op15672$op15672-op15672$_1 = arith.addi %op15672$op15672-op15672$, %op15672$op15672-op15672$_0 : i32
+// CHECK:              %op15672$op15672-op15672$_2 = arith.addi %op15672$op15672-op15672$, %op15672$op15672-op15672$_1 : i32
+// CHECK:              %op15672$op15672-op15672$_3 = arith.addi %op15672$op15672-op15672$_1, %op15672$op15672-op15672$_2 : i32
+// CHECK:              return %op15672$op15672-op15672$_3 : i32
+// CHECK:            }
+module {
+  func.func @use_def(%arg0: i32) -> i32 {
+    %c0 = arith.constant 4 : i32
+    %t  = arith.addi %arg0, %c0 : i32
+    %zero = arith.constant 0 : i32
+    %t2 = arith.addi %t, %zero : i32
+    %t3 = arith.addi %t2, %c0 : i32
+    %t4 = arith.addi %t3, %t2 : i32
+    %t5 = arith.addi %t4, %t3 : i32
+    %t6 = arith.addi %t5, %t4 : i32
+    %t7 = arith.addi %t6, %t5 : i32
+    %t8 = arith.addi %t7, %t6 : i32
+    %t9 = arith.addi %t8, %t6 : i32
+    %t10 = arith.addi %t9, %t8 : i32
+    return %t10 : i32
+  }
+}