[LoongArch][NFC] Pre-commit tests for vector fminnum/fmaxnum

llvm/test/CodeGen/LoongArch/lasx/fp-max-min.ll

@@ -0,0 +1,160 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s
+; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s
+
+define void @minnum_v8f32(ptr %res, ptr %x, ptr %y) nounwind {
+; CHECK-LABEL: minnum_v8f32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a2, 0
+; CHECK-NEXT:    xvld $xr1, $a1, 0
+; CHECK-NEXT:    xvpickve.w $xr2, $xr0, 5
+; CHECK-NEXT:    xvpickve.w $xr3, $xr1, 5
+; CHECK-NEXT:    fmin.s $fa2, $fa3, $fa2
+; CHECK-NEXT:    xvpickve.w $xr3, $xr0, 4
+; CHECK-NEXT:    xvpickve.w $xr4, $xr1, 4
+; CHECK-NEXT:    fmin.s $fa3, $fa4, $fa3
+; CHECK-NEXT:    vextrins.w $vr3, $vr2, 16
+; CHECK-NEXT:    xvpickve.w $xr2, $xr0, 6
+; CHECK-NEXT:    xvpickve.w $xr4, $xr1, 6
+; CHECK-NEXT:    fmin.s $fa2, $fa4, $fa2
+; CHECK-NEXT:    vextrins.w $vr3, $vr2, 32
+; CHECK-NEXT:    xvpickve.w $xr2, $xr0, 7
+; CHECK-NEXT:    xvpickve.w $xr4, $xr1, 7
+; CHECK-NEXT:    fmin.s $fa2, $fa4, $fa2
+; CHECK-NEXT:    vextrins.w $vr3, $vr2, 48
+; CHECK-NEXT:    xvpickve.w $xr2, $xr0, 1
+; CHECK-NEXT:    xvpickve.w $xr4, $xr1, 1
+; CHECK-NEXT:    fmin.s $fa2, $fa4, $fa2
+; CHECK-NEXT:    xvpickve.w $xr4, $xr0, 0
+; CHECK-NEXT:    xvpickve.w $xr5, $xr1, 0
+; CHECK-NEXT:    fmin.s $fa4, $fa5, $fa4
+; CHECK-NEXT:    vextrins.w $vr4, $vr2, 16
+; CHECK-NEXT:    xvpickve.w $xr2, $xr0, 2
+; CHECK-NEXT:    xvpickve.w $xr5, $xr1, 2
+; CHECK-NEXT:    fmin.s $fa2, $fa5, $fa2
+; CHECK-NEXT:    vextrins.w $vr4, $vr2, 32
+; CHECK-NEXT:    xvpickve.w $xr0, $xr0, 3
+; CHECK-NEXT:    xvpickve.w $xr1, $xr1, 3
+; CHECK-NEXT:    fmin.s $fa0, $fa1, $fa0
+; CHECK-NEXT:    vextrins.w $vr4, $vr0, 48
+; CHECK-NEXT:    xvpermi.q $xr4, $xr3, 2
+; CHECK-NEXT:    xvst $xr4, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %v0 = load <8 x float>, ptr %x
+  %v1 = load <8 x float>, ptr %y
+  %r = call <8 x float> @llvm.minnum.v8f32(<8 x float> %v0, <8 x float> %v1)
+  store <8 x float> %r, ptr %res
+  ret void
+}
+
+define void @minnum_v4f64(ptr %res, ptr %x, ptr %y) nounwind {
+; CHECK-LABEL: minnum_v4f64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a2, 0
+; CHECK-NEXT:    xvld $xr1, $a1, 0
+; CHECK-NEXT:    xvpickve.d $xr2, $xr0, 3
+; CHECK-NEXT:    xvpickve.d $xr3, $xr1, 3
+; CHECK-NEXT:    fmin.d $fa2, $fa3, $fa2
+; CHECK-NEXT:    xvpickve.d $xr3, $xr0, 2
+; CHECK-NEXT:    xvpickve.d $xr4, $xr1, 2
+; CHECK-NEXT:    fmin.d $fa3, $fa4, $fa3
+; CHECK-NEXT:    vextrins.d $vr3, $vr2, 16
+; CHECK-NEXT:    xvpickve.d $xr2, $xr0, 1
+; CHECK-NEXT:    xvpickve.d $xr4, $xr1, 1
+; CHECK-NEXT:    fmin.d $fa2, $fa4, $fa2
+; CHECK-NEXT:    xvpickve.d $xr0, $xr0, 0
+; CHECK-NEXT:    xvpickve.d $xr1, $xr1, 0
+; CHECK-NEXT:    fmin.d $fa0, $fa1, $fa0
+; CHECK-NEXT:    vextrins.d $vr0, $vr2, 16
+; CHECK-NEXT:    xvpermi.q $xr0, $xr3, 2
+; CHECK-NEXT:    xvst $xr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %v0 = load <4 x double>, ptr %x
+  %v1 = load <4 x double>, ptr %y
+  %r = call <4 x double> @llvm.minnum.v4f64(<4 x double> %v0, <4 x double> %v1)
+  store <4 x double> %r, ptr %res
+  ret void
+}
+
+define void @maxnum_v8f32(ptr %res, ptr %x, ptr %y) nounwind {
+; CHECK-LABEL: maxnum_v8f32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a2, 0
+; CHECK-NEXT:    xvld $xr1, $a1, 0
+; CHECK-NEXT:    xvpickve.w $xr2, $xr0, 5
+; CHECK-NEXT:    xvpickve.w $xr3, $xr1, 5
+; CHECK-NEXT:    fmax.s $fa2, $fa3, $fa2
+; CHECK-NEXT:    xvpickve.w $xr3, $xr0, 4
+; CHECK-NEXT:    xvpickve.w $xr4, $xr1, 4
+; CHECK-NEXT:    fmax.s $fa3, $fa4, $fa3
+; CHECK-NEXT:    vextrins.w $vr3, $vr2, 16
+; CHECK-NEXT:    xvpickve.w $xr2, $xr0, 6
+; CHECK-NEXT:    xvpickve.w $xr4, $xr1, 6
+; CHECK-NEXT:    fmax.s $fa2, $fa4, $fa2
+; CHECK-NEXT:    vextrins.w $vr3, $vr2, 32
+; CHECK-NEXT:    xvpickve.w $xr2, $xr0, 7
+; CHECK-NEXT:    xvpickve.w $xr4, $xr1, 7
+; CHECK-NEXT:    fmax.s $fa2, $fa4, $fa2
+; CHECK-NEXT:    vextrins.w $vr3, $vr2, 48
+; CHECK-NEXT:    xvpickve.w $xr2, $xr0, 1
+; CHECK-NEXT:    xvpickve.w $xr4, $xr1, 1
+; CHECK-NEXT:    fmax.s $fa2, $fa4, $fa2
+; CHECK-NEXT:    xvpickve.w $xr4, $xr0, 0
+; CHECK-NEXT:    xvpickve.w $xr5, $xr1, 0
+; CHECK-NEXT:    fmax.s $fa4, $fa5, $fa4
+; CHECK-NEXT:    vextrins.w $vr4, $vr2, 16
+; CHECK-NEXT:    xvpickve.w $xr2, $xr0, 2
+; CHECK-NEXT:    xvpickve.w $xr5, $xr1, 2
+; CHECK-NEXT:    fmax.s $fa2, $fa5, $fa2
+; CHECK-NEXT:    vextrins.w $vr4, $vr2, 32
+; CHECK-NEXT:    xvpickve.w $xr0, $xr0, 3
+; CHECK-NEXT:    xvpickve.w $xr1, $xr1, 3
+; CHECK-NEXT:    fmax.s $fa0, $fa1, $fa0
+; CHECK-NEXT:    vextrins.w $vr4, $vr0, 48
+; CHECK-NEXT:    xvpermi.q $xr4, $xr3, 2
+; CHECK-NEXT:    xvst $xr4, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %v0 = load <8 x float>, ptr %x
+  %v1 = load <8 x float>, ptr %y
+  %r = call <8 x float> @llvm.maxnum.v8f32(<8 x float> %v0, <8 x float> %v1)
+  store <8 x float> %r, ptr %res
+  ret void
+}
+
+define void @maxnum_v4f64(ptr %res, ptr %x, ptr %y) nounwind {
+; CHECK-LABEL: maxnum_v4f64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a2, 0
+; CHECK-NEXT:    xvld $xr1, $a1, 0
+; CHECK-NEXT:    xvpickve.d $xr2, $xr0, 3
+; CHECK-NEXT:    xvpickve.d $xr3, $xr1, 3
+; CHECK-NEXT:    fmax.d $fa2, $fa3, $fa2
+; CHECK-NEXT:    xvpickve.d $xr3, $xr0, 2
+; CHECK-NEXT:    xvpickve.d $xr4, $xr1, 2
+; CHECK-NEXT:    fmax.d $fa3, $fa4, $fa3
+; CHECK-NEXT:    vextrins.d $vr3, $vr2, 16
+; CHECK-NEXT:    xvpickve.d $xr2, $xr0, 1
+; CHECK-NEXT:    xvpickve.d $xr4, $xr1, 1
+; CHECK-NEXT:    fmax.d $fa2, $fa4, $fa2
+; CHECK-NEXT:    xvpickve.d $xr0, $xr0, 0
+; CHECK-NEXT:    xvpickve.d $xr1, $xr1, 0
+; CHECK-NEXT:    fmax.d $fa0, $fa1, $fa0
+; CHECK-NEXT:    vextrins.d $vr0, $vr2, 16
+; CHECK-NEXT:    xvpermi.q $xr0, $xr3, 2
+; CHECK-NEXT:    xvst $xr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %v0 = load <4 x double>, ptr %x
+  %v1 = load <4 x double>, ptr %y
+  %r = call <4 x double> @llvm.maxnum.v4f64(<4 x double> %v0, <4 x double> %v1)
+  store <4 x double> %r, ptr %res
+  ret void
+}
+
+declare <8 x float> @llvm.minnum.v8f32(<8 x float>, <8 x float>)
+declare <4 x double> @llvm.minnum.v4f64(<4 x double>, <4 x double>)
+declare <8 x float> @llvm.maxnum.v8f32(<8 x float>, <8 x float>)
+declare <4 x double> @llvm.maxnum.v4f64(<4 x double>, <4 x double>)

llvm/test/CodeGen/LoongArch/lsx/fp-max-min.ll

@@ -0,0 +1,112 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lsx < %s | FileCheck %s
+; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s
+
+define void @minnum_v4f32(ptr %res, ptr %x, ptr %y) nounwind {
+; CHECK-LABEL: minnum_v4f32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    vld $vr0, $a2, 0
+; CHECK-NEXT:    vld $vr1, $a1, 0
+; CHECK-NEXT:    vreplvei.w $vr2, $vr0, 1
+; CHECK-NEXT:    vreplvei.w $vr3, $vr1, 1
+; CHECK-NEXT:    fmin.s $fa2, $fa3, $fa2
+; CHECK-NEXT:    vreplvei.w $vr3, $vr0, 0
+; CHECK-NEXT:    vreplvei.w $vr4, $vr1, 0
+; CHECK-NEXT:    fmin.s $fa3, $fa4, $fa3
+; CHECK-NEXT:    vextrins.w $vr3, $vr2, 16
+; CHECK-NEXT:    vreplvei.w $vr2, $vr0, 2
+; CHECK-NEXT:    vreplvei.w $vr4, $vr1, 2
+; CHECK-NEXT:    fmin.s $fa2, $fa4, $fa2
+; CHECK-NEXT:    vextrins.w $vr3, $vr2, 32
+; CHECK-NEXT:    vreplvei.w $vr0, $vr0, 3
+; CHECK-NEXT:    vreplvei.w $vr1, $vr1, 3
+; CHECK-NEXT:    fmin.s $fa0, $fa1, $fa0
+; CHECK-NEXT:    vextrins.w $vr3, $vr0, 48
+; CHECK-NEXT:    vst $vr3, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %v0 = load <4 x float>, ptr %x
+  %v1 = load <4 x float>, ptr %y
+  %r = call <4 x float> @llvm.minnum.v4f32(<4 x float> %v0, <4 x float> %v1)
+  store <4 x float> %r, ptr %res
+  ret void
+}
+
+define void @minnum_v2f64(ptr %res, ptr %x, ptr %y) nounwind {
+; CHECK-LABEL: minnum_v2f64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    vld $vr0, $a2, 0
+; CHECK-NEXT:    vld $vr1, $a1, 0
+; CHECK-NEXT:    vreplvei.d $vr2, $vr0, 1
+; CHECK-NEXT:    vreplvei.d $vr3, $vr1, 1
+; CHECK-NEXT:    fmin.d $fa2, $fa3, $fa2
+; CHECK-NEXT:    vreplvei.d $vr0, $vr0, 0
+; CHECK-NEXT:    vreplvei.d $vr1, $vr1, 0
+; CHECK-NEXT:    fmin.d $fa0, $fa1, $fa0
+; CHECK-NEXT:    vextrins.d $vr0, $vr2, 16
+; CHECK-NEXT:    vst $vr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %v0 = load <2 x double>, ptr %x
+  %v1 = load <2 x double>, ptr %y
+  %r = call <2 x double> @llvm.minnum.v2f64(<2 x double> %v0, <2 x double> %v1)
+  store <2 x double> %r, ptr %res
+  ret void
+}
+
+define void @maxnum_v4f32(ptr %res, ptr %x, ptr %y) nounwind {
+; CHECK-LABEL: maxnum_v4f32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    vld $vr0, $a2, 0
+; CHECK-NEXT:    vld $vr1, $a1, 0
+; CHECK-NEXT:    vreplvei.w $vr2, $vr0, 1
+; CHECK-NEXT:    vreplvei.w $vr3, $vr1, 1
+; CHECK-NEXT:    fmax.s $fa2, $fa3, $fa2
+; CHECK-NEXT:    vreplvei.w $vr3, $vr0, 0
+; CHECK-NEXT:    vreplvei.w $vr4, $vr1, 0
+; CHECK-NEXT:    fmax.s $fa3, $fa4, $fa3
+; CHECK-NEXT:    vextrins.w $vr3, $vr2, 16
+; CHECK-NEXT:    vreplvei.w $vr2, $vr0, 2
+; CHECK-NEXT:    vreplvei.w $vr4, $vr1, 2
+; CHECK-NEXT:    fmax.s $fa2, $fa4, $fa2
+; CHECK-NEXT:    vextrins.w $vr3, $vr2, 32
+; CHECK-NEXT:    vreplvei.w $vr0, $vr0, 3
+; CHECK-NEXT:    vreplvei.w $vr1, $vr1, 3
+; CHECK-NEXT:    fmax.s $fa0, $fa1, $fa0
+; CHECK-NEXT:    vextrins.w $vr3, $vr0, 48
+; CHECK-NEXT:    vst $vr3, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %v0 = load <4 x float>, ptr %x
+  %v1 = load <4 x float>, ptr %y
+  %r = call <4 x float> @llvm.maxnum.v4f32(<4 x float> %v0, <4 x float> %v1)
+  store <4 x float> %r, ptr %res
+  ret void
+}
+
+define void @maxnum_v2f64(ptr %res, ptr %x, ptr %y) nounwind {
+; CHECK-LABEL: maxnum_v2f64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    vld $vr0, $a2, 0
+; CHECK-NEXT:    vld $vr1, $a1, 0
+; CHECK-NEXT:    vreplvei.d $vr2, $vr0, 1
+; CHECK-NEXT:    vreplvei.d $vr3, $vr1, 1
+; CHECK-NEXT:    fmax.d $fa2, $fa3, $fa2
+; CHECK-NEXT:    vreplvei.d $vr0, $vr0, 0
+; CHECK-NEXT:    vreplvei.d $vr1, $vr1, 0
+; CHECK-NEXT:    fmax.d $fa0, $fa1, $fa0
+; CHECK-NEXT:    vextrins.d $vr0, $vr2, 16
+; CHECK-NEXT:    vst $vr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %v0 = load <2 x double>, ptr %x
+  %v1 = load <2 x double>, ptr %y
+  %r = call <2 x double> @llvm.maxnum.v2f64(<2 x double> %v0, <2 x double> %v1)
+  store <2 x double> %r, ptr %res
+  ret void
+}
+
+declare <4 x float> @llvm.minnum.v4f32(<4 x float>, <4 x float>)
+declare <2 x double> @llvm.minnum.v2f64(<2 x double>, <2 x double>)
+declare <4 x float> @llvm.maxnum.v4f32(<4 x float>, <4 x float>)
+declare <2 x double> @llvm.maxnum.v2f64(<2 x double>, <2 x double>)