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Added Conditions of SM90 and ISA7.8 for Using cvt.ftz.f32.bf16 Instruction #165774

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Merged
merged 4 commits into from
Nov 4, 2025
Merged

Added Conditions of SM90 and ISA7.8 for Using cvt.ftz.f32.bf16 Instruction #165774

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a53c7bf
Added Conditions of SM90 and ISA7.8 for using cvt.ftz.f32.bf16
yasmincs Oct 30, 2025
3046c61
Fixed Formatting in NVPTXInstrInfo.td
yasmincs Oct 30, 2025
1907d5b
Merge branch 'main' into main
justinfargnoli Oct 31, 2025
f96ae3f
Merge branch 'main' into main
justinfargnoli Nov 3, 2025
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2 changes: 1 addition & 1 deletion llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
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Original file line number Diff line number Diff line change
Expand Up @@ -2268,7 +2268,7 @@ def : Pat<(f32 (fpround f64:$a)), (CVT_f32_f64 $a, CvtRN)>;
def : Pat<(f32 (fpextend f16:$a)), (CVT_f32_f16 $a, CvtNONE_FTZ)>, Requires<[doF32FTZ]>;
def : Pat<(f32 (fpextend f16:$a)), (CVT_f32_f16 $a, CvtNONE)>;
// fpextend bf16 -> f32
def : Pat<(f32 (fpextend bf16:$a)), (CVT_f32_bf16 $a, CvtNONE_FTZ)>, Requires<[doF32FTZ]>;
def : Pat<(f32 (fpextend bf16:$a)), (CVT_f32_bf16 $a, CvtNONE_FTZ)>, Requires<[doF32FTZ,hasPTX<78>, hasSM<90>]>;
def : Pat<(f32 (fpextend bf16:$a)), (CVT_f32_bf16 $a, CvtNONE)>, Requires<[hasPTX<71>, hasSM<80>]>;

// fpextend f16 -> f64
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