diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp index a30c79a83751a..978fee7dbec9d 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp @@ -144,10 +144,13 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID, case X86::BI__builtin_ia32_undef128: case X86::BI__builtin_ia32_undef256: case X86::BI__builtin_ia32_undef512: - cgm.errorNYI(expr->getSourceRange(), - std::string("unimplemented X86 builtin call: ") + - getContext().BuiltinInfo.getName(builtinID)); - return {}; + // The x86 definition of "undef" is not the same as the LLVM definition + // (PR32176). We leave optimizing away an unnecessary zero constant to the + // IR optimizer and backend. + // TODO: If we had a "freeze" IR instruction to generate a fixed undef + // value, we should use that here instead of a zero. + return builder.getNullValue(convertType(expr->getType()), + getLoc(expr->getExprLoc())); case X86::BI__builtin_ia32_vec_ext_v4hi: case X86::BI__builtin_ia32_vec_ext_v16qi: case X86::BI__builtin_ia32_vec_ext_v8hi: diff --git a/clang/test/CIR/CodeGen/X86/avx-builtins.c b/clang/test/CIR/CodeGen/X86/avx-builtins.c new file mode 100644 index 0000000000000..82fa4358dc400 --- /dev/null +++ b/clang/test/CIR/CodeGen/X86/avx-builtins.c @@ -0,0 +1,76 @@ +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx -fclangir -emit-cir -o %t.cir -Wall -Werror +// RUN: FileCheck --check-prefixes=CIR --input-file=%t.cir %s +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx -fno-signed-char -fclangir -emit-cir -o %t.cir -Wall -Werror +// RUN: FileCheck --check-prefixes=CIR --input-file=%t.cir %s + +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx -fclangir -emit-llvm -o %t.ll -Wall -Werror +// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx -fno-signed-char -fclangir -emit-llvm -o %t.ll -Wall -Werror +// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s + +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx -fclangir -emit-cir -o %t.cir -Wall -Werror +// RUN: FileCheck --check-prefixes=CIR --input-file=%t.cir %s +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx -fno-signed-char -fclangir -emit-cir -o %t.cir -Wall -Werror +// RUN: FileCheck --check-prefixes=CIR --input-file=%t.cir %s + +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx -fclangir -emit-llvm -o %t.ll -Wall -Werror +// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx -fno-signed-char -fclangir -emit-llvm -o %t.ll -Wall -Werror +// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s + +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefixes=OGCG +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx -fno-signed-char -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefixes=OGCG +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefixes=OGCG +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx -fno-signed-char -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefixes=OGCG + +// This test mimics clang/test/CodeGen/X86/avx-builtins.c, which eventually +// CIR shall be able to support fully. + +#include + +__m256 test_mm256_undefined_ps(void) { + // CIR-LABEL: _mm256_undefined_ps + // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<4 x !cir.double> + // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<4 x !cir.double> -> !cir.vector<8 x !cir.float> + // CIR: cir.return %{{.*}} : !cir.vector<8 x !cir.float> + + // LLVM-LABEL: test_mm256_undefined_ps + // LLVM: store <8 x float> zeroinitializer, ptr %[[A:.*]], align 32 + // LLVM: %{{.*}} = load <8 x float>, ptr %[[A]], align 32 + // LLVM: ret <8 x float> %{{.*}} + + // OGCG-LABEL: test_mm256_undefined_ps + // OGCG: ret <8 x float> zeroinitializer + return _mm256_undefined_ps(); +} + +__m256d test_mm256_undefined_pd(void) { + // CIR-LABEL: _mm256_undefined_pd + // CIR: %{{.*}} = cir.const #cir.zero : !cir.vector<4 x !cir.double> + // CIR: cir.return %{{.*}} : !cir.vector<4 x !cir.double> + + // LLVM-LABEL: test_mm256_undefined_pd + // LLVM: store <4 x double> zeroinitializer, ptr %[[A:.*]], align 32 + // LLVM: %{{.*}} = load <4 x double>, ptr %[[A]], align 32 + // LLVM: ret <4 x double> %{{.*}} + + // OGCG-LABEL: test_mm256_undefined_pd + // OGCG: ret <4 x double> zeroinitializer + return _mm256_undefined_pd(); +} + +__m256i test_mm256_undefined_si256(void) { + // CIR-LABEL: _mm256_undefined_si256 + // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<4 x !cir.double> + // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<4 x !cir.double> -> !cir.vector<4 x !s64i> + // CIR: cir.return %{{.*}} : !cir.vector<4 x !s64i> + + // LLVM-LABEL: test_mm256_undefined_si256 + // LLVM: store <4 x i64> zeroinitializer, ptr %[[A:.*]], align 32 + // LLVM: %{{.*}} = load <4 x i64>, ptr %[[A]], align 32 + // LLVM: ret <4 x i64> %{{.*}} + + // OGCG-LABEL: test_mm256_undefined_si256 + // OGCG: ret <4 x i64> zeroinitializer + return _mm256_undefined_si256(); +} \ No newline at end of file diff --git a/clang/test/CIR/CodeGen/X86/avx10_2_512bf16-builtins.c b/clang/test/CIR/CodeGen/X86/avx10_2_512bf16-builtins.c new file mode 100644 index 0000000000000..e4501889c2d60 --- /dev/null +++ b/clang/test/CIR/CodeGen/X86/avx10_2_512bf16-builtins.c @@ -0,0 +1,28 @@ +// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx10.2-512 -fclangir -emit-cir -o %t.cir -Wno-invalid-feature-combination -Wall -Werror -Wsign-conversion +// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s +// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx10.2-512 -fclangir -emit-llvm -o %t.ll -Wno-invalid-feature-combination -Wall -Werror -Wsign-conversion +// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s + +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx10.2 -emit-llvm -o - -Wall -Werror | FileCheck %s -check-prefix=OGCG +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx10.2 -emit-llvm -o - -Wall -Werror | FileCheck %s -check-prefix=OGCG + +#include + +__m512bh test_mm512_undefined_pbh(void) { + // CIR-LABEL: _mm512_undefined_pbh + // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<8 x !cir.double> + // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<8 x !cir.double> -> !cir.vector<32 x !cir.bf16> + // CIR: cir.return %{{.*}} : !cir.vector<32 x !cir.bf16> + + // CIR-LABEL: cir.func {{.*}}test_mm512_undefined_pbh + // CIR: call @_mm512_undefined_pbh + + // LLVM-LABEL: test_mm512_undefined_pbh + // LLVM: store <32 x bfloat> zeroinitializer, ptr %[[A:.*]], align 64 + // LLVM: %{{.*}} = load <32 x bfloat>, ptr %[[A]], align 64 + // LLVM: ret <32 x bfloat> %{{.*}} + + // OGCG-LABEL: test_mm512_undefined_pbh + // OGCG: ret <32 x bfloat> zeroinitializer + return _mm512_undefined_pbh(); +} diff --git a/clang/test/CIR/CodeGen/X86/avx10_2bf16-builtins.c b/clang/test/CIR/CodeGen/X86/avx10_2bf16-builtins.c new file mode 100644 index 0000000000000..4dac4fa2fe811 --- /dev/null +++ b/clang/test/CIR/CodeGen/X86/avx10_2bf16-builtins.c @@ -0,0 +1,47 @@ +// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx10.2-256 -fclangir -emit-cir -o %t.cir -Wno-invalid-feature-combination -Wall -Werror -Wsign-conversion +// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s +// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx10.2-256 -fclangir -emit-llvm -o %t.ll -Wno-invalid-feature-combination -Wall -Werror -Wsign-conversion +// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s + +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx10.2 -emit-llvm -o - -Wall -Werror | FileCheck %s -check-prefix=OGCG +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx10.2 -emit-llvm -o - -Wall -Werror | FileCheck %s -check-prefix=OGCG + +#include + +__m128bh test_mm_undefined_pbh(void) { + // CIR-LABEL: _mm_undefined_pbh + // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<2 x !cir.double> + // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<2 x !cir.double> -> !cir.vector<8 x !cir.bf16> + // CIR: cir.return %{{.*}} : !cir.vector<8 x !cir.bf16> + + // CIR-LABEL: cir.func {{.*}}test_mm_undefined_pbh + // CIR: call @_mm_undefined_pbh + + // LLVM-LABEL: @test_mm_undefined_pbh + // LLVM: store <8 x bfloat> zeroinitializer, ptr %[[A:.*]], align 16 + // LLVM: %{{.*}} = load <8 x bfloat>, ptr %[[A]], align 16 + // LLVM: ret <8 x bfloat> %{{.*}} + + // OGCG-LABEL: test_mm_undefined_pbh + // OGCG: ret <8 x bfloat> zeroinitializer + return _mm_undefined_pbh(); +} + +__m256bh test_mm256_undefined_pbh(void) { + // CIR-LABEL: _mm256_undefined_pbh + // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<4 x !cir.double> + // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<4 x !cir.double> -> !cir.vector<16 x !cir.bf16> + // CIR: cir.return %{{.*}} : !cir.vector<16 x !cir.bf16> + + // CIR-LABEL: cir.func {{.*}}test_mm256_undefined_pbh + // CIR: call @_mm256_undefined_pbh + + // LLVM-LABEL: @test_mm256_undefined_pbh + // LLVM: store <16 x bfloat> zeroinitializer, ptr %[[A:.*]], align 32 + // LLVM: %{{.*}} = load <16 x bfloat>, ptr %[[A]], align 32 + // LLVM: ret <16 x bfloat> %{{.*}} + + // OGCG-LABEL: test_mm256_undefined_pbh + // OGCG: ret <16 x bfloat> zeroinitializer + return _mm256_undefined_pbh(); +} \ No newline at end of file diff --git a/clang/test/CIR/CodeGen/X86/avx512f-builtins.c b/clang/test/CIR/CodeGen/X86/avx512f-builtins.c new file mode 100644 index 0000000000000..dc54a87856a7c --- /dev/null +++ b/clang/test/CIR/CodeGen/X86/avx512f-builtins.c @@ -0,0 +1,79 @@ +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512f -fclangir -emit-cir -o %t.cir -Wall -Werror -Wsign-conversion +// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512f -fclangir -emit-llvm -o %t.ll -Wall -Werror -Wsign-conversion +// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s + +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512f -fclangir -emit-cir -o %t.cir -Wall -Werror -Wsign-conversion +// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512f -fclangir -emit-llvm -o %t.ll -Wall -Werror -Wsign-conversion +// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s + +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512f -emit-llvm -o - -Wall -Werror -Wsign-conversion | FileCheck %s --check-prefixes=OGCG +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -fms-extensions -fms-compatibility -ffreestanding %s -triple=x86_64-windows-msvc -target-feature +avx512f -emit-llvm -o - -Wall -Werror -Wsign-conversion | FileCheck %s --check-prefixes=OGCG +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512f -emit-llvm -o - -Wall -Werror -Wsign-conversion | FileCheck %s --check-prefixes=OGCG +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -fms-extensions -fms-compatibility -ffreestanding %s -triple=x86_64-windows-msvc -target-feature +avx512f -emit-llvm -o - -Wall -Werror -Wsign-conversion | FileCheck %s --check-prefixes=OGCG + +#include + +__m512 test_mm512_undefined(void) { + // CIR-LABEL: _mm512_undefined + // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<8 x !cir.double> + // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<8 x !cir.double> -> !cir.vector<16 x !cir.float> + // CIR: cir.return %{{.*}} : !cir.vector<16 x !cir.float> + + // LLVM-LABEL: test_mm512_undefined + // LLVM: store <16 x float> zeroinitializer, ptr %[[A:.*]], align 64 + // LLVM: %{{.*}} = load <16 x float>, ptr %[[A]], align 64 + // LLVM: ret <16 x float> %{{.*}} + + // OGCG-LABEL: test_mm512_undefined + // OGCG: ret <16 x float> zeroinitializer + return _mm512_undefined(); +} + +__m512 test_mm512_undefined_ps(void) { + // CIR-LABEL: _mm512_undefined_ps + // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<8 x !cir.double> + // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<8 x !cir.double> -> !cir.vector<16 x !cir.float> + // CIR: cir.return %{{.*}} : !cir.vector<16 x !cir.float> + + // LLVM-LABEL: test_mm512_undefined_ps + // LLVM: store <16 x float> zeroinitializer, ptr %[[A:.*]], align 64 + // LLVM: %{{.*}} = load <16 x float>, ptr %[[A]], align 64 + // LLVM: ret <16 x float> %{{.*}} + + // OGCG-LABEL: test_mm512_undefined_ps + // OGCG: ret <16 x float> zeroinitializer + return _mm512_undefined_ps(); +} + +__m512d test_mm512_undefined_pd(void) { + // CIR-LABEL: _mm512_undefined_pd + // CIR: %{{.*}} = cir.const #cir.zero : !cir.vector<8 x !cir.double> + // CIR: cir.return %{{.*}} : !cir.vector<8 x !cir.double> + + // LLVM-LABEL: test_mm512_undefined_pd + // LLVM: store <8 x double> zeroinitializer, ptr %[[A:.*]], align 64 + // LLVM: %{{.*}} = load <8 x double>, ptr %[[A]], align 64 + // LLVM: ret <8 x double> %{{.*}} + + // OGCG-LABEL: test_mm512_undefined_pd + // OGCG: ret <8 x double> zeroinitializer + return _mm512_undefined_pd(); +} + +__m512i test_mm512_undefined_epi32(void) { + // CIR-LABEL: _mm512_undefined_epi32 + // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<8 x !cir.double> + // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<8 x !cir.double> -> !cir.vector<8 x !s64i> + // CIR: cir.return %{{.*}} : !cir.vector<8 x !s64i> + + // LLVM-LABEL: test_mm512_undefined_epi32 + // LLVM: store <8 x i64> zeroinitializer, ptr %[[A:.*]], align 64 + // LLVM: %{{.*}} = load <8 x i64>, ptr %[[A]], align 64 + // LLVM: ret <8 x i64> %{{.*}} + + // OGCG-LABEL: test_mm512_undefined_epi32 + // OGCG: ret <8 x i64> zeroinitializer + return _mm512_undefined_epi32(); +} diff --git a/clang/test/CIR/CodeGen/X86/avx512fp16-builtins.c b/clang/test/CIR/CodeGen/X86/avx512fp16-builtins.c new file mode 100644 index 0000000000000..161fc45b2a32d --- /dev/null +++ b/clang/test/CIR/CodeGen/X86/avx512fp16-builtins.c @@ -0,0 +1,66 @@ +// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512fp16 -fclangir -emit-cir -o %t.cir -Wall -Werror +// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s +// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512fp16 -fclangir -emit-llvm -o %t.ll -Wall -Werror +// RUN: FileCheck --check-prefixes=LLVM --input-file=%t.ll %s + +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512fp16 -emit-llvm -o - -Wall -Werror | FileCheck %s -check-prefix=OGCG +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx512fp16 -emit-llvm -o - -Wall -Werror | FileCheck %s -check-prefix=OGCG + +#include + +__m128h test_mm_undefined_ph(void) { + // CIR-LABEL: _mm_undefined_ph + // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<2 x !cir.double> + // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<2 x !cir.double> -> !cir.vector<8 x !cir.f16> + // CIR: cir.return %{{.*}} : !cir.vector<8 x !cir.f16> + + // CIR-LABEL: cir.func {{.*}}test_mm_undefined_ph + // CIR: call @_mm_undefined_ph + + // LLVM-LABEL: @test_mm_undefined_ph + // LLVM: store <8 x half> zeroinitializer, ptr %[[A:.*]], align 16 + // LLVM: %{{.*}} = load <8 x half>, ptr %[[A]], align 16 + // LLVM: ret <8 x half> %{{.*}} + + // OGCG-LABEL: test_mm_undefined_ph + // OGCG: ret <8 x half> zeroinitializer + return _mm_undefined_ph(); +} + +__m256h test_mm256_undefined_ph(void) { + // CIR-LABEL: _mm256_undefined_ph + // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<4 x !cir.double> + // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<4 x !cir.double> -> !cir.vector<16 x !cir.f16> + // CIR: cir.return %{{.*}} : !cir.vector<16 x !cir.f16> + + // CIR-LABEL: cir.func {{.*}}test_mm256_undefined_ph + // CIR: call @_mm256_undefined_ph + + // LLVM-LABEL: @test_mm256_undefined_ph + // LLVM: store <16 x half> zeroinitializer, ptr %[[A:.*]], align 32 + // LLVM: %{{.*}} = load <16 x half>, ptr %[[A]], align 32 + // LLVM: ret <16 x half> %{{.*}} + + // OGCG-LABEL: test_mm256_undefined_ph + // OGCG: ret <16 x half> zeroinitializer + return _mm256_undefined_ph(); +} + +__m512h test_mm512_undefined_ph(void) { + // CIR-LABEL: _mm512_undefined_ph + // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<8 x !cir.double> + // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<8 x !cir.double> -> !cir.vector<32 x !cir.f16> + // CIR: cir.return %{{.*}} : !cir.vector<32 x !cir.f16> + + // CIR-LABEL: cir.func {{.*}}test_mm512_undefined_ph + // CIR: call @_mm512_undefined_ph + + // LLVM-LABEL: @test_mm512_undefined_ph + // LLVM: store <32 x half> zeroinitializer, ptr %[[A:.*]], align 64 + // LLVM: %{{.*}} = load <32 x half>, ptr %[[A]], align 64 + // LLVM: ret <32 x half> %{{.*}} + + // OGCG-LABEL: test_mm512_undefined_ph + // OGCG: ret <32 x half> zeroinitializer + return _mm512_undefined_ph(); +} \ No newline at end of file diff --git a/clang/test/CIR/CodeGen/X86/sse-builtins.c b/clang/test/CIR/CodeGen/X86/sse-builtins.c index 04e69a9990159..c893859b297cc 100644 --- a/clang/test/CIR/CodeGen/X86/sse-builtins.c +++ b/clang/test/CIR/CodeGen/X86/sse-builtins.c @@ -55,3 +55,19 @@ void test_mm_sfence(void) { // LLVM: call void @llvm.x86.sse.sfence() // OGCG: call void @llvm.x86.sse.sfence() } + +__m128 test_mm_undefined_ps(void) { + // CIR-LABEL: _mm_undefined_ps + // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<2 x !cir.double> + // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<2 x !cir.double> -> !cir.vector<4 x !cir.float> + // CIR: cir.return %{{.*}} : !cir.vector<4 x !cir.float> + + // LLVM-LABEL: test_mm_undefined_ps + // LLVM: store <4 x float> zeroinitializer, ptr %[[A:.*]], align 16 + // LLVM: %{{.*}} = load <4 x float>, ptr %[[A]], align 16 + // LLVM: ret <4 x float> %{{.*}} + + // OGCG-LABEL: test_mm_undefined_ps + // OGCG: ret <4 x float> zeroinitializer + return _mm_undefined_ps(); +} diff --git a/clang/test/CIR/CodeGen/X86/sse2-builtins.c b/clang/test/CIR/CodeGen/X86/sse2-builtins.c index 9ec8f7a9bf4fe..f5e07cdc28ccd 100644 --- a/clang/test/CIR/CodeGen/X86/sse2-builtins.c +++ b/clang/test/CIR/CodeGen/X86/sse2-builtins.c @@ -16,6 +16,43 @@ #include +__m128d test_mm_undefined_pd(void) { + // CIR-LABEL: _mm_undefined_pd + // CIR: %{{.*}} = cir.const #cir.zero : !cir.vector<2 x !cir.double> + // CIR: cir.return %{{.*}} : !cir.vector<2 x !cir.double> + + // CIR-LABEL: cir.func {{.*}}test_mm_undefined_pd + // CIR: call @_mm_undefined_pd + + // LLVM-LABEL: test_mm_undefined_pd + // LLVM: store <2 x double> zeroinitializer, ptr %[[A:.*]], align 16 + // LLVM: %{{.*}} = load <2 x double>, ptr %[[A]], align 16 + // LLVM: ret <2 x double> %{{.*}} + + // OGCG-LABEL: test_mm_undefined_pd + // OGCG: ret <2 x double> zeroinitializer + return _mm_undefined_pd(); +} + +__m128i test_mm_undefined_si128(void) { + // CIR-LABEL: _mm_undefined_si128 + // CIR: %[[A:.*]] = cir.const #cir.zero : !cir.vector<2 x !cir.double> + // CIR: %{{.*}} = cir.cast bitcast %[[A]] : !cir.vector<2 x !cir.double> -> + // CIR: cir.return %{{.*}} : + + // CIR-LABEL: cir.func {{.*}}test_mm_undefined_si128 + // CIR: call @_mm_undefined_si128 + + // LLVM-LABEL: test_mm_undefined_si128 + // LLVM: store <2 x i64> zeroinitializer, ptr %[[A:.*]], align 16 + // LLVM: %{{.*}} = load <2 x i64>, ptr %[[A]], align 16 + // LLVM: ret <2 x i64> %{{.*}} + + // OGCG-LABEL: test_mm_undefined_si128 + // OGCG: ret <2 x i64> zeroinitializer + return _mm_undefined_si128(); +} + // Lowering to pextrw requires optimization. int test_mm_extract_epi16(__m128i A) { // CIR-LABEL: test_mm_extract_epi16