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[Clang][X86] allow VPERMILPD/S imm intrinsics to be used in constexpr #168044

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Merged
merged 8 commits into from
Nov 19, 2025
+139 −6
Merged

[Clang][X86] allow VPERMILPD/S imm intrinsics to be used in constexpr #168044

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a1023b4
adding cases for vpermilpd and vpermilps
stomfaig Nov 14, 2025
495094e
vpermilps has same impl as pshufd
stomfaig Nov 14, 2025
c004b68
impl vpermilps and vpermilpd in ExprConstant
stomfaig Nov 14, 2025
f2c0a61
format
stomfaig Nov 14, 2025
c7a1b37
Merge branch 'main' into issue_166529
stomfaig Nov 18, 2025
87017fc
make intrinsics Constexpr
stomfaig Nov 18, 2025
1a7fd49
adding tests
stomfaig Nov 18, 2025
733eb70
Merge branch 'main' into issue_166529
RKSimon Nov 19, 2025
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19 changes: 19 additions & 0 deletions clang/lib/AST/ByteCode/InterpBuiltin.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -4555,6 +4555,9 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call,
case X86::BI__builtin_ia32_pshufd:
case X86::BI__builtin_ia32_pshufd256:
case X86::BI__builtin_ia32_pshufd512:
case X86::BI__builtin_ia32_vpermilps:
case X86::BI__builtin_ia32_vpermilps256:
case X86::BI__builtin_ia32_vpermilps512:
return interp__builtin_ia32_shuffle_generic(
S, OpPC, Call, [](unsigned DstIdx, unsigned ShuffleMask) {
unsigned LaneBase = (DstIdx / 4) * 4;
Expand All @@ -4563,6 +4566,22 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call,
return std::make_pair(0, static_cast<int>(LaneBase + Sel));
});

case X86::BI__builtin_ia32_vpermilpd:
case X86::BI__builtin_ia32_vpermilpd256:
case X86::BI__builtin_ia32_vpermilpd512:
return interp__builtin_ia32_shuffle_generic(
S, OpPC, Call, [](unsigned DstIdx, unsigned Control) {
unsigned NumElemPerLane = 2;
unsigned BitsPerElem = 1;
unsigned MaskBits = 8;
unsigned IndexMask = 0x1;
unsigned Lane = DstIdx / NumElemPerLane;
unsigned LaneOffset = Lane * NumElemPerLane;
unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
unsigned Index = (Control >> BitIndex) & IndexMask;
return std::make_pair(0, static_cast<int>(LaneOffset + Index));
});

case X86::BI__builtin_ia32_kandqi:
case X86::BI__builtin_ia32_kandhi:
case X86::BI__builtin_ia32_kandsi:
Expand Down
24 changes: 23 additions & 1 deletion clang/lib/AST/ExprConstant.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -12998,7 +12998,10 @@ bool VectorExprEvaluator::VisitCallExpr(const CallExpr *E) {

case X86::BI__builtin_ia32_pshufd:
case X86::BI__builtin_ia32_pshufd256:
case X86::BI__builtin_ia32_pshufd512: {
case X86::BI__builtin_ia32_pshufd512:
case X86::BI__builtin_ia32_vpermilps:
case X86::BI__builtin_ia32_vpermilps256:
case X86::BI__builtin_ia32_vpermilps512: {
APValue R;
if (!evalShuffleGeneric(
Info, E, R,
Expand All @@ -13015,6 +13018,25 @@ bool VectorExprEvaluator::VisitCallExpr(const CallExpr *E) {
return Success(R, E);
}

case X86::BI__builtin_ia32_vpermilpd:
case X86::BI__builtin_ia32_vpermilpd256:
case X86::BI__builtin_ia32_vpermilpd512: {
APValue R;
if (!evalShuffleGeneric(Info, E, R, [](unsigned DstIdx, unsigned Control) {
unsigned NumElemPerLane = 2;
unsigned BitsPerElem = 1;
unsigned MaskBits = 8;
unsigned IndexMask = 0x1;
unsigned Lane = DstIdx / NumElemPerLane;
unsigned LaneOffset = Lane * NumElemPerLane;
unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
unsigned Index = (Control >> BitIndex) & IndexMask;
return std::make_pair(0, static_cast<int>(LaneOffset + Index));
}))
return false;
return Success(R, E);
}

case X86::BI__builtin_ia32_phminposuw128: {
APValue Source;
if (!Evaluate(Source, Info, E->getArg(0)))
Expand Down
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