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| 1 | +#--- source.hlsl |
| 2 | +StructuredBuffer<int16_t4> In0 : register(t0); |
| 3 | +StructuredBuffer<uint16_t4> In1 : register(t1); |
| 4 | +RWStructuredBuffer<int16_t4> Out0 : register(u2); |
| 5 | +RWStructuredBuffer<int16_t4> Out1 : register(u3); |
| 6 | + |
| 7 | +[numthreads(1,1,1)] |
| 8 | +void main() { |
| 9 | + |
| 10 | + Out0[0] = asint16(In0[0]); |
| 11 | + Out0[1] = int16_t4(asint16(In0[1].xyz), asint16(In0[1].w)); |
| 12 | + Out0[2] = int16_t4(asint16(In0[2].xy), asint16(In0[2].zw)); |
| 13 | + Out0[3] = asint16(int16_t4(0, 32767, -100, -32768)); |
| 14 | + |
| 15 | + Out1[0] = asint16(In1[0]); |
| 16 | + Out1[1] = int16_t4(asint16(In1[1].xyz), asint16(In1[1].w)); |
| 17 | + Out1[2] = int16_t4(asint16(In1[2].xy), asint16(In1[2].zw)); |
| 18 | + Out1[3] = asint16(uint16_t4(0, 100, 65535, 10)); |
| 19 | +} |
| 20 | +//--- pipeline.yaml |
| 21 | + |
| 22 | +--- |
| 23 | +Shaders: |
| 24 | + - Stage: Compute |
| 25 | + Entry: main |
| 26 | + DispatchSize: [1, 1, 1] |
| 27 | +Buffers: |
| 28 | + - Name: In0 |
| 29 | + Format: Int16 |
| 30 | + Stride: 8 |
| 31 | + Data: [0, 32767, -100, -32768, 10, 20, 30, 6000, -3000, -30000, 50, 60] |
| 32 | + - Name: In1 |
| 33 | + Format: UInt16 |
| 34 | + Stride: 8 |
| 35 | + Data: [0, 100, 65535, 10, 20, 30, 40, 50, 60, 70, 80, 6000] |
| 36 | + - Name: Out0 |
| 37 | + Format: Int16 |
| 38 | + Stride: 8 |
| 39 | + ZeroInitSize: 32 |
| 40 | + - Name: ExpectedOut0 |
| 41 | + Format: Int16 |
| 42 | + Stride: 8 |
| 43 | + Data: [0, 32767, -100, -32768, 10, 20, 30, 6000, -3000, -30000, 50, 60, 0, 32767, -100, -32768] |
| 44 | + - Name: Out1 |
| 45 | + Format: Int16 |
| 46 | + Stride: 8 |
| 47 | + ZeroInitSize: 32 |
| 48 | + - Name: ExpectedOut1 |
| 49 | + Format: Int16 |
| 50 | + Stride: 8 |
| 51 | + Data: [ 0, 100, -1, 10, 20, 30, 40, 50, 60, 70, 80, 6000, 0, 100, -1, 10 ] |
| 52 | +Results: |
| 53 | + - Result: Test0 |
| 54 | + Rule: BufferExact |
| 55 | + Actual: Out0 |
| 56 | + Expected: ExpectedOut0 |
| 57 | + - Result: Test1 |
| 58 | + Rule: BufferExact |
| 59 | + Actual: Out1 |
| 60 | + Expected: ExpectedOut1 |
| 61 | +DescriptorSets: |
| 62 | + - Resources: |
| 63 | + - Name: In0 |
| 64 | + Kind: StructuredBuffer |
| 65 | + DirectXBinding: |
| 66 | + Register: 0 |
| 67 | + Space: 0 |
| 68 | + VulkanBinding: |
| 69 | + Binding: 0 |
| 70 | + - Name: In1 |
| 71 | + Kind: StructuredBuffer |
| 72 | + DirectXBinding: |
| 73 | + Register: 1 |
| 74 | + Space: 0 |
| 75 | + VulkanBinding: |
| 76 | + Binding: 1 |
| 77 | + - Name: Out0 |
| 78 | + Kind: RWStructuredBuffer |
| 79 | + DirectXBinding: |
| 80 | + Register: 2 |
| 81 | + Space: 0 |
| 82 | + VulkanBinding: |
| 83 | + Binding: 2 |
| 84 | + - Name: Out1 |
| 85 | + Kind: RWStructuredBuffer |
| 86 | + DirectXBinding: |
| 87 | + Register: 3 |
| 88 | + Space: 0 |
| 89 | + VulkanBinding: |
| 90 | + Binding: 3 |
| 91 | +#--- end |
| 92 | + |
| 93 | +# REQUIRES: Int16 |
| 94 | +# RUN: split-file %s %t |
| 95 | +# RUN: %dxc_target -enable-16bit-types -T cs_6_5 -Fo %t.o %t/source.hlsl |
| 96 | +# RUN: %offloader %t/pipeline.yaml %t.o |
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