Skip to content

Commit 22129ec

Browse files
V-FEXrtV-FEXrt
authored
Implement firstbitlow test (#209)
Adds tests for `firstbitlow` Fixes #113
1 parent 8ae9b72 commit 22129ec

File tree

3 files changed

+258
-0
lines changed

3 files changed

+258
-0
lines changed

‎test/Feature/HLSLLib/firstbitlow.16.test

Lines changed: 88 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,88 @@
1+
#--- source.hlsl
2+
3+
StructuredBuffer<uint16_t4> In1 : register(t0);
4+
StructuredBuffer<int16_t4> In2 : register(t1);
5+
RWStructuredBuffer<uint32_t4> Out : register(u2);
6+
7+
[numthreads(1,1,1)]
8+
void main() {
9+
Out[0] = firstbitlow(In1[0]);
10+
uint32_t4 Out1 = {firstbitlow(In1[0].xyz), firstbitlow(In1[0].w)};
11+
uint32_t4 Out2 = {firstbitlow(In2[0].xy), firstbitlow(In2[0].zw)};
12+
Out[1] = Out1;
13+
Out[2] = Out2;
14+
}
15+
16+
//--- pipeline.yaml
17+
18+
---
19+
Shaders:
20+
- Stage: Compute
21+
Entry: main
22+
DispatchSize: [1, 1, 1]
23+
Buffers:
24+
- Name: In1
25+
Format: Hex16
26+
Stride: 8
27+
Data: [
28+
0x0000,
29+
0x00E8,
30+
0x8000,
31+
0xFFFF,
32+
]
33+
- Name: In2
34+
Format: Int16
35+
Stride: 8
36+
Data: [-1, -8, 8, 0]
37+
- Name: Out
38+
Format: UInt32
39+
Stride: 16
40+
ZeroInitSize: 48
41+
- Name: ExpectedOut # The result we expect
42+
Format: UInt32
43+
Stride: 16
44+
# All bits set (4294967295) is returned when no bit is set on the input
45+
Data: [4294967295, 3, 15, 0, 4294967295, 3, 15, 0, 0, 3, 3, 4294967295]
46+
Results:
47+
- Result: Test1
48+
Rule: BufferExact
49+
Actual: Out
50+
Expected: ExpectedOut
51+
DescriptorSets:
52+
- Resources:
53+
- Name: In1
54+
Kind: StructuredBuffer
55+
DirectXBinding:
56+
Register: 0
57+
Space: 0
58+
VulkanBinding:
59+
Binding: 0
60+
- Name: In2
61+
Kind: StructuredBuffer
62+
DirectXBinding:
63+
Register: 1
64+
Space: 0
65+
VulkanBinding:
66+
Binding: 1
67+
- Name: Out
68+
Kind: RWStructuredBuffer
69+
DirectXBinding:
70+
Register: 2
71+
Space: 0
72+
VulkanBinding:
73+
Binding: 2
74+
...
75+
#--- end
76+
77+
# REQUIRES: Int16
78+
79+
# Fails with 'gpu-exec: error: Failed to materializeAll.:'
80+
# XFAIL: Metal
81+
82+
# 16/64 bit firstbitlow doesn't have a DXC-Vulkan lowering
83+
# https://github.com/microsoft/DirectXShaderCompiler/blob/48d6e3c635f0ab3ae79580c37003e6faeca6c671/tools/clang/test/CodeGenSPIRV/intrinsics.firstbitlow.64bit.hlsl#L5
84+
# UNSUPPORTED: DXC-Vulkan
85+
86+
# RUN: split-file %s %t
87+
# RUN: %dxc_target -T cs_6_5 -enable-16bit-types -Fo %t.o %t/source.hlsl
88+
# RUN: %offloader %t/pipeline.yaml %t.o

‎test/Feature/HLSLLib/firstbitlow.32.test

Lines changed: 79 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,79 @@
1+
#--- source.hlsl
2+
3+
StructuredBuffer<uint4> In1 : register(t0);
4+
StructuredBuffer<int4> In2 : register(t1);
5+
RWStructuredBuffer<uint4> Out : register(u2);
6+
7+
[numthreads(1,1,1)]
8+
void main() {
9+
Out[0] = firstbitlow(In1[0]);
10+
uint4 Out1 = {firstbitlow(In1[0].xyz), firstbitlow(In1[0].w)};
11+
uint4 Out2 = {firstbitlow(In2[0].xy), firstbitlow(In2[0].zw)};
12+
Out[1] = Out1;
13+
Out[2] = Out2;
14+
}
15+
16+
//--- pipeline.yaml
17+
18+
---
19+
Shaders:
20+
- Stage: Compute
21+
Entry: main
22+
DispatchSize: [1, 1, 1]
23+
Buffers:
24+
- Name: In1
25+
Format: Hex32
26+
Stride: 16
27+
Data: [
28+
0x00000000,
29+
0x000000E8,
30+
0x80000000,
31+
0xFFFFFFFF,
32+
]
33+
- Name: In2
34+
Format: Int32
35+
Stride: 16
36+
Data: [-1, -8, 8, 0]
37+
- Name: Out
38+
Format: UInt32
39+
Stride: 16
40+
ZeroInitSize: 48
41+
- Name: ExpectedOut # The result we expect
42+
Format: UInt32
43+
Stride: 16
44+
# All bits set (4294967295) is returned when no bit is set on the input
45+
Data: [4294967295, 3, 31, 0, 4294967295, 3, 31, 0, 0, 3, 3, 4294967295]
46+
Results:
47+
- Result: Test1
48+
Rule: BufferExact
49+
Actual: Out
50+
Expected: ExpectedOut
51+
DescriptorSets:
52+
- Resources:
53+
- Name: In1
54+
Kind: StructuredBuffer
55+
DirectXBinding:
56+
Register: 0
57+
Space: 0
58+
VulkanBinding:
59+
Binding: 0
60+
- Name: In2
61+
Kind: StructuredBuffer
62+
DirectXBinding:
63+
Register: 1
64+
Space: 0
65+
VulkanBinding:
66+
Binding: 1
67+
- Name: Out
68+
Kind: RWStructuredBuffer
69+
DirectXBinding:
70+
Register: 2
71+
Space: 0
72+
VulkanBinding:
73+
Binding: 2
74+
...
75+
#--- end
76+
77+
# RUN: split-file %s %t
78+
# RUN: %dxc_target -T cs_6_5 -Fo %t.o %t/source.hlsl
79+
# RUN: %offloader %t/pipeline.yaml %t.o

‎test/Feature/HLSLLib/firstbitlow.64.test

Lines changed: 91 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,91 @@
1+
#--- source.hlsl
2+
3+
StructuredBuffer<uint64_t4> In1 : register(t0);
4+
StructuredBuffer<int64_t4> In2 : register(t1);
5+
RWStructuredBuffer<uint32_t4> Out : register(u2);
6+
7+
[numthreads(1,1,1)]
8+
void main() {
9+
Out[0] = firstbitlow(In1[0]);
10+
uint32_t4 Out1 = {firstbitlow(In1[0].xyz), firstbitlow(In1[0].w)};
11+
uint32_t4 Out2 = {firstbitlow(In2[0].xy), firstbitlow(In2[0].zw)};
12+
Out[1] = Out1;
13+
Out[2] = Out2;
14+
}
15+
16+
//--- pipeline.yaml
17+
18+
---
19+
Shaders:
20+
- Stage: Compute
21+
Entry: main
22+
DispatchSize: [1, 1, 1]
23+
Buffers:
24+
- Name: In1
25+
Format: Hex64
26+
Stride: 32
27+
Data: [
28+
0x0000000000000000,
29+
0x00000000000000E8,
30+
0x8000000000000000,
31+
0xFFFFFFFFFFFFFFFF,
32+
]
33+
- Name: In2
34+
Format: Int64
35+
Stride: 32
36+
Data: [-1, -8, 8, 0]
37+
- Name: Out
38+
Format: UInt32
39+
Stride: 16
40+
ZeroInitSize: 48
41+
- Name: ExpectedOut # The result we expect
42+
Format: UInt32
43+
Stride: 16
44+
# All bits set (4294967295) is returned when no bit is set on the input
45+
Data: [4294967295, 3, 63, 0, 4294967295, 3, 63, 0, 0, 3, 3, 4294967295]
46+
Results:
47+
- Result: Test1
48+
Rule: BufferExact
49+
Actual: Out
50+
Expected: ExpectedOut
51+
DescriptorSets:
52+
- Resources:
53+
- Name: In1
54+
Kind: StructuredBuffer
55+
DirectXBinding:
56+
Register: 0
57+
Space: 0
58+
VulkanBinding:
59+
Binding: 0
60+
- Name: In2
61+
Kind: StructuredBuffer
62+
DirectXBinding:
63+
Register: 1
64+
Space: 0
65+
VulkanBinding:
66+
Binding: 1
67+
- Name: Out
68+
Kind: RWStructuredBuffer
69+
DirectXBinding:
70+
Register: 2
71+
Space: 0
72+
VulkanBinding:
73+
Binding: 2
74+
...
75+
#--- end
76+
77+
# REQUIRES: Int64
78+
79+
# Fails with 'gpu-exec: error: Failed to materializeAll.:'
80+
# XFAIL: Metal
81+
82+
# 16/64 bit firstbitlow doesn't have a DXC-Vulkan lowering
83+
# https://github.com/microsoft/DirectXShaderCompiler/blob/48d6e3c635f0ab3ae79580c37003e6faeca6c671/tools/clang/test/CodeGenSPIRV/intrinsics.firstbitlow.64bit.hlsl#L5
84+
# UNSUPPORTED: DXC-Vulkan
85+
86+
# https://github.com/llvm/llvm-project/issues/143003
87+
# XFAIL: Clang-Vulkan
88+
89+
# RUN: split-file %s %t
90+
# RUN: %dxc_target -T cs_6_5 -Fo %t.o %t/source.hlsl
91+
# RUN: %offloader %t/pipeline.yaml %t.o

0 commit comments

Comments
 (0)