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Implement tests for countbits (#205)
Implement tests for `countbits` intrinsic with `uint16_t`, `int16_t`, `uint`, `uint32_t`, `int64_t` and `uint64_t`. Resolves #140
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#--- source.hlsl
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StructuredBuffer<int16_t4> InInt : register(t0);
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StructuredBuffer<uint16_t4> InUInt : register(t1);
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// Explicitly using a size 3 buffer illustrates an error when using warp
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StructuredBuffer<int16_t3> InIntWarp : register(t4);
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StructuredBuffer<uint16_t3> InUIntWarp : register(t5);
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RWStructuredBuffer<uint4> OutInt : register(u2);
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RWStructuredBuffer<uint4> OutUInt : register(u3);
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[numthreads(1,1,1)]
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void main() {
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// Int
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OutInt[0] = countbits(InInt[0]);
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uint4 OutOne = {countbits(InIntWarp[0]), countbits(InUInt[0].w)};
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OutInt[1] = OutOne;
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OutInt[2].xy = countbits(InInt[0].xy);
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// UInt
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OutUInt[0] = countbits(InUInt[0]);
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uint4 OutUOne = {countbits(InUIntWarp[0]), countbits(InUInt[0].w)};
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OutUInt[1] = OutUOne;
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OutUInt[2].xy = countbits(InUInt[0].xy);
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}
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//--- pipeline.yaml
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---
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Shaders:
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- Stage: Compute
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Entry: main
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DispatchSize: [1, 1, 1]
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Buffers:
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- Name: InInt
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Format: Int16
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Stride: 8
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Data: [0x2A, 0, 0x0f0f, -1]
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- Name: InUInt
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Format: UInt16
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Stride: 8
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Data: [0x2A, 0, 0x0f0f, 0xffff]
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- Name: InIntWarp
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Format: Int16
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Stride: 6
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Data: [0, 0x0f0f, -1]
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- Name: InUIntWarp
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Format: UInt16
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Stride: 6
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Data: [0, 0x0f0f, 0xffff]
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- Name: OutInt
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Format: UInt32
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Stride: 16
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ZeroInitSize: 48
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- Name: OutUInt
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Format: UInt32
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Stride: 16
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ZeroInitSize: 48
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- Name: ExpectedOut # The result we expect
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Format: UInt32
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Stride: 16
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Data: [3, 0, 8, 16, 3, 0, 8, 16, 3, 0, 0, 0]
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Results:
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- Result: Test1
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Rule: BufferExact
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Actual: OutInt
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Expected: ExpectedOut
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- Result: Test2
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Rule: BufferExact
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Actual: OutUInt
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Expected: ExpectedOut
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DescriptorSets:
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- Resources:
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- Name: InInt
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Kind: StructuredBuffer
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DirectXBinding:
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Register: 0
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Space: 0
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VulkanBinding:
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Binding: 0
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- Name: InUInt
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Kind: StructuredBuffer
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DirectXBinding:
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Register: 1
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Space: 0
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VulkanBinding:
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Binding: 1
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- Name: InIntWarp
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Kind: StructuredBuffer
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DirectXBinding:
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Register: 4
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Space: 0
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VulkanBinding:
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Binding: 4
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- Name: InUIntWarp
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Kind: StructuredBuffer
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DirectXBinding:
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Register: 5
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Space: 0
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VulkanBinding:
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Binding: 5
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- Name: OutInt
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Kind: RWStructuredBuffer
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DirectXBinding:
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Register: 2
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Space: 0
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VulkanBinding:
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Binding: 2
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- Name: OutUInt
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Kind: RWStructuredBuffer
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DirectXBinding:
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Register: 3
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Space: 0
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VulkanBinding:
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Binding: 3
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...
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#--- end
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# REQUIRES: Int16
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# Bug in DXC-Vulkan
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# https://github.com/microsoft/DirectXShaderCompiler/issues/7494
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# Bug in Clang-Vulkan
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# https://github.com/llvm/llvm-project/issues/142677
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# However, the behaviour is also inconsistent across GPUs when using directx
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# and requires an HLK test so we will mark everything as UNSUPPORTED.
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# For more context see here:
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# https://github.com/microsoft/DirectXShaderCompiler/issues/7499
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# UNSUPPORTED: DXC
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# UNSUPPORTED: Clang
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# RUN: split-file %s %t
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# RUN: %dxc_target -enable-16bit-types -T cs_6_5 -Fo %t.o %t/source.hlsl
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# RUN: %offloader %t/pipeline.yaml %t.o
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#--- source.hlsl
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StructuredBuffer<int4> InInt : register(t0);
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StructuredBuffer<uint4> InUInt : register(t1);
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RWStructuredBuffer<uint4> OutInt : register(u2);
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RWStructuredBuffer<uint4> OutUInt : register(u3);
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[numthreads(1,1,1)]
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void main() {
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// Int
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OutInt[0] = countbits(InInt[0]);
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uint4 OutOne = {countbits(InInt[0].xyz), countbits(InInt[0].w)};
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OutInt[1] = OutOne;
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OutInt[2].xy = countbits(InInt[0].xy);
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// UInt
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OutUInt[0] = countbits(InUInt[0]);
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uint4 OutUOne = {countbits(InUInt[0].xyz), countbits(InUInt[0].w)};
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OutUInt[1] = OutUOne;
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OutUInt[2].xy = countbits(InUInt[0].xy);
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}
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//--- pipeline.yaml
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---
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Shaders:
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- Stage: Compute
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Entry: main
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DispatchSize: [1, 1, 1]
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Buffers:
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- Name: InInt
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Format: Int32
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Stride: 16
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Data: [0x2A, 0, 0x0f0f0f0f, -1]
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- Name: InUInt
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Format: UInt32
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Stride: 16
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Data: [0x2A, 0, 0x0f0f0f0f, 0xffffffff]
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- Name: OutInt
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Format: UInt32
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Stride: 16
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ZeroInitSize: 48
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- Name: OutUInt
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Format: UInt32
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Stride: 16
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ZeroInitSize: 48
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- Name: ExpectedOut # The result we expect
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Format: UInt32
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Stride: 16
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Data: [3, 0, 16, 32, 3, 0, 16, 32, 3, 0, 0, 0]
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Results:
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- Result: Test1
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Rule: BufferExact
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Actual: OutInt
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Expected: ExpectedOut
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- Result: Test2
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Rule: BufferExact
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Actual: OutUInt
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Expected: ExpectedOut
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DescriptorSets:
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- Resources:
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- Name: InInt
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Kind: StructuredBuffer
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DirectXBinding:
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Register: 0
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Space: 0
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VulkanBinding:
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Binding: 0
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- Name: InUInt
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Kind: StructuredBuffer
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DirectXBinding:
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Register: 1
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Space: 0
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VulkanBinding:
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Binding: 1
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- Name: OutInt
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Kind: RWStructuredBuffer
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DirectXBinding:
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Register: 2
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Space: 0
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VulkanBinding:
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Binding: 2
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- Name: OutUInt
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Kind: RWStructuredBuffer
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DirectXBinding:
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Register: 3
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Space: 0
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VulkanBinding:
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Binding: 3
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...
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#--- end
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# RUN: split-file %s %t
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# RUN: %dxc_target -T cs_6_5 -Fo %t.o %t/source.hlsl
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# RUN: %offloader %t/pipeline.yaml %t.o
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#--- source.hlsl
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StructuredBuffer<int64_t4> InInt : register(t0);
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StructuredBuffer<uint64_t4> InUInt : register(t1);
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RWStructuredBuffer<uint4> OutInt : register(u2);
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RWStructuredBuffer<uint4> OutUInt : register(u3);
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[numthreads(1,1,1)]
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void main() {
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// Int
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OutInt[0] = countbits(InInt[0]);
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uint4 OutOne = {countbits(InInt[0].xyz), countbits(InInt[0].w)};
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OutInt[1] = OutOne;
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OutInt[2].xy = countbits(InInt[0].xy);
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// UInt
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OutUInt[0] = countbits(InUInt[0]);
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uint4 OutUOne = {countbits(InUInt[0].xyz), countbits(InUInt[0].w)};
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OutUInt[1] = OutUOne;
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OutUInt[2].xy = countbits(InUInt[0].xy);
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}
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//--- pipeline.yaml
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---
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Shaders:
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- Stage: Compute
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Entry: main
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DispatchSize: [1, 1, 1]
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Buffers:
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- Name: InInt
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Format: Int64
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Stride: 32
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Data: [0x2A, 0, 0x0f0f0f0f0f0f0f0f, -1]
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- Name: InUInt
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Format: UInt64
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Stride: 32
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Data: [0x2A, 0, 0x0f0f0f0f0f0f0f0f, 0xffffffffffffffff]
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- Name: OutInt
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Format: UInt32
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Stride: 16
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ZeroInitSize: 48
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- Name: OutUInt
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Format: UInt32
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Stride: 16
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ZeroInitSize: 48
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- Name: ExpectedOut # The result we expect
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Format: UInt32
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Stride: 16
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Data: [3, 0, 32, 64, 3, 0, 32, 64, 3, 0, 0, 0]
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Results:
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- Result: Test1
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Rule: BufferExact
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Actual: OutInt
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Expected: ExpectedOut
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- Result: Test2
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Rule: BufferExact
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Actual: OutUInt
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Expected: ExpectedOut
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DescriptorSets:
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- Resources:
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- Name: InInt
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Kind: StructuredBuffer
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DirectXBinding:
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Register: 0
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Space: 0
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VulkanBinding:
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Binding: 0
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- Name: InUInt
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Kind: StructuredBuffer
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DirectXBinding:
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Register: 1
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Space: 0
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VulkanBinding:
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Binding: 1
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- Name: OutInt
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Kind: RWStructuredBuffer
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DirectXBinding:
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Register: 2
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Space: 0
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VulkanBinding:
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Binding: 2
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- Name: OutUInt
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Kind: RWStructuredBuffer
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DirectXBinding:
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Register: 3
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Space: 0
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VulkanBinding:
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Binding: 3
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...
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#--- end
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# REQUIRES: Int64
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# https://github.com/microsoft/DirectXShaderCompiler/issues/7494
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# https://github.com/llvm/llvm-project/issues/142677
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# UNSUPPORTED: Vulkan
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# RUN: split-file %s %t
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# RUN: %dxc_target -T cs_6_5 -Fo %t.o %t/source.hlsl
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# RUN: %offloader %t/pipeline.yaml %t.o

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