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Reworking flaky tests to be more consistent across drivers
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4 files changed

+91
-144
lines changed

4 files changed

+91
-144
lines changed

‎test/Basic/idiv.test renamed to ‎test/Basic/idiv-edges.test

Lines changed: 60 additions & 69 deletions
Original file line numberDiff line numberDiff line change
@@ -1,69 +1,60 @@
1-
#--- source.hlsl
2-
RWStructuredBuffer<int> Buf : register(u0);
3-
RWStructuredBuffer<int> Zeros : register(u1);
4-
RWStructuredBuffer<int> NegOnes : register(u2);
5-
6-
[numthreads(8,1,1)]
7-
void main(uint3 TID : SV_GroupThreadID) {
8-
if (TID.x >= 5)
9-
return;
10-
11-
Zeros[TID.x] = Buf[TID.x] / Zeros[TID.x];
12-
NegOnes[TID.x] = Buf[TID.x] / NegOnes[TID.x];
13-
}
14-
//--- pipeline.yaml
15-
---
16-
DispatchSize: [1, 1, 1]
17-
DescriptorSets:
18-
- Resources:
19-
- Access: ReadWrite
20-
Format: Int32
21-
RawSize: 4
22-
Data: [ 1, -1, 2147483647, -2147483648, 0]
23-
DirectXBinding:
24-
Register: 0
25-
Space: 0
26-
- Access: ReadWrite
27-
Format: Int32
28-
RawSize: 4
29-
Data: [ 0, 0, 0, 0, 0]
30-
DirectXBinding:
31-
Register: 1
32-
Space: 0
33-
- Access: ReadWrite
34-
Format: Int32
35-
RawSize: 4
36-
Data: [ -1, -1, -1, -1, -1]
37-
DirectXBinding:
38-
Register: 2
39-
Space: 0
40-
...
41-
#--- end
42-
43-
# UNSUPPORTED: Clang
44-
# XFAIL: DirectX-WARP
45-
# RUN: split-file %s %t
46-
# RUN: %if DirectX %{ dxc -T cs_6_0 -Fo %t.dxil %t/source.hlsl %}
47-
# RUN: %if DirectX %{ %gpu-exec %t/pipeline.yaml %t.dxil | FileCheck %s %}
48-
# RUN: %if Vulkan %{ dxc -T cs_6_0 -spirv -Fo %t.spv %t/source.hlsl %}
49-
# RUN: %if Vulkan %{ %gpu-exec %t/pipeline.yaml %t.spv | FileCheck %s %}
50-
# RUN: %if Metal %{ dxc -T cs_6_0 -Fo %t.dxil %t/source.hlsl %}
51-
# RUN: %if Metal %{ metal-shaderconverter %t.dxil -o=%t.metallib %}
52-
# RUN: %if Metal %{ %gpu-exec %t/pipeline.yaml %t.metallib | FileCheck %s %}
53-
54-
# XFAIL: DirectX-Intel
55-
# On Intel drivers N/0 returns INT_MAX for N >= 0, and INT_MIN for N < 0.
56-
# Oddly enough, Vulkan-Intel works just fine...
57-
58-
# XFAIL: Metal
59-
# On Metal 0/0 = 0, but other platforms n/0 = -1.
60-
61-
# CHECK: Access: ReadWrite
62-
# CHECK: Access: ReadWrite
63-
# CHECK-NEXT: Format: Int32
64-
# CHECK-NEXT: RawSize: 4
65-
# CHECK-NEXT: Data: [ -1, -1, -1, -1, -1 ]
66-
# CHECK: Access: ReadWrite
67-
# CHECK-NEXT: Format: Int32
68-
# CHECK-NEXT: RawSize: 4
69-
# CHECK-NEXT: Data: [ -1, 1, -2147483647, -2147483648, 0 ]
1+
#--- source.hlsl
2+
RWStructuredBuffer<int> Buf : register(u0);
3+
RWStructuredBuffer<int> Zeros : register(u1);
4+
RWStructuredBuffer<int> NegOnes : register(u2);
5+
6+
[numthreads(8,1,1)]
7+
void main(uint3 TID : SV_GroupThreadID) {
8+
if (TID.x >= 5)
9+
return;
10+
11+
Zeros[TID.x] = Buf[TID.x] / Zeros[TID.x];
12+
NegOnes[TID.x] = Buf[TID.x] / NegOnes[TID.x];
13+
}
14+
//--- pipeline.yaml
15+
---
16+
DispatchSize: [1, 1, 1]
17+
DescriptorSets:
18+
- Resources:
19+
- Access: ReadWrite
20+
Format: Int32
21+
RawSize: 4
22+
Data: [ 1, -1, 2147483647, -2147483648, 0]
23+
DirectXBinding:
24+
Register: 0
25+
Space: 0
26+
- Access: ReadWrite
27+
Format: Int32
28+
RawSize: 4
29+
Data: [ 0, 0, 0, 0, 0]
30+
DirectXBinding:
31+
Register: 1
32+
Space: 0
33+
- Access: ReadWrite
34+
Format: Int32
35+
RawSize: 4
36+
Data: [ -1, -1, -1, -1, -1]
37+
DirectXBinding:
38+
Register: 2
39+
Space: 0
40+
...
41+
#--- end
42+
43+
# UNSUPPORTED: Clang
44+
# RUN: split-file %s %t
45+
# RUN: %if DirectX %{ dxc -T cs_6_0 -Fo %t.dxil %t/source.hlsl %}
46+
# RUN: %if DirectX %{ %gpu-exec %t/pipeline.yaml %t.dxil | FileCheck %s %}
47+
# RUN: %if Vulkan %{ dxc -T cs_6_0 -spirv -Fo %t.spv %t/source.hlsl %}
48+
# RUN: %if Vulkan %{ %gpu-exec %t/pipeline.yaml %t.spv | FileCheck %s %}
49+
# RUN: %if Metal %{ dxc -T cs_6_0 -Fo %t.dxil %t/source.hlsl %}
50+
# RUN: %if Metal %{ metal-shaderconverter %t.dxil -o=%t.metallib %}
51+
# RUN: %if Metal %{ %gpu-exec %t/pipeline.yaml %t.metallib | FileCheck %s %}
52+
53+
# Divide by-zero behavior seems to be erradic enough to call it undefined...
54+
55+
# CHECK: Access: ReadWrite
56+
# CHECK: Access: ReadWrite
57+
# CHECK: Access: ReadWrite
58+
# CHECK-NEXT: Format: Int32
59+
# CHECK-NEXT: RawSize: 4
60+
# CHECK-NEXT: Data: [ -1, 1, -2147483647, 2147483647, 0 ]

‎test/Basic/idiv-warp.test

Lines changed: 0 additions & 64 deletions
This file was deleted.

‎test/Basic/simple.test

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,13 @@
11
#--- simple.hlsl
2-
RWBuffer<float4> In : register(u0);
3-
RWBuffer<float4> Out : register(u1, space4);
2+
3+
#if defined(__spirv__) || defined(__SPIRV__)
4+
#define REGISTER(Idx, Space)
5+
#else
6+
#define REGISTER(Idx, Space) : register(Idx, Space)
7+
#endif
8+
9+
RWBuffer<float4> In REGISTER(u0, space0);
10+
RWBuffer<float4> Out REGISTER(u1, space4);
411

512
[numthreads(1,1,1)]
613
void main(uint GI : SV_GroupIndex) {

‎test/WaveOps/WaveActiveMax.test

Lines changed: 22 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -52,34 +52,47 @@ DescriptorSets:
5252
# UNSUPPORTED: Clang
5353
# RUN: split-file %s %t
5454
# RUN: %if DirectX %{ dxc -T cs_6_0 -Fo %t.dxil %t/source.hlsl %}
55-
# RUN: %if DirectX %{ %gpu-exec %t/pipeline.yaml %t.dxil | FileCheck %s %}
56-
# RUN: %if DirectX-WARP %{ %gpu-exec %t/pipeline.yaml %t.dxil -warp | FileCheck %s %}
55+
# RUN: %if DirectX %{ %gpu-exec %t/pipeline.yaml %t.dxil | FileCheck --check-prefixes=CHECK,DX %s %}
5756
# RUN: %if Vulkan %{ dxc -T cs_6_0 -spirv -fspv-target-env=vulkan1.1 -Fo %t.spv %t/source.hlsl %}
5857
# RUN: %if Vulkan %{ %gpu-exec %t/pipeline.yaml %t.spv | FileCheck %s --check-prefixes=CHECK,VULKAN %}
5958
# RUN: %if Metal %{ dxc -T cs_6_0 -Fo %t.dxil %t/source.hlsl %}
6059
# RUN: %if Metal %{ metal-shaderconverter %t.dxil -o=%t.metallib %}
6160
# RUN: %if Metal %{ %gpu-exec %t/pipeline.yaml %t.metallib | FileCheck %s --check-prefixes=CHECK,METAL %}
6261

63-
# XFAIL: Vulkan-NV
62+
# The behavior of this operation is consistent on Metal, so the test verifies that behavior.
6463

65-
# The behavior of this operation is well-defined on Vulkan and Metal, but not
66-
# well-defined for DirectX. This test ensures that we get the defined output on
67-
# Vulkan and Metal, and it just verifies something ran on DX.
64+
# The SPIR-V Spec for OpGroupNonUniformFMax says:
65+
# > From the set of Value(s) provided by active invocations within a subgroup,
66+
# > if for any two Values one of them is a NaN, the other is chosen. If all
67+
# > Value(s) that are used by the current invocation are NaN, then the result is
68+
# > an undefined value.
69+
70+
# This makes Vulkan undefined for cases where all values are nan.
71+
72+
# Also SPIR-V states:
73+
# > The identity I for Operation is -INF.
74+
75+
# This makes it defined that any lane value of -INF is ignored.
76+
77+
# DirectX driver implementations seem to match SPIR-V, except WARP, which does
78+
# not treat -INF as an identity.
79+
80+
# XFAIL: DirectX-WARP
6881

6982
# CHECK: Access: ReadWrite
7083
# CHECK-NEXT: Format: Float32
7184
# CHECK-NEXT: RawSize: 4
7285
# METAL-NEXT: Data: [ 0, 0, 0, 0 ]
73-
# VULKAN-NEXT: Data: [ nan, nan, nan, nan ]
86+
# DX-NEXT: Data:
87+
# VULKAN-NEXT: Data:
7488
# CHECK: Access: ReadWrite
7589
# CHECK-NEXT: Format: Float32
7690
# CHECK-NEXT: RawSize: 4
7791
# CHECK-NEXT: Data: [ inf, inf, inf, inf ]
7892
# CHECK: Access: ReadWrite
7993
# CHECK-NEXT: Format: Float32
8094
# CHECK-NEXT: RawSize: 4
81-
# METAL-NEXT: Data: [ 0, 0, 0, 0 ]
82-
# VULKAN-NEXT: Data: [ -inf, -inf, -inf, -inf ]
95+
# CHECK-NEXT: Data: [ 0, 0, 0, 0 ]
8396
# CHECK: Access: ReadWrite
8497
# CHECK-NEXT: Format: Float32
8598
# CHECK-NEXT: RawSize: 4

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