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Implement firstbithigh test (#210)
Adds tests for `firstbithigh` Fixes #151 --------- Co-authored-by: Chris B <[email protected]>
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‎test/Feature/HLSLLib/firstbithigh.16.test

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#--- source.hlsl
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StructuredBuffer<uint16_t4> In1 : register(t0);
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StructuredBuffer<int16_t4> In2 : register(t1);
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RWStructuredBuffer<uint32_t4> Out : register(u2);
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[numthreads(1,1,1)]
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void main() {
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Out[0] = firstbithigh(In1[0]);
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uint32_t4 Out1 = {firstbithigh(In1[0].xyz), firstbithigh(In1[0].w)};
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uint32_t4 Out2 = {firstbithigh(In2[0].xy), firstbithigh(In2[0].zw)};
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Out[1]= Out1;
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Out[2] = Out2;
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}
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//--- pipeline.yaml
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---
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Shaders:
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- Stage: Compute
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Entry: main
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DispatchSize: [1, 1, 1]
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Buffers:
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- Name: In1
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Format: Hex16
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Stride: 8
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Data: [
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0x0000,
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0x0009,
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0x0001,
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0xFFFF,
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]
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- Name: In2
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Format: Int16
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Stride: 8
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# For signed, negative values the index of the first 0 from MSB is returned instead.
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Data: [
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-1, # All 1s -> return not found terminal
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-8,
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9,
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0
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]
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- Name: Out
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Format: UInt32
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Stride: 16
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ZeroInitSize: 48
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- Name: ExpectedOut # The result we expect
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Format: UInt32
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Stride: 16
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# All bits set (4294967295) is returned when no bit is set on the input
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Data: [4294967295, 3, 0, 15, 4294967295, 3, 0, 15, 4294967295, 2, 3, 4294967295]
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Results:
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- Result: Test1
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Rule: BufferExact
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Actual: Out
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Expected: ExpectedOut
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DescriptorSets:
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- Resources:
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- Name: In1
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Kind: StructuredBuffer
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DirectXBinding:
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Register: 0
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Space: 0
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VulkanBinding:
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Binding: 0
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- Name: In2
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Kind: StructuredBuffer
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DirectXBinding:
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Register: 1
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Space: 0
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VulkanBinding:
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Binding: 1
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- Name: Out
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Kind: RWStructuredBuffer
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DirectXBinding:
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Register: 2
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Space: 0
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VulkanBinding:
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Binding: 2
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...
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#--- end
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# REQUIRES: Int16
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# No bit set terminal is returned as 4294901776 instead of 4294967295
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# XFAIL: DXC-Metal
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# Fails with 'gpu-exec: error: Failed to materializeAll.:'
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# XFAIL: Clang-Metal
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# https://github.com/llvm/llvm-project/issues/145752
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# XFAIL: Clang-DirectX
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# 16/64 bit firstbithigh doesn't have a DXC-Vulkan lowering
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# https://github.com/microsoft/DirectXShaderCompiler/blob/48d6e3c635f0ab3ae79580c37003e6faeca6c671/tools/clang/test/CodeGenSPIRV/intrinsics.firstbitlow.64bit.hlsl#L5
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# UNSUPPORTED: DXC-Vulkan
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# RUN: split-file %s %t
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# RUN: %dxc_target -T cs_6_5 -enable-16bit-types -Fo %t.o %t/source.hlsl
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# RUN: %offloader %t/pipeline.yaml %t.o

‎test/Feature/HLSLLib/firstbithigh.32.test

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#--- source.hlsl
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StructuredBuffer<uint4> In1 : register(t0);
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StructuredBuffer<int4> In2 : register(t1);
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RWStructuredBuffer<uint4> Out : register(u2);
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[numthreads(1,1,1)]
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void main() {
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Out[0] = firstbithigh(In1[0]);
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uint32_t4 Out1 = {firstbithigh(In1[0].xyz), firstbithigh(In1[0].w)};
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uint32_t4 Out2 = {firstbithigh(In2[0].xy), firstbithigh(In2[0].zw)};
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Out[1]= Out1;
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Out[2] = Out2;
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}
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//--- pipeline.yaml
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---
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Shaders:
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- Stage: Compute
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Entry: main
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DispatchSize: [1, 1, 1]
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Buffers:
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- Name: In1
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Format: Hex32
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Stride: 16
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Data: [
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0x00000000,
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0x00000009,
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0x00000001,
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0xFFFFFFFF,
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]
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- Name: In2
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Format: Int32
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Stride: 16
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# For signed, negative values the index of the first 0 from MSB is returned instead.
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Data: [
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-1, # All 1s -> return not found terminal
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-8,
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9,
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0
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]
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- Name: Out
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Format: UInt32
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Stride: 16
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ZeroInitSize: 48
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- Name: ExpectedOut # The result we expect
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Format: UInt32
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Stride: 16
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# All bits set (4294967295) is returned when no bit is set on the input
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Data: [4294967295, 3, 0, 31, 4294967295, 3, 0, 31, 4294967295, 2, 3, 4294967295]
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Results:
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- Result: Test1
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Rule: BufferExact
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Actual: Out
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Expected: ExpectedOut
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DescriptorSets:
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- Resources:
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- Name: In1
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Kind: StructuredBuffer
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DirectXBinding:
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Register: 0
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Space: 0
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VulkanBinding:
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Binding: 0
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- Name: In2
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Kind: StructuredBuffer
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DirectXBinding:
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Register: 1
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Space: 0
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VulkanBinding:
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Binding: 1
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- Name: Out
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Kind: RWStructuredBuffer
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DirectXBinding:
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Register: 2
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Space: 0
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VulkanBinding:
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Binding: 2
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...
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#--- end
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# https://github.com/llvm/llvm-project/issues/145752
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# XFAIL: Clang-DirectX || Clang-Metal
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# RUN: split-file %s %t
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# RUN: %dxc_target -T cs_6_5 -Fo %t.o %t/source.hlsl
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# RUN: %offloader %t/pipeline.yaml %t.o

‎test/Feature/HLSLLib/firstbithigh.64.test

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#--- source.hlsl
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StructuredBuffer<uint64_t4> In1 : register(t0);
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StructuredBuffer<int64_t4> In2 : register(t1);
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RWStructuredBuffer<uint32_t4> Out : register(u2);
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[numthreads(1,1,1)]
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void main() {
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Out[0] = firstbithigh(In1[0]);
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uint32_t4 Out1 = {firstbithigh(In1[0].xyz), firstbithigh(In1[0].w)};
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uint32_t4 Out2 = {firstbithigh(In2[0].xy), firstbithigh(In2[0].zw)};
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Out[1]= Out1;
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Out[2] = Out2;
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}
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//--- pipeline.yaml
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---
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Shaders:
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- Stage: Compute
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Entry: main
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DispatchSize: [1, 1, 1]
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Buffers:
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- Name: In1
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Format: Hex64
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Stride: 32
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Data: [
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0x0000000000000000,
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0x0000000000000009,
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0x0000000000000001,
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0xFFFFFFFFFFFFFFFF,
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]
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- Name: In2
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Format: Int64
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Stride: 32
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# For signed, negative values the index of the first 0 from MSB is returned instead.
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Data: [
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-1, # All 1s -> return not found terminal
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-8,
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9,
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0
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]
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- Name: Out
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Format: UInt32
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Stride: 16
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ZeroInitSize: 48
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- Name: ExpectedOut # The result we expect
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Format: UInt32
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Stride: 16
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# All bits set (4294967295) is returned when no bit is set on the input
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Data: [4294967295, 3, 0, 63, 4294967295, 3, 0, 63, 4294967295, 2, 3, 4294967295]
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Results:
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- Result: Test1
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Rule: BufferExact
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Actual: Out
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Expected: ExpectedOut
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DescriptorSets:
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- Resources:
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- Name: In1
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Kind: StructuredBuffer
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DirectXBinding:
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Register: 0
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Space: 0
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VulkanBinding:
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Binding: 0
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- Name: In2
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Kind: StructuredBuffer
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DirectXBinding:
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Register: 1
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Space: 0
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VulkanBinding:
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Binding: 1
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- Name: Out
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Kind: RWStructuredBuffer
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DirectXBinding:
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Register: 2
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Space: 0
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VulkanBinding:
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Binding: 2
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...
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#--- end
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# REQUIRES: Int64
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# Fails with 'gpu-exec: error: Failed to materializeAll.:'
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# XFAIL: Metal
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# 16/64 bit firstbithigh doesn't have a DXC-Vulkan lowering
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# https://github.com/microsoft/DirectXShaderCompiler/blob/48d6e3c635f0ab3ae79580c37003e6faeca6c671/tools/clang/test/CodeGenSPIRV/intrinsics.firstbitlow.64bit.hlsl#L5
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# UNSUPPORTED: DXC-Vulkan
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# https://github.com/microsoft/DirectXShaderCompiler/issues/7502
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# WARP firstbithigh(s64 -1) should return -1 but returns 32
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# XFAIL: DirectX-WARP
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# https://github.com/llvm/llvm-project/issues/143171
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# XFAIL: Clang-Vulkan
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# https://github.com/llvm/llvm-project/issues/145752
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# XFAIL: Clang-DirectX
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# RUN: split-file %s %t
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# RUN: %dxc_target -T cs_6_5 -Fo %t.o %t/source.hlsl
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# RUN: %offloader %t/pipeline.yaml %t.o

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