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WIP - add vec4 and constant folding tests, vec4 currently failing
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test/Feature/HLSLLib/adduint64.test

Lines changed: 10 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
#--- source.hlsl
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3-
StructuredBuffer<float4> In : register(t0);
4-
RWStructuredBuffer<float4> Out : register(u1);
3+
StructuredBuffer<uint4> In : register(t0);
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RWStructuredBuffer<uint4> Out : register(u1);
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[numthreads(1,1,1)]
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void main() {
@@ -11,6 +11,8 @@ void main() {
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Out[1].zw = AddUint64(In[1].zw, In[1].zw);
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Out[2].xy = AddUint64(In[2].xy, In[2].xy);
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Out[2].zw = AddUint64(In[2].zw, In[2].zw);
14+
Out[3] = AddUint64(In[0], In[0]); // vec4 test
15+
Out[4].xy = AddUint64(uint2(1,2), uint2(3,4));
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}
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//--- pipeline.yaml
@@ -22,21 +24,20 @@ Shaders:
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DispatchSize: [1, 1, 1]
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Buffers:
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- Name: In
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Format: Float32
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Format: UInt32
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Stride: 16
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Data: [ 1, 0, 1, 256, 10000, 10001, 0x80000000, 1, 0x7fffffff, 0x7fffffff, 0xffffffff, 0x7fffffff ]
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- Name: Out
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Format: Float32
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Format: UInt32
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Stride: 16
31-
ZeroInitSize: 48
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ZeroInitSize: 80
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- Name: ExpectedOut # The result we expect
33-
Format: Float32
35+
Format: UInt32
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Stride: 16
35-
Data: [ 2, 0, 2, 512, 20000, 20002, 0, 3, 0xfffffffe, 0xfffffffe, 0xfffffffe, 0xffffffff ]
37+
Data: [ 2, 0, 2, 512, 20000, 20002, 0, 3, 0xfffffffe, 0xfffffffe, 0xfffffffe, 0xffffffff, 2, 0, 2, 512, 4, 6, 0, 0 ]
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Results:
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- Result: Test1
38-
Rule: BufferFloatEpsilon
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Epsilon: 0
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Rule: BufferExact
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Actual: Out
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Expected: ExpectedOut
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DescriptorSets:

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